Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	60638	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1375027

1

T1

119648

T3

3

T4

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	378631	1			T1	30507		T3	3		T4	62
values[0x0]	519265	1			T1	45245		T11	11421		T12	51386
values[0x1]	537769	1			T1	46815		T11	11798		T12	52695

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31250	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1404415

1

T1

120865

T3

3

T4

37

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5256	1			T1	457		T4	2		T6	8
valid_sources[0x01]	5229	1			T1	493		T4	2		T113	1
valid_sources[0x02]	5531	1			T1	556		T112	2		T127	1
valid_sources[0x03]	5282	1			T1	504		T8	1		T36	2
valid_sources[0x04]	5025	1			T1	526		T18	1		T110	1
valid_sources[0x05]	5253	1			T1	466		T4	1		T16	1
valid_sources[0x06]	5038	1			T1	465		T16	1		T110	1
valid_sources[0x07]	5390	1			T1	540		T8	2		T16	1
valid_sources[0x08]	4895	1			T1	473		T18	1		T110	5
valid_sources[0x09]	6069	1			T1	488		T18	2		T11	504
valid_sources[0x0a]	6029	1			T1	543		T19	4		T111	1
valid_sources[0x0b]	5275	1			T1	491		T17	2		T18	1
valid_sources[0x0c]	5236	1			T1	462		T6	2		T19	14
valid_sources[0x0d]	5264	1			T1	441		T4	3		T16	2
valid_sources[0x0e]	5819	1			T1	451		T18	1		T11	743
valid_sources[0x0f]	5230	1			T1	515		T8	1		T110	2
valid_sources[0x10]	5172	1			T1	433		T110	1		T40	2
valid_sources[0x11]	5765	1			T1	541		T4	1		T16	2
valid_sources[0x12]	5117	1			T1	515		T16	1		T39	2
valid_sources[0x13]	5659	1			T1	438		T4	3		T16	1
valid_sources[0x14]	5801	1			T1	437		T110	3		T111	1
valid_sources[0x15]	5360	1			T1	478		T16	3		T110	1
valid_sources[0x16]	5014	1			T1	474		T112	5		T39	3
valid_sources[0x17]	5674	1			T1	480		T16	2		T110	1
valid_sources[0x18]	5434	1			T1	532		T4	1		T8	1
valid_sources[0x19]	5137	1			T1	459		T4	1		T16	1
valid_sources[0x1a]	6510	1			T1	490		T4	1		T16	2
valid_sources[0x1b]	6226	1			T1	454		T36	3		T128	1
valid_sources[0x1c]	5027	1			T1	406		T16	1		T128	1
valid_sources[0x1d]	5602	1			T1	417		T110	6		T111	1
valid_sources[0x1e]	5968	1			T1	574		T11	269		T129	2
valid_sources[0x1f]	5313	1			T1	453		T9	1		T110	2
valid_sources[0x20]	5463	1			T1	443		T6	3		T36	1
valid_sources[0x21]	5363	1			T1	458		T9	1		T36	2
valid_sources[0x22]	5178	1			T1	477		T16	1		T36	1
valid_sources[0x23]	6374	1			T1	466		T16	1		T112	3
valid_sources[0x24]	5970	1			T1	468		T16	1		T111	1
valid_sources[0x25]	6331	1			T1	499		T8	1		T18	2
valid_sources[0x26]	5318	1			T1	434		T18	1		T110	2
valid_sources[0x27]	5263	1			T1	424		T16	1		T112	4
valid_sources[0x28]	5075	1			T1	462		T111	1		T36	2
valid_sources[0x29]	5333	1			T1	462		T110	1		T111	1
valid_sources[0x2a]	5931	1			T1	494		T16	2		T36	1
valid_sources[0x2b]	5073	1			T1	435		T8	4		T16	1
valid_sources[0x2c]	6226	1			T1	452		T16	1		T11	21
valid_sources[0x2d]	5512	1			T1	552		T8	1		T16	1
valid_sources[0x2e]	5836	1			T1	420		T16	2		T110	4
valid_sources[0x2f]	5993	1			T1	456		T111	5		T130	5
valid_sources[0x30]	6114	1			T1	509		T16	1		T18	2
valid_sources[0x31]	5576	1			T1	476		T4	1		T110	1
valid_sources[0x32]	5470	1			T1	516		T6	5		T110	1
valid_sources[0x33]	5491	1			T1	524		T16	1		T111	1
valid_sources[0x34]	5290	1			T1	471		T4	1		T16	1
valid_sources[0x35]	5229	1			T1	448		T8	6		T110	1
valid_sources[0x36]	5367	1			T1	515		T4	2		T8	5
valid_sources[0x37]	5668	1			T1	457		T16	2		T111	1
valid_sources[0x38]	6176	1			T1	452		T110	8		T36	1
valid_sources[0x39]	6226	1			T1	495		T76	1		T12	581
valid_sources[0x3a]	5720	1			T1	520		T16	2		T36	1
valid_sources[0x3b]	5925	1			T1	507		T110	1		T113	2
valid_sources[0x3c]	5367	1			T1	478		T16	1		T18	1
valid_sources[0x3d]	5580	1			T1	514		T16	1		T111	2
valid_sources[0x3e]	5844	1			T1	522		T8	2		T110	3
valid_sources[0x3f]	5721	1			T1	468		T8	1		T16	3
valid_sources[0x40]	5304	1			T1	502		T8	1		T110	1
valid_sources[0x41]	5565	1			T1	505		T36	4		T11	325
valid_sources[0x42]	5705	1			T1	504		T8	3		T16	1
valid_sources[0x43]	4935	1			T1	482		T6	1		T16	2
valid_sources[0x44]	5572	1			T1	512		T4	1		T111	3
valid_sources[0x45]	6888	1			T1	471		T16	1		T17	7
valid_sources[0x46]	6377	1			T1	445		T16	1		T18	1
valid_sources[0x47]	5851	1			T1	467		T16	1		T111	1
valid_sources[0x48]	5088	1			T1	479		T16	1		T18	1
valid_sources[0x49]	4914	1			T1	448		T8	3		T16	3
valid_sources[0x4a]	5402	1			T1	535		T6	2		T112	1
valid_sources[0x4b]	4990	1			T1	407		T36	1		T41	1
valid_sources[0x4c]	4809	1			T1	493		T8	1		T16	1
valid_sources[0x4d]	5989	1			T1	466		T8	2		T17	7
valid_sources[0x4e]	5746	1			T1	493		T6	4		T16	1
valid_sources[0x4f]	5294	1			T1	423		T16	2		T110	2
valid_sources[0x50]	5156	1			T1	464		T8	1		T36	2
valid_sources[0x51]	5231	1			T1	548		T45	2		T12	549
valid_sources[0x52]	5975	1			T1	451		T16	1		T18	1
valid_sources[0x53]	5416	1			T1	462		T16	2		T110	4
valid_sources[0x54]	5154	1			T1	487		T16	3		T111	2
valid_sources[0x55]	5312	1			T1	475		T6	1		T16	1
valid_sources[0x56]	5543	1			T1	490		T6	1		T110	1
valid_sources[0x57]	5278	1			T1	505		T110	5		T36	1
valid_sources[0x58]	5885	1			T1	514		T16	1		T110	2
valid_sources[0x59]	5120	1			T1	446		T36	1		T27	1
valid_sources[0x5a]	5470	1			T1	502		T111	1		T47	1
valid_sources[0x5b]	5633	1			T1	455		T8	1		T110	1
valid_sources[0x5c]	5591	1			T1	482		T8	2		T16	2
valid_sources[0x5d]	5482	1			T1	485		T110	2		T111	5
valid_sources[0x5e]	5561	1			T1	505		T111	1		T36	1
valid_sources[0x5f]	5651	1			T1	500		T18	1		T11	593
valid_sources[0x60]	6125	1			T1	493		T18	1		T11	300
valid_sources[0x61]	5308	1			T1	485		T18	1		T110	1
valid_sources[0x62]	5391	1			T1	433		T19	3		T36	1
valid_sources[0x63]	5298	1			T1	484		T4	2		T8	2
valid_sources[0x64]	5750	1			T1	503		T111	1		T36	2
valid_sources[0x65]	5994	1			T1	509		T6	3		T16	1
valid_sources[0x66]	5175	1			T1	492		T28	1		T110	2
valid_sources[0x67]	5921	1			T1	474		T16	1		T110	1
valid_sources[0x68]	5801	1			T1	468		T16	1		T17	1
valid_sources[0x69]	5843	1			T1	433		T16	1		T113	1
valid_sources[0x6a]	5870	1			T1	461		T18	1		T39	1
valid_sources[0x6b]	5630	1			T1	465		T16	4		T110	2
valid_sources[0x6c]	6725	1			T1	505		T11	565		T40	1
valid_sources[0x6d]	6044	1			T1	431		T19	1		T110	4
valid_sources[0x6e]	6116	1			T1	491		T16	1		T18	1
valid_sources[0x6f]	5965	1			T1	505		T4	1		T6	1
valid_sources[0x70]	5831	1			T1	486		T4	1		T110	4
valid_sources[0x71]	6001	1			T1	474		T8	1		T111	2
valid_sources[0x72]	5643	1			T1	472		T110	2		T111	1
valid_sources[0x73]	5204	1			T1	468		T36	1		T130	4
valid_sources[0x74]	5680	1			T1	455		T8	3		T16	1
valid_sources[0x75]	5644	1			T1	461		T16	1		T111	1
valid_sources[0x76]	6570	1			T1	476		T8	4		T18	1
valid_sources[0x77]	5461	1			T1	470		T4	1		T9	1
valid_sources[0x78]	5530	1			T1	460		T4	1		T9	1
valid_sources[0x79]	6141	1			T1	463		T18	1		T111	1
valid_sources[0x7a]	5203	1			T1	483		T4	1		T8	1
valid_sources[0x7b]	5822	1			T1	464		T36	4		T112	2
valid_sources[0x7c]	5894	1			T1	496		T110	3		T111	1
valid_sources[0x7d]	5222	1			T1	499		T16	2		T110	9
valid_sources[0x7e]	5936	1			T1	506		T4	2		T110	2
valid_sources[0x7f]	5623	1			T1	428		T128	1		T43	1
valid_sources[0x80]	5653	1			T1	456		T6	9		T18	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

345919

1

T1

29926

T3

3

T4

8

values[0x0]

all_enables

biggest_size

514774

1

T1

44866

T11

11305

T12

50923

values[0x1]

all_enables

biggest_size

514334

1

T1

44856

T11

11285

T12

50434

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	104694	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1042661

1

T1

84800

T3

18

T4

18

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	288028	1			T1	22474		T2	1		T3	27
values[0x0]	397637	1			T1	32534		T7	12		T34	4
values[0x1]	461690	1			T1	37491		T7	6		T33	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47398	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1099957

1

T1

89174

T2

1

T3

18

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4683	1			T1	72		T4	1		T11	103
valid_sources[0x01]	3707	1			T1	202		T11	99		T29	2
valid_sources[0x02]	4277	1			T1	350		T11	98		T130	2
valid_sources[0x03]	3567	1			T1	137		T9	2		T11	90
valid_sources[0x04]	4285	1			T1	520		T34	1		T11	55
valid_sources[0x05]	4265	1			T1	198		T28	1		T111	1
valid_sources[0x06]	4631	1			T1	488		T9	2		T34	1
valid_sources[0x07]	4621	1			T1	300		T2	1		T11	125
valid_sources[0x08]	3862	1			T1	56		T3	1		T28	1
valid_sources[0x09]	4818	1			T1	586		T4	2		T19	2
valid_sources[0x0a]	4340	1			T1	112		T111	1		T27	2
valid_sources[0x0b]	5153	1			T1	177		T111	2		T11	115
valid_sources[0x0c]	5403	1			T1	603		T27	2		T11	79
valid_sources[0x0d]	4373	1			T1	102		T111	2		T50	1
valid_sources[0x0e]	4354	1			T1	224		T11	79		T12	411
valid_sources[0x0f]	4581	1			T1	505		T9	2		T11	82
valid_sources[0x10]	4231	1			T1	606		T6	3		T19	1
valid_sources[0x11]	4693	1			T1	346		T11	116		T12	419
valid_sources[0x12]	5350	1			T1	578		T11	87		T12	400
valid_sources[0x13]	4881	1			T1	375		T11	89		T130	1
valid_sources[0x14]	4043	1			T1	240		T4	1		T11	85
valid_sources[0x15]	4403	1			T1	535		T11	105		T128	2
valid_sources[0x16]	4889	1			T1	314		T11	71		T12	401
valid_sources[0x17]	5218	1			T1	342		T27	3		T11	78
valid_sources[0x18]	3921	1			T1	348		T18	1		T11	83
valid_sources[0x19]	3723	1			T1	146		T111	1		T11	114
valid_sources[0x1a]	4057	1			T1	344		T11	85		T12	418
valid_sources[0x1b]	4498	1			T1	429		T5	1		T11	91
valid_sources[0x1c]	5438	1			T1	381		T4	1		T18	1
valid_sources[0x1d]	4325	1			T1	572		T11	83		T130	1
valid_sources[0x1e]	4911	1			T1	551		T18	1		T11	95
valid_sources[0x1f]	3976	1			T1	695		T11	86		T12	408
valid_sources[0x20]	4187	1			T1	640		T11	113		T12	398
valid_sources[0x21]	4706	1			T1	505		T4	1		T11	111
valid_sources[0x22]	3738	1			T1	186		T18	2		T111	1
valid_sources[0x23]	4192	1			T1	307		T9	1		T19	1
valid_sources[0x24]	4557	1			T1	258		T3	1		T9	1
valid_sources[0x25]	4305	1			T1	296		T50	5		T11	91
valid_sources[0x26]	5008	1			T1	689		T17	9		T19	1
valid_sources[0x27]	4685	1			T1	33		T11	111		T130	3
valid_sources[0x28]	4410	1			T1	174		T4	2		T34	1
valid_sources[0x29]	3789	1			T1	400		T3	2		T11	105
valid_sources[0x2a]	4992	1			T1	157		T16	1		T11	125
valid_sources[0x2b]	5131	1			T1	428		T11	61		T63	1
valid_sources[0x2c]	5139	1			T1	575		T11	79		T130	2
valid_sources[0x2d]	4770	1			T1	358		T4	1		T111	1
valid_sources[0x2e]	3968	1			T1	308		T111	1		T11	63
valid_sources[0x2f]	4449	1			T1	404		T6	1		T11	71
valid_sources[0x30]	3771	1			T1	591		T11	89		T12	400
valid_sources[0x31]	4391	1			T1	202		T4	2		T11	119
valid_sources[0x32]	4591	1			T1	271		T11	110		T130	1
valid_sources[0x33]	5259	1			T1	315		T4	1		T19	1
valid_sources[0x34]	4569	1			T1	264		T11	71		T46	1
valid_sources[0x35]	4448	1			T1	17		T4	1		T16	1
valid_sources[0x36]	4255	1			T1	280		T111	1		T11	73
valid_sources[0x37]	5090	1			T1	144		T111	2		T11	115
valid_sources[0x38]	4348	1			T1	181		T11	71		T12	473
valid_sources[0x39]	3841	1			T1	579		T11	77		T128	1
valid_sources[0x3a]	3991	1			T1	305		T9	4		T111	1
valid_sources[0x3b]	4103	1			T1	615		T19	3		T28	1
valid_sources[0x3c]	5053	1			T1	428		T111	1		T131	1
valid_sources[0x3d]	4461	1			T1	222		T11	99		T12	444
valid_sources[0x3e]	4738	1			T1	544		T11	98		T12	384
valid_sources[0x3f]	4601	1			T1	252		T11	96		T43	3
valid_sources[0x40]	4190	1			T1	395		T11	81		T12	415
valid_sources[0x41]	2954	1			T1	17		T11	84		T12	445
valid_sources[0x42]	3793	1			T1	514		T9	1		T111	1
valid_sources[0x43]	4523	1			T1	234		T11	87		T29	2
valid_sources[0x44]	3839	1			T1	438		T4	1		T18	1
valid_sources[0x45]	4188	1			T1	28		T11	67		T12	406
valid_sources[0x46]	4801	1			T1	120		T3	1		T11	101
valid_sources[0x47]	4574	1			T1	483		T111	1		T11	82
valid_sources[0x48]	3736	1			T1	548		T16	3		T11	50
valid_sources[0x49]	4740	1			T1	461		T11	83		T12	377
valid_sources[0x4a]	4336	1			T1	410		T28	1		T27	3
valid_sources[0x4b]	3974	1			T1	175		T3	1		T11	115
valid_sources[0x4c]	4328	1			T1	250		T9	1		T16	1
valid_sources[0x4d]	4519	1			T1	165		T3	1		T16	5
valid_sources[0x4e]	4465	1			T1	78		T3	1		T11	75
valid_sources[0x4f]	4726	1			T1	717		T111	1		T11	108
valid_sources[0x50]	4294	1			T1	585		T11	108		T12	435
valid_sources[0x51]	3903	1			T1	336		T111	1		T11	91
valid_sources[0x52]	4636	1			T1	828		T113	32		T11	94
valid_sources[0x53]	3822	1			T1	72		T111	1		T11	118
valid_sources[0x54]	3943	1			T1	802		T16	1		T11	98
valid_sources[0x55]	4074	1			T1	721		T11	65		T12	404
valid_sources[0x56]	6328	1			T1	836		T111	1		T11	86
valid_sources[0x57]	4305	1			T1	256		T4	1		T18	1
valid_sources[0x58]	4141	1			T1	495		T11	98		T128	10
valid_sources[0x59]	3122	1			T1	130		T11	83		T12	409
valid_sources[0x5a]	4287	1			T1	127		T11	96		T12	430
valid_sources[0x5b]	4175	1			T1	110		T11	78		T12	427
valid_sources[0x5c]	5352	1			T1	369		T18	2		T111	1
valid_sources[0x5d]	4700	1			T1	272		T4	1		T11	55
valid_sources[0x5e]	3943	1			T1	105		T16	1		T111	1
valid_sources[0x5f]	3797	1			T1	176		T4	1		T11	86
valid_sources[0x60]	5096	1			T1	383		T9	5		T11	126
valid_sources[0x61]	5109	1			T1	494		T34	1		T11	88
valid_sources[0x62]	4143	1			T1	300		T16	1		T111	1
valid_sources[0x63]	4739	1			T1	287		T11	76		T12	420
valid_sources[0x64]	4376	1			T1	621		T11	81		T130	2
valid_sources[0x65]	4428	1			T1	368		T111	1		T11	97
valid_sources[0x66]	4000	1			T1	307		T111	1		T11	115
valid_sources[0x67]	4587	1			T1	281		T8	64		T11	99
valid_sources[0x68]	4349	1			T1	366		T11	94		T75	2
valid_sources[0x69]	5798	1			T1	655		T111	2		T11	64
valid_sources[0x6a]	3674	1			T1	137		T3	2		T11	115
valid_sources[0x6b]	4826	1			T1	273		T3	1		T11	62
valid_sources[0x6c]	4590	1			T1	360		T3	1		T11	70
valid_sources[0x6d]	3801	1			T1	80		T17	1		T11	86
valid_sources[0x6e]	4802	1			T1	646		T11	118		T29	2
valid_sources[0x6f]	4606	1			T1	302		T28	1		T11	109
valid_sources[0x70]	4755	1			T1	375		T111	2		T11	93
valid_sources[0x71]	4335	1			T1	144		T4	1		T18	1
valid_sources[0x72]	6671	1			T1	282		T111	1		T11	104
valid_sources[0x73]	4737	1			T1	566		T111	1		T34	1
valid_sources[0x74]	4625	1			T1	380		T11	71		T12	433
valid_sources[0x75]	6246	1			T1	890		T6	7		T11	121
valid_sources[0x76]	4421	1			T1	576		T18	1		T111	1
valid_sources[0x77]	3947	1			T1	347		T11	119		T130	1
valid_sources[0x78]	4470	1			T1	496		T3	1		T28	6
valid_sources[0x79]	3819	1			T1	261		T11	111		T12	440
valid_sources[0x7a]	5275	1			T1	668		T111	1		T11	88
valid_sources[0x7b]	4287	1			T1	153		T3	1		T111	1
valid_sources[0x7c]	3776	1			T1	27		T16	4		T28	1
valid_sources[0x7d]	5532	1			T1	401		T16	2		T11	64
valid_sources[0x7e]	4315	1			T1	417		T111	1		T11	84
valid_sources[0x7f]	4894	1			T1	457		T6	1		T9	4
valid_sources[0x80]	4858	1			T1	146		T19	1		T11	97

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

264022

1

T1

21152

T3

18

T4

18

values[0x0]

all_enables

biggest_size

389317

1

T1

31912

T7

6

T35

1

values[0x1]

all_enables

biggest_size

389322

1

T1

31736

T35

1

T11

7840