Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	95084	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1887644

1

T2

3

T3

4

T4

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	533503	1			T2	3		T3	74		T4	68
values[0x0]	711445	1			T20	15515		T21	23570		T22	18578
values[0x1]	737780	1			T20	16279		T21	24506		T22	19339

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48238	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1934490

1

T2

3

T3

42

T4

41

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7823	1			T9	1		T14	1		T19	6
valid_sources[0x01]	6602	1			T9	2		T14	1		T19	1
valid_sources[0x02]	7482	1			T9	3		T19	1		T37	1
valid_sources[0x03]	7411	1			T19	12		T37	1		T11	1
valid_sources[0x04]	8730	1			T4	1		T9	1		T37	2
valid_sources[0x05]	7880	1			T14	1		T19	6		T37	1
valid_sources[0x06]	7377	1			T9	2		T14	1		T19	2
valid_sources[0x07]	9019	1			T9	2		T125	5		T20	381
valid_sources[0x08]	7260	1			T9	1		T37	2		T125	2
valid_sources[0x09]	9939	1			T4	1		T9	1		T14	1
valid_sources[0x0a]	6768	1			T9	2		T14	3		T16	53
valid_sources[0x0b]	5978	1			T9	1		T14	1		T37	1
valid_sources[0x0c]	7153	1			T14	2		T19	4		T125	2
valid_sources[0x0d]	7392	1			T14	1		T125	8		T11	2
valid_sources[0x0e]	7379	1			T14	1		T19	1		T125	2
valid_sources[0x0f]	8693	1			T14	1		T18	36		T21	296
valid_sources[0x10]	8405	1			T14	3		T125	1		T20	184
valid_sources[0x11]	9581	1			T3	2		T9	2		T125	1
valid_sources[0x12]	6544	1			T4	1		T9	3		T37	1
valid_sources[0x13]	6684	1			T9	1		T14	2		T125	4
valid_sources[0x14]	8496	1			T14	1		T11	2		T20	546
valid_sources[0x15]	9331	1			T9	1		T19	4		T20	872
valid_sources[0x16]	7725	1			T3	8		T9	1		T14	1
valid_sources[0x17]	7512	1			T9	1		T125	1		T20	145
valid_sources[0x18]	6834	1			T4	1		T14	1		T125	1
valid_sources[0x19]	7648	1			T20	661		T21	226		T22	180
valid_sources[0x1a]	9224	1			T9	1		T125	3		T20	299
valid_sources[0x1b]	7782	1			T4	2		T9	1		T19	2
valid_sources[0x1c]	9191	1			T9	1		T14	1		T20	175
valid_sources[0x1d]	7602	1			T14	4		T125	1		T21	212
valid_sources[0x1e]	8010	1			T9	1		T14	1		T18	43
valid_sources[0x1f]	7194	1			T9	1		T14	1		T125	4
valid_sources[0x20]	9812	1			T3	7		T19	2		T20	685
valid_sources[0x21]	8430	1			T9	1		T19	2		T37	1
valid_sources[0x22]	7349	1			T9	1		T37	1		T71	19
valid_sources[0x23]	6350	1			T4	1		T14	1		T11	2
valid_sources[0x24]	9892	1			T14	2		T37	1		T20	533
valid_sources[0x25]	8498	1			T4	1		T14	2		T19	4
valid_sources[0x26]	7142	1			T14	2		T37	1		T21	260
valid_sources[0x27]	8992	1			T9	3		T37	5		T20	520
valid_sources[0x28]	7332	1			T14	1		T19	1		T37	2
valid_sources[0x29]	7392	1			T3	1		T9	1		T14	1
valid_sources[0x2a]	7413	1			T9	1		T19	9		T37	2
valid_sources[0x2b]	6963	1			T4	1		T14	2		T86	1
valid_sources[0x2c]	8617	1			T20	143		T21	232		T22	195
valid_sources[0x2d]	6253	1			T14	1		T37	2		T21	287
valid_sources[0x2e]	7830	1			T9	7		T20	454		T21	270
valid_sources[0x2f]	7467	1			T9	2		T14	2		T19	3
valid_sources[0x30]	9432	1			T9	1		T37	2		T125	1
valid_sources[0x31]	6706	1			T9	6		T14	2		T20	303
valid_sources[0x32]	8005	1			T14	3		T37	1		T125	4
valid_sources[0x33]	7323	1			T3	3		T4	1		T9	2
valid_sources[0x34]	7252	1			T9	1		T37	3		T125	4
valid_sources[0x35]	6151	1			T4	2		T19	7		T37	2
valid_sources[0x36]	7181	1			T4	1		T9	2		T37	1
valid_sources[0x37]	8006	1			T9	1		T18	30		T37	3
valid_sources[0x38]	6703	1			T3	2		T4	1		T37	1
valid_sources[0x39]	6000	1			T9	1		T86	5		T21	213
valid_sources[0x3a]	6497	1			T14	1		T37	2		T20	23
valid_sources[0x3b]	7935	1			T4	1		T9	2		T14	1
valid_sources[0x3c]	7240	1			T9	4		T19	1		T37	1
valid_sources[0x3d]	9109	1			T125	5		T21	249		T22	237
valid_sources[0x3e]	7861	1			T19	11		T125	12		T11	2
valid_sources[0x3f]	7159	1			T9	1		T14	1		T125	2
valid_sources[0x40]	7963	1			T9	2		T125	1		T20	357
valid_sources[0x41]	10567	1			T4	1		T9	4		T20	669
valid_sources[0x42]	6440	1			T9	1		T37	1		T21	190
valid_sources[0x43]	6110	1			T9	1		T14	1		T19	1
valid_sources[0x44]	7695	1			T4	1		T37	1		T125	7
valid_sources[0x45]	7388	1			T18	31		T125	3		T20	76
valid_sources[0x46]	7501	1			T9	2		T125	1		T21	240
valid_sources[0x47]	7682	1			T9	1		T14	1		T37	1
valid_sources[0x48]	7269	1			T4	1		T9	1		T14	1
valid_sources[0x49]	6950	1			T9	2		T14	1		T19	6
valid_sources[0x4a]	7823	1			T19	8		T37	1		T86	1
valid_sources[0x4b]	7297	1			T20	64		T21	236		T12	1
valid_sources[0x4c]	6483	1			T9	5		T14	1		T19	4
valid_sources[0x4d]	8471	1			T9	1		T125	1		T21	278
valid_sources[0x4e]	7703	1			T4	1		T9	2		T14	1
valid_sources[0x4f]	7559	1			T9	1		T37	2		T86	2
valid_sources[0x50]	9617	1			T9	2		T19	1		T21	263
valid_sources[0x51]	8099	1			T37	3		T21	247		T12	1
valid_sources[0x52]	6311	1			T9	1		T14	1		T125	1
valid_sources[0x53]	7404	1			T9	1		T14	2		T37	2
valid_sources[0x54]	8207	1			T37	1		T11	1		T21	194
valid_sources[0x55]	6897	1			T9	1		T15	1		T19	4
valid_sources[0x56]	6854	1			T9	2		T14	1		T15	1
valid_sources[0x57]	6780	1			T4	1		T9	2		T14	3
valid_sources[0x58]	8853	1			T9	3		T19	6		T86	1
valid_sources[0x59]	12511	1			T14	1		T19	2		T37	2
valid_sources[0x5a]	8297	1			T9	1		T37	1		T11	1
valid_sources[0x5b]	5722	1			T9	2		T19	1		T37	2
valid_sources[0x5c]	8895	1			T9	2		T14	2		T19	4
valid_sources[0x5d]	9447	1			T14	4		T20	183		T21	294
valid_sources[0x5e]	7075	1			T9	2		T14	2		T37	1
valid_sources[0x5f]	8819	1			T9	1		T125	1		T64	1
valid_sources[0x60]	8177	1			T11	2		T64	1		T21	254
valid_sources[0x61]	7526	1			T21	276		T12	2		T22	174
valid_sources[0x62]	8169	1			T9	2		T19	3		T125	7
valid_sources[0x63]	6956	1			T14	1		T86	1		T21	248
valid_sources[0x64]	7386	1			T9	1		T14	1		T18	33
valid_sources[0x65]	9500	1			T4	1		T9	2		T14	1
valid_sources[0x66]	7171	1			T9	5		T14	2		T37	2
valid_sources[0x67]	8448	1			T4	1		T9	3		T14	1
valid_sources[0x68]	7376	1			T37	1		T125	1		T20	171
valid_sources[0x69]	8659	1			T3	4		T4	1		T9	2
valid_sources[0x6a]	8644	1			T9	2		T14	2		T125	2
valid_sources[0x6b]	8062	1			T14	2		T20	354		T21	292
valid_sources[0x6c]	8899	1			T14	1		T86	2		T125	1
valid_sources[0x6d]	7207	1			T14	1		T19	8		T86	5
valid_sources[0x6e]	8116	1			T9	1		T14	1		T31	3
valid_sources[0x6f]	9400	1			T20	63		T21	332		T12	1
valid_sources[0x70]	7553	1			T3	11		T4	1		T125	5
valid_sources[0x71]	9647	1			T4	1		T9	2		T14	1
valid_sources[0x72]	7452	1			T9	5		T37	2		T64	4
valid_sources[0x73]	7223	1			T9	2		T14	2		T19	3
valid_sources[0x74]	8258	1			T4	1		T9	2		T14	1
valid_sources[0x75]	7402	1			T125	2		T20	77		T21	274
valid_sources[0x76]	7379	1			T9	2		T14	1		T21	224
valid_sources[0x77]	8671	1			T9	1		T14	3		T37	1
valid_sources[0x78]	7369	1			T4	1		T9	1		T17	19
valid_sources[0x79]	7748	1			T4	1		T9	2		T19	4
valid_sources[0x7a]	5263	1			T4	1		T14	1		T37	1
valid_sources[0x7b]	7921	1			T9	5		T19	8		T70	51
valid_sources[0x7c]	8014	1			T4	1		T9	2		T14	1
valid_sources[0x7d]	6741	1			T9	1		T14	1		T19	3
valid_sources[0x7e]	10702	1			T4	1		T9	4		T11	1
valid_sources[0x7f]	6240	1			T3	4		T4	2		T9	3
valid_sources[0x80]	6733	1			T3	1		T4	1		T9	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

477299

1

T2

3

T3

4

T4

6

values[0x0]

all_enables

biggest_size

705131

1

T20

15385

T21

23374

T22

18438

values[0x1]

all_enables

biggest_size

705214

1

T20

15510

T21

23403

T22

18522

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	149887	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1462668

1

T2

15

T3

14

T4

11

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	406441	1			T1	1		T2	35		T3	32
values[0x0]	557992	1			T6	2		T7	5		T24	9
values[0x1]	648122	1			T7	4		T24	10		T75	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69306	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1543249

1

T1

1

T2

17

T3

19

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6312	1			T71	1		T20	133		T21	205
valid_sources[0x01]	6102	1			T16	1		T70	3		T20	132
valid_sources[0x02]	5951	1			T71	3		T20	155		T21	178
valid_sources[0x03]	6262	1			T86	2		T20	113		T21	225
valid_sources[0x04]	6250	1			T16	1		T20	170		T21	199
valid_sources[0x05]	7668	1			T16	1		T70	2		T20	128
valid_sources[0x06]	5271	1			T16	1		T20	117		T21	209
valid_sources[0x07]	6484	1			T71	3		T20	130		T21	237
valid_sources[0x08]	7092	1			T3	1		T71	1		T86	7
valid_sources[0x09]	6592	1			T2	1		T4	1		T71	1
valid_sources[0x0a]	6267	1			T16	1		T20	132		T21	183
valid_sources[0x0b]	6503	1			T16	1		T71	1		T20	119
valid_sources[0x0c]	6871	1			T20	119		T21	197		T22	4
valid_sources[0x0d]	7250	1			T70	1		T20	163		T21	179
valid_sources[0x0e]	6028	1			T4	1		T71	3		T20	79
valid_sources[0x0f]	6094	1			T20	109		T21	218		T22	79
valid_sources[0x10]	6367	1			T2	2		T29	1		T71	2
valid_sources[0x11]	5595	1			T2	5		T4	1		T70	1
valid_sources[0x12]	5859	1			T20	83		T21	197		T12	1
valid_sources[0x13]	6601	1			T1	1		T71	1		T70	1
valid_sources[0x14]	7096	1			T70	2		T20	107		T21	198
valid_sources[0x15]	6469	1			T70	1		T20	162		T21	233
valid_sources[0x16]	5804	1			T20	173		T21	210		T22	35
valid_sources[0x17]	5756	1			T71	1		T70	1		T20	106
valid_sources[0x18]	5996	1			T16	1		T20	126		T21	211
valid_sources[0x19]	5607	1			T4	1		T20	142		T21	196
valid_sources[0x1a]	7017	1			T70	3		T20	136		T21	241
valid_sources[0x1b]	6058	1			T4	1		T71	1		T20	160
valid_sources[0x1c]	5866	1			T4	1		T8	1		T71	1
valid_sources[0x1d]	6564	1			T71	2		T11	5		T70	1
valid_sources[0x1e]	6782	1			T16	1		T70	3		T20	117
valid_sources[0x1f]	6332	1			T31	1		T20	104		T21	186
valid_sources[0x20]	6481	1			T70	1		T20	167		T21	230
valid_sources[0x21]	6436	1			T71	1		T20	119		T21	200
valid_sources[0x22]	5665	1			T20	169		T21	199		T22	6
valid_sources[0x23]	6476	1			T3	2		T20	195		T21	179
valid_sources[0x24]	7397	1			T10	32		T71	3		T20	126
valid_sources[0x25]	5063	1			T3	1		T86	2		T20	82
valid_sources[0x26]	6626	1			T20	219		T21	210		T22	389
valid_sources[0x27]	5654	1			T3	1		T20	166		T21	207
valid_sources[0x28]	7039	1			T20	133		T21	213		T12	1
valid_sources[0x29]	6573	1			T70	3		T20	127		T21	213
valid_sources[0x2a]	5806	1			T4	1		T70	1		T20	146
valid_sources[0x2b]	6621	1			T20	160		T21	242		T12	1
valid_sources[0x2c]	5907	1			T2	1		T20	83		T21	194
valid_sources[0x2d]	6009	1			T20	130		T21	215		T22	220
valid_sources[0x2e]	6907	1			T4	1		T16	1		T20	161
valid_sources[0x2f]	5558	1			T24	4		T20	57		T21	198
valid_sources[0x30]	6757	1			T11	4		T20	127		T21	208
valid_sources[0x31]	6038	1			T16	1		T71	2		T20	168
valid_sources[0x32]	7024	1			T16	1		T71	2		T70	1
valid_sources[0x33]	6499	1			T3	2		T20	117		T21	210
valid_sources[0x34]	5395	1			T71	6		T70	1		T20	151
valid_sources[0x35]	6391	1			T20	180		T21	176		T22	146
valid_sources[0x36]	5295	1			T71	2		T20	160		T21	185
valid_sources[0x37]	6569	1			T20	190		T21	205		T12	1
valid_sources[0x38]	6028	1			T70	2		T20	206		T21	207
valid_sources[0x39]	6568	1			T16	1		T20	114		T21	194
valid_sources[0x3a]	6750	1			T20	83		T21	241		T25	1
valid_sources[0x3b]	6422	1			T20	164		T21	183		T22	93
valid_sources[0x3c]	6433	1			T16	1		T31	4		T71	1
valid_sources[0x3d]	4991	1			T3	1		T31	2		T70	1
valid_sources[0x3e]	6939	1			T16	1		T24	1		T71	2
valid_sources[0x3f]	6162	1			T2	4		T20	121		T21	218
valid_sources[0x40]	6248	1			T2	2		T20	111		T21	195
valid_sources[0x41]	5711	1			T2	1		T3	1		T20	167
valid_sources[0x42]	6239	1			T4	1		T16	2		T71	1
valid_sources[0x43]	6170	1			T16	1		T71	1		T11	2
valid_sources[0x44]	5805	1			T16	2		T20	150		T21	204
valid_sources[0x45]	6059	1			T4	1		T24	8		T71	1
valid_sources[0x46]	5380	1			T3	2		T20	122		T21	215
valid_sources[0x47]	6349	1			T70	1		T20	88		T21	182
valid_sources[0x48]	6320	1			T71	1		T20	116		T21	183
valid_sources[0x49]	5195	1			T4	1		T71	2		T20	178
valid_sources[0x4a]	5923	1			T71	3		T20	78		T21	203
valid_sources[0x4b]	6312	1			T20	101		T21	219		T13	1
valid_sources[0x4c]	6040	1			T71	1		T20	153		T21	264
valid_sources[0x4d]	6249	1			T4	1		T16	1		T70	2
valid_sources[0x4e]	6189	1			T16	1		T20	68		T21	195
valid_sources[0x4f]	6372	1			T71	1		T20	173		T21	182
valid_sources[0x50]	5632	1			T70	1		T20	109		T21	204
valid_sources[0x51]	7072	1			T16	1		T71	1		T70	6
valid_sources[0x52]	6651	1			T2	1		T20	156		T21	186
valid_sources[0x53]	5665	1			T2	4		T20	88		T21	206
valid_sources[0x54]	6682	1			T20	125		T21	217		T22	107
valid_sources[0x55]	5705	1			T70	1		T20	164		T21	231
valid_sources[0x56]	5814	1			T3	1		T11	2		T20	143
valid_sources[0x57]	5993	1			T20	93		T21	209		T22	206
valid_sources[0x58]	6445	1			T3	1		T71	1		T70	1
valid_sources[0x59]	6003	1			T3	1		T4	1		T20	173
valid_sources[0x5a]	6453	1			T71	1		T20	175		T21	212
valid_sources[0x5b]	6431	1			T70	2		T20	130		T21	245
valid_sources[0x5c]	5973	1			T3	1		T4	1		T71	4
valid_sources[0x5d]	6929	1			T20	199		T21	191		T22	323
valid_sources[0x5e]	6630	1			T4	1		T16	2		T71	1
valid_sources[0x5f]	5890	1			T20	96		T21	260		T22	18
valid_sources[0x60]	6510	1			T16	1		T71	1		T20	118
valid_sources[0x61]	5951	1			T3	2		T75	3		T70	2
valid_sources[0x62]	6999	1			T16	1		T86	3		T11	1
valid_sources[0x63]	6101	1			T2	1		T71	1		T20	96
valid_sources[0x64]	7005	1			T16	1		T71	1		T20	143
valid_sources[0x65]	6083	1			T70	2		T20	145		T21	235
valid_sources[0x66]	6048	1			T2	2		T16	1		T20	96
valid_sources[0x67]	6497	1			T3	1		T5	29		T16	1
valid_sources[0x68]	6093	1			T16	1		T71	1		T20	117
valid_sources[0x69]	6587	1			T16	1		T20	152		T21	181
valid_sources[0x6a]	5587	1			T4	1		T70	1		T20	106
valid_sources[0x6b]	6023	1			T70	2		T20	196		T21	207
valid_sources[0x6c]	5334	1			T16	1		T20	152		T21	226
valid_sources[0x6d]	6721	1			T3	1		T70	1		T20	143
valid_sources[0x6e]	5911	1			T71	1		T20	107		T21	220
valid_sources[0x6f]	6329	1			T16	1		T70	1		T20	147
valid_sources[0x70]	7231	1			T3	1		T71	2		T20	245
valid_sources[0x71]	5965	1			T20	82		T21	207		T22	3
valid_sources[0x72]	5952	1			T71	1		T20	176		T21	211
valid_sources[0x73]	6441	1			T16	1		T71	1		T20	195
valid_sources[0x74]	6153	1			T71	1		T20	137		T21	205
valid_sources[0x75]	7358	1			T20	124		T21	210		T22	217
valid_sources[0x76]	5169	1			T20	158		T21	181		T22	8
valid_sources[0x77]	6606	1			T4	1		T20	110		T63	5
valid_sources[0x78]	5723	1			T20	151		T21	201		T12	1
valid_sources[0x79]	5982	1			T20	148		T21	215		T12	1
valid_sources[0x7a]	6523	1			T20	134		T21	182		T22	431
valid_sources[0x7b]	6468	1			T71	1		T70	1		T20	154
valid_sources[0x7c]	6829	1			T16	1		T20	131		T21	229
valid_sources[0x7d]	6890	1			T2	2		T20	180		T21	207
valid_sources[0x7e]	6869	1			T71	1		T20	186		T21	180
valid_sources[0x7f]	6930	1			T20	66		T21	211		T22	370
valid_sources[0x80]	6661	1			T31	2		T20	168		T21	189

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

369592

1

T2

15

T3

14

T4

11

values[0x0]

all_enables

biggest_size

546030

1

T7

2

T24

4

T75

2

values[0x1]

all_enables

biggest_size

547046

1

T7

2

T24

1

T75

1