Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.62 96.96 93.40 97.88 100.00 98.68 98.04 98.37


Total tests in report: 930
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
83.13 83.13 96.02 96.02 84.07 84.07 88.62 88.62 40.00 40.00 92.11 92.11 94.86 94.86 86.25 86.25 /workspace/coverage/default/12.rom_ctrl_stress_all_with_rand_reset.2468350708
94.12 10.99 96.73 0.70 88.09 4.02 94.82 6.20 100.00 60.00 95.07 2.96 95.32 0.45 88.81 2.56 /workspace/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.3593808353
95.08 0.96 96.73 0.00 88.52 0.43 94.82 0.00 100.00 0.00 95.07 0.00 95.32 0.00 95.10 6.29 /workspace/coverage/cover_reg_top/6.rom_ctrl_tl_intg_err.157400309
95.85 0.77 96.73 0.00 90.67 2.15 95.89 1.07 100.00 0.00 96.38 1.32 95.92 0.60 95.34 0.23 /workspace/coverage/default/23.rom_ctrl_smoke.3239152202
96.60 0.75 96.96 0.23 91.82 1.15 97.22 1.33 100.00 0.00 97.70 1.32 96.22 0.30 96.27 0.93 /workspace/coverage/default/3.rom_ctrl_sec_cm.2755564378
96.80 0.20 96.96 0.00 91.97 0.14 97.22 0.00 100.00 0.00 97.70 0.00 97.28 1.06 96.50 0.23 /workspace/coverage/cover_reg_top/8.rom_ctrl_passthru_mem_tl_intg_err.3615270510
96.94 0.13 96.96 0.00 91.97 0.00 97.22 0.00 100.00 0.00 97.70 0.00 97.28 0.00 97.44 0.93 /workspace/coverage/cover_reg_top/17.rom_ctrl_tl_intg_err.4056477975
97.05 0.11 96.96 0.00 92.40 0.43 97.22 0.00 100.00 0.00 98.03 0.33 97.28 0.00 97.44 0.00 /workspace/coverage/default/49.rom_ctrl_stress_all_with_rand_reset.1923188992
97.15 0.10 96.96 0.00 92.40 0.00 97.63 0.41 100.00 0.00 98.03 0.00 97.58 0.30 97.44 0.00 /workspace/coverage/default/48.rom_ctrl_stress_all.2060927019
97.24 0.09 96.96 0.00 92.54 0.14 97.81 0.18 100.00 0.00 98.36 0.33 97.58 0.00 97.44 0.00 /workspace/coverage/default/10.rom_ctrl_kmac_err_chk.1028100218
97.33 0.09 96.96 0.00 93.11 0.57 97.86 0.05 100.00 0.00 98.36 0.00 97.58 0.00 97.44 0.00 /workspace/coverage/default/21.rom_ctrl_alert_test.808017451
97.40 0.07 96.96 0.00 93.26 0.14 97.88 0.03 100.00 0.00 98.68 0.33 97.58 0.00 97.44 0.00 /workspace/coverage/default/15.rom_ctrl_kmac_err_chk.3892236748
97.47 0.07 96.96 0.00 93.26 0.00 97.88 0.00 100.00 0.00 98.68 0.00 97.58 0.00 97.90 0.47 /workspace/coverage/cover_reg_top/7.rom_ctrl_tl_intg_err.4081616541
97.52 0.05 96.96 0.00 93.26 0.00 97.88 0.00 100.00 0.00 98.68 0.00 97.73 0.15 98.14 0.23 /workspace/coverage/cover_reg_top/15.rom_ctrl_passthru_mem_tl_intg_err.3769540366
97.55 0.03 96.96 0.00 93.26 0.00 97.88 0.00 100.00 0.00 98.68 0.00 97.73 0.00 98.37 0.23 /workspace/coverage/default/0.rom_ctrl_corrupt_sig_fatal_chk.4050322408
97.58 0.02 96.96 0.00 93.26 0.00 97.88 0.00 100.00 0.00 98.68 0.00 97.89 0.15 98.37 0.00 /workspace/coverage/cover_reg_top/10.rom_ctrl_same_csr_outstanding.4237649464
97.60 0.02 96.96 0.00 93.26 0.00 97.88 0.00 100.00 0.00 98.68 0.00 98.04 0.15 98.37 0.00 /workspace/coverage/default/32.rom_ctrl_max_throughput_chk.1669701292
97.62 0.02 96.96 0.00 93.40 0.14 97.88 0.00 100.00 0.00 98.68 0.00 98.04 0.00 98.37 0.00 /workspace/coverage/default/13.rom_ctrl_stress_all_with_rand_reset.2179905878


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_aliasing.3957233626
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_aliasing.4221597354
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_bit_bash.2693395867
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_bit_bash.659698016
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_hw_reset.3646035946
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_hw_reset.546206253
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_mem_rw_with_rand_reset.1260591163
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_mem_rw_with_rand_reset.1269930655
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_rw.2206679638
/workspace/coverage/cover_reg_top/0.rom_ctrl_csr_rw.3709581122
/workspace/coverage/cover_reg_top/0.rom_ctrl_mem_partial_access.330855927
/workspace/coverage/cover_reg_top/0.rom_ctrl_mem_partial_access.3923478046
/workspace/coverage/cover_reg_top/0.rom_ctrl_mem_walk.3229344085
/workspace/coverage/cover_reg_top/0.rom_ctrl_mem_walk.324622078
/workspace/coverage/cover_reg_top/0.rom_ctrl_passthru_mem_tl_intg_err.2650044214
/workspace/coverage/cover_reg_top/0.rom_ctrl_passthru_mem_tl_intg_err.658337881
/workspace/coverage/cover_reg_top/0.rom_ctrl_same_csr_outstanding.1203205873
/workspace/coverage/cover_reg_top/0.rom_ctrl_same_csr_outstanding.201151675
/workspace/coverage/cover_reg_top/0.rom_ctrl_tl_errors.1854438634
/workspace/coverage/cover_reg_top/0.rom_ctrl_tl_errors.1933095240
/workspace/coverage/cover_reg_top/0.rom_ctrl_tl_intg_err.1408869301
/workspace/coverage/cover_reg_top/0.rom_ctrl_tl_intg_err.3008747330
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_aliasing.3621632382
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_aliasing.3948435021
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_bit_bash.1250896122
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_bit_bash.2666211532
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_hw_reset.3721905891
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_hw_reset.4143965762
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_mem_rw_with_rand_reset.3340300840
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_mem_rw_with_rand_reset.3810601499
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_rw.3235064837
/workspace/coverage/cover_reg_top/1.rom_ctrl_csr_rw.3963971345
/workspace/coverage/cover_reg_top/1.rom_ctrl_mem_partial_access.3073725432
/workspace/coverage/cover_reg_top/1.rom_ctrl_mem_partial_access.4282125845
/workspace/coverage/cover_reg_top/1.rom_ctrl_mem_walk.2411614725
/workspace/coverage/cover_reg_top/1.rom_ctrl_mem_walk.4241278874
/workspace/coverage/cover_reg_top/1.rom_ctrl_passthru_mem_tl_intg_err.1490101512
/workspace/coverage/cover_reg_top/1.rom_ctrl_passthru_mem_tl_intg_err.2494252884
/workspace/coverage/cover_reg_top/1.rom_ctrl_same_csr_outstanding.1157707005
/workspace/coverage/cover_reg_top/1.rom_ctrl_same_csr_outstanding.175810966
/workspace/coverage/cover_reg_top/1.rom_ctrl_tl_errors.253233268
/workspace/coverage/cover_reg_top/1.rom_ctrl_tl_errors.566722801
/workspace/coverage/cover_reg_top/1.rom_ctrl_tl_intg_err.340084418
/workspace/coverage/cover_reg_top/1.rom_ctrl_tl_intg_err.344240911
/workspace/coverage/cover_reg_top/10.rom_ctrl_csr_mem_rw_with_rand_reset.212296814
/workspace/coverage/cover_reg_top/10.rom_ctrl_csr_mem_rw_with_rand_reset.3019562397
/workspace/coverage/cover_reg_top/10.rom_ctrl_csr_rw.2821829477
/workspace/coverage/cover_reg_top/10.rom_ctrl_csr_rw.3696279077
/workspace/coverage/cover_reg_top/10.rom_ctrl_passthru_mem_tl_intg_err.2132967902
/workspace/coverage/cover_reg_top/10.rom_ctrl_passthru_mem_tl_intg_err.2561027685
/workspace/coverage/cover_reg_top/10.rom_ctrl_same_csr_outstanding.2769364229
/workspace/coverage/cover_reg_top/10.rom_ctrl_tl_errors.1769110391
/workspace/coverage/cover_reg_top/10.rom_ctrl_tl_errors.527587353
/workspace/coverage/cover_reg_top/10.rom_ctrl_tl_intg_err.3168498613
/workspace/coverage/cover_reg_top/10.rom_ctrl_tl_intg_err.870304215
/workspace/coverage/cover_reg_top/11.rom_ctrl_csr_mem_rw_with_rand_reset.1627360587
/workspace/coverage/cover_reg_top/11.rom_ctrl_csr_mem_rw_with_rand_reset.4206137856
/workspace/coverage/cover_reg_top/11.rom_ctrl_csr_rw.1125028197
/workspace/coverage/cover_reg_top/11.rom_ctrl_csr_rw.2604587126
/workspace/coverage/cover_reg_top/11.rom_ctrl_passthru_mem_tl_intg_err.2633785186
/workspace/coverage/cover_reg_top/11.rom_ctrl_passthru_mem_tl_intg_err.2651533560
/workspace/coverage/cover_reg_top/11.rom_ctrl_same_csr_outstanding.1949576590
/workspace/coverage/cover_reg_top/11.rom_ctrl_same_csr_outstanding.3358271380
/workspace/coverage/cover_reg_top/11.rom_ctrl_tl_errors.119409798
/workspace/coverage/cover_reg_top/11.rom_ctrl_tl_errors.3525864558
/workspace/coverage/cover_reg_top/11.rom_ctrl_tl_intg_err.1458281822
/workspace/coverage/cover_reg_top/11.rom_ctrl_tl_intg_err.2878454737
/workspace/coverage/cover_reg_top/12.rom_ctrl_csr_mem_rw_with_rand_reset.1994014238
/workspace/coverage/cover_reg_top/12.rom_ctrl_csr_mem_rw_with_rand_reset.3303121166
/workspace/coverage/cover_reg_top/12.rom_ctrl_csr_rw.3897395962
/workspace/coverage/cover_reg_top/12.rom_ctrl_csr_rw.576184176
/workspace/coverage/cover_reg_top/12.rom_ctrl_passthru_mem_tl_intg_err.1244908737
/workspace/coverage/cover_reg_top/12.rom_ctrl_passthru_mem_tl_intg_err.975787201
/workspace/coverage/cover_reg_top/12.rom_ctrl_same_csr_outstanding.2223716776
/workspace/coverage/cover_reg_top/12.rom_ctrl_same_csr_outstanding.846570493
/workspace/coverage/cover_reg_top/12.rom_ctrl_tl_errors.1668439979
/workspace/coverage/cover_reg_top/12.rom_ctrl_tl_errors.2308687473
/workspace/coverage/cover_reg_top/12.rom_ctrl_tl_intg_err.3469535178
/workspace/coverage/cover_reg_top/12.rom_ctrl_tl_intg_err.483795730
/workspace/coverage/cover_reg_top/13.rom_ctrl_csr_mem_rw_with_rand_reset.1519777882
/workspace/coverage/cover_reg_top/13.rom_ctrl_csr_mem_rw_with_rand_reset.1699657783
/workspace/coverage/cover_reg_top/13.rom_ctrl_csr_rw.1208844637
/workspace/coverage/cover_reg_top/13.rom_ctrl_csr_rw.1913988802
/workspace/coverage/cover_reg_top/13.rom_ctrl_passthru_mem_tl_intg_err.3780519803
/workspace/coverage/cover_reg_top/13.rom_ctrl_passthru_mem_tl_intg_err.788643399
/workspace/coverage/cover_reg_top/13.rom_ctrl_same_csr_outstanding.3499419041
/workspace/coverage/cover_reg_top/13.rom_ctrl_same_csr_outstanding.40128283
/workspace/coverage/cover_reg_top/13.rom_ctrl_tl_errors.2781884181
/workspace/coverage/cover_reg_top/13.rom_ctrl_tl_errors.2840686193
/workspace/coverage/cover_reg_top/13.rom_ctrl_tl_intg_err.3454676496
/workspace/coverage/cover_reg_top/13.rom_ctrl_tl_intg_err.884928721
/workspace/coverage/cover_reg_top/14.rom_ctrl_csr_mem_rw_with_rand_reset.1563563028
/workspace/coverage/cover_reg_top/14.rom_ctrl_csr_mem_rw_with_rand_reset.2574971318
/workspace/coverage/cover_reg_top/14.rom_ctrl_csr_rw.4198377383
/workspace/coverage/cover_reg_top/14.rom_ctrl_csr_rw.643913465
/workspace/coverage/cover_reg_top/14.rom_ctrl_passthru_mem_tl_intg_err.2425079132
/workspace/coverage/cover_reg_top/14.rom_ctrl_passthru_mem_tl_intg_err.348397609
/workspace/coverage/cover_reg_top/14.rom_ctrl_same_csr_outstanding.2063950468
/workspace/coverage/cover_reg_top/14.rom_ctrl_same_csr_outstanding.3539972690
/workspace/coverage/cover_reg_top/14.rom_ctrl_tl_errors.1071186847
/workspace/coverage/cover_reg_top/14.rom_ctrl_tl_errors.1665363470
/workspace/coverage/cover_reg_top/14.rom_ctrl_tl_intg_err.1077485741
/workspace/coverage/cover_reg_top/14.rom_ctrl_tl_intg_err.2959317781
/workspace/coverage/cover_reg_top/15.rom_ctrl_csr_mem_rw_with_rand_reset.3258860537
/workspace/coverage/cover_reg_top/15.rom_ctrl_csr_mem_rw_with_rand_reset.3748025260
/workspace/coverage/cover_reg_top/15.rom_ctrl_csr_rw.1874739597
/workspace/coverage/cover_reg_top/15.rom_ctrl_csr_rw.2751954787
/workspace/coverage/cover_reg_top/15.rom_ctrl_passthru_mem_tl_intg_err.801863682
/workspace/coverage/cover_reg_top/15.rom_ctrl_same_csr_outstanding.1633027076
/workspace/coverage/cover_reg_top/15.rom_ctrl_same_csr_outstanding.2953776567
/workspace/coverage/cover_reg_top/15.rom_ctrl_tl_errors.2866212121
/workspace/coverage/cover_reg_top/15.rom_ctrl_tl_errors.3903668065
/workspace/coverage/cover_reg_top/15.rom_ctrl_tl_intg_err.2434976143
/workspace/coverage/cover_reg_top/15.rom_ctrl_tl_intg_err.40706269
/workspace/coverage/cover_reg_top/16.rom_ctrl_csr_mem_rw_with_rand_reset.2603231865
/workspace/coverage/cover_reg_top/16.rom_ctrl_csr_mem_rw_with_rand_reset.3282609848
/workspace/coverage/cover_reg_top/16.rom_ctrl_csr_rw.1128895575
/workspace/coverage/cover_reg_top/16.rom_ctrl_csr_rw.2930355276
/workspace/coverage/cover_reg_top/16.rom_ctrl_passthru_mem_tl_intg_err.190112230
/workspace/coverage/cover_reg_top/16.rom_ctrl_passthru_mem_tl_intg_err.3952014469
/workspace/coverage/cover_reg_top/16.rom_ctrl_same_csr_outstanding.232452469
/workspace/coverage/cover_reg_top/16.rom_ctrl_same_csr_outstanding.2584297833
/workspace/coverage/cover_reg_top/16.rom_ctrl_tl_errors.3343741624
/workspace/coverage/cover_reg_top/16.rom_ctrl_tl_errors.957380761
/workspace/coverage/cover_reg_top/16.rom_ctrl_tl_intg_err.2845715974
/workspace/coverage/cover_reg_top/16.rom_ctrl_tl_intg_err.3258294163
/workspace/coverage/cover_reg_top/17.rom_ctrl_csr_mem_rw_with_rand_reset.1069163418
/workspace/coverage/cover_reg_top/17.rom_ctrl_csr_mem_rw_with_rand_reset.2229983315
/workspace/coverage/cover_reg_top/17.rom_ctrl_csr_rw.2369522185
/workspace/coverage/cover_reg_top/17.rom_ctrl_csr_rw.945418707
/workspace/coverage/cover_reg_top/17.rom_ctrl_passthru_mem_tl_intg_err.2880456449
/workspace/coverage/cover_reg_top/17.rom_ctrl_passthru_mem_tl_intg_err.4153650648
/workspace/coverage/cover_reg_top/17.rom_ctrl_same_csr_outstanding.1959091921
/workspace/coverage/cover_reg_top/17.rom_ctrl_same_csr_outstanding.2727408434
/workspace/coverage/cover_reg_top/17.rom_ctrl_tl_errors.2778090898
/workspace/coverage/cover_reg_top/17.rom_ctrl_tl_errors.3103723785
/workspace/coverage/cover_reg_top/17.rom_ctrl_tl_intg_err.264111757
/workspace/coverage/cover_reg_top/18.rom_ctrl_csr_mem_rw_with_rand_reset.2527287112
/workspace/coverage/cover_reg_top/18.rom_ctrl_csr_mem_rw_with_rand_reset.4256174541
/workspace/coverage/cover_reg_top/18.rom_ctrl_csr_rw.1886932083
/workspace/coverage/cover_reg_top/18.rom_ctrl_csr_rw.3018470508
/workspace/coverage/cover_reg_top/18.rom_ctrl_passthru_mem_tl_intg_err.3044189897
/workspace/coverage/cover_reg_top/18.rom_ctrl_passthru_mem_tl_intg_err.3471274852
/workspace/coverage/cover_reg_top/18.rom_ctrl_same_csr_outstanding.1648109794
/workspace/coverage/cover_reg_top/18.rom_ctrl_same_csr_outstanding.2528113061
/workspace/coverage/cover_reg_top/18.rom_ctrl_tl_errors.1503944907
/workspace/coverage/cover_reg_top/18.rom_ctrl_tl_errors.2867498334
/workspace/coverage/cover_reg_top/18.rom_ctrl_tl_intg_err.2682495411
/workspace/coverage/cover_reg_top/18.rom_ctrl_tl_intg_err.916856017
/workspace/coverage/cover_reg_top/19.rom_ctrl_csr_mem_rw_with_rand_reset.2027860588
/workspace/coverage/cover_reg_top/19.rom_ctrl_csr_mem_rw_with_rand_reset.3695329888
/workspace/coverage/cover_reg_top/19.rom_ctrl_csr_rw.1906531360
/workspace/coverage/cover_reg_top/19.rom_ctrl_csr_rw.883438896
/workspace/coverage/cover_reg_top/19.rom_ctrl_passthru_mem_tl_intg_err.2153635743
/workspace/coverage/cover_reg_top/19.rom_ctrl_passthru_mem_tl_intg_err.3977903933
/workspace/coverage/cover_reg_top/19.rom_ctrl_same_csr_outstanding.1925927352
/workspace/coverage/cover_reg_top/19.rom_ctrl_same_csr_outstanding.3957615912
/workspace/coverage/cover_reg_top/19.rom_ctrl_tl_errors.2663695493
/workspace/coverage/cover_reg_top/19.rom_ctrl_tl_errors.3303014006
/workspace/coverage/cover_reg_top/19.rom_ctrl_tl_intg_err.1122641205
/workspace/coverage/cover_reg_top/19.rom_ctrl_tl_intg_err.2003480861
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_aliasing.1399227545
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_aliasing.995804969
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_bit_bash.3128240030
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_bit_bash.3755071490
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_hw_reset.1753175025
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_hw_reset.1969748369
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_mem_rw_with_rand_reset.2808958313
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_mem_rw_with_rand_reset.3934349549
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_rw.298873914
/workspace/coverage/cover_reg_top/2.rom_ctrl_csr_rw.83351953
/workspace/coverage/cover_reg_top/2.rom_ctrl_mem_partial_access.378285797
/workspace/coverage/cover_reg_top/2.rom_ctrl_mem_partial_access.747493510
/workspace/coverage/cover_reg_top/2.rom_ctrl_mem_walk.1389741383
/workspace/coverage/cover_reg_top/2.rom_ctrl_mem_walk.3163535138
/workspace/coverage/cover_reg_top/2.rom_ctrl_passthru_mem_tl_intg_err.4194097033
/workspace/coverage/cover_reg_top/2.rom_ctrl_passthru_mem_tl_intg_err.906920797
/workspace/coverage/cover_reg_top/2.rom_ctrl_same_csr_outstanding.1201279491
/workspace/coverage/cover_reg_top/2.rom_ctrl_same_csr_outstanding.939847788
/workspace/coverage/cover_reg_top/2.rom_ctrl_tl_errors.3916417228
/workspace/coverage/cover_reg_top/2.rom_ctrl_tl_errors.914885768
/workspace/coverage/cover_reg_top/2.rom_ctrl_tl_intg_err.3807695660
/workspace/coverage/cover_reg_top/2.rom_ctrl_tl_intg_err.693052758
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_aliasing.1055886080
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_aliasing.3309461319
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_bit_bash.4066461202
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_bit_bash.427446917
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_hw_reset.3287138407
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_hw_reset.646545236
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_mem_rw_with_rand_reset.1154687581
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_mem_rw_with_rand_reset.1719862376
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_rw.3115916348
/workspace/coverage/cover_reg_top/3.rom_ctrl_csr_rw.991053934
/workspace/coverage/cover_reg_top/3.rom_ctrl_mem_partial_access.127964143
/workspace/coverage/cover_reg_top/3.rom_ctrl_mem_partial_access.2398386258
/workspace/coverage/cover_reg_top/3.rom_ctrl_mem_walk.2624808207
/workspace/coverage/cover_reg_top/3.rom_ctrl_mem_walk.4020783399
/workspace/coverage/cover_reg_top/3.rom_ctrl_passthru_mem_tl_intg_err.1172822925
/workspace/coverage/cover_reg_top/3.rom_ctrl_passthru_mem_tl_intg_err.4218188190
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/workspace/coverage/default/43.rom_ctrl_stress_all.405063495
/workspace/coverage/default/43.rom_ctrl_stress_all_with_rand_reset.4233550497
/workspace/coverage/default/44.rom_ctrl_alert_test.1182443719
/workspace/coverage/default/44.rom_ctrl_alert_test.1287799906
/workspace/coverage/default/44.rom_ctrl_corrupt_sig_fatal_chk.1054836667
/workspace/coverage/default/44.rom_ctrl_corrupt_sig_fatal_chk.522003499
/workspace/coverage/default/44.rom_ctrl_kmac_err_chk.1407138132
/workspace/coverage/default/44.rom_ctrl_kmac_err_chk.3153968496
/workspace/coverage/default/44.rom_ctrl_max_throughput_chk.1637746865
/workspace/coverage/default/44.rom_ctrl_max_throughput_chk.2242046394
/workspace/coverage/default/44.rom_ctrl_smoke.3481704277
/workspace/coverage/default/44.rom_ctrl_smoke.40558038
/workspace/coverage/default/44.rom_ctrl_stress_all.2926538231
/workspace/coverage/default/44.rom_ctrl_stress_all.3724427489
/workspace/coverage/default/45.rom_ctrl_alert_test.1467716390
/workspace/coverage/default/45.rom_ctrl_alert_test.4006895535
/workspace/coverage/default/45.rom_ctrl_corrupt_sig_fatal_chk.2441683485
/workspace/coverage/default/45.rom_ctrl_corrupt_sig_fatal_chk.339129428
/workspace/coverage/default/45.rom_ctrl_kmac_err_chk.1616410718
/workspace/coverage/default/45.rom_ctrl_kmac_err_chk.2658079856
/workspace/coverage/default/45.rom_ctrl_max_throughput_chk.1909035425
/workspace/coverage/default/45.rom_ctrl_max_throughput_chk.3070678677
/workspace/coverage/default/45.rom_ctrl_smoke.1150908426
/workspace/coverage/default/45.rom_ctrl_smoke.1545755123
/workspace/coverage/default/45.rom_ctrl_stress_all.2851168829
/workspace/coverage/default/45.rom_ctrl_stress_all.352405162
/workspace/coverage/default/45.rom_ctrl_stress_all_with_rand_reset.2582817645
/workspace/coverage/default/46.rom_ctrl_alert_test.1201893016
/workspace/coverage/default/46.rom_ctrl_alert_test.1871319644
/workspace/coverage/default/46.rom_ctrl_corrupt_sig_fatal_chk.3433898589
/workspace/coverage/default/46.rom_ctrl_corrupt_sig_fatal_chk.673885401
/workspace/coverage/default/46.rom_ctrl_kmac_err_chk.2011470748
/workspace/coverage/default/46.rom_ctrl_kmac_err_chk.526218047
/workspace/coverage/default/46.rom_ctrl_max_throughput_chk.1435690638
/workspace/coverage/default/46.rom_ctrl_max_throughput_chk.3505743632
/workspace/coverage/default/46.rom_ctrl_smoke.2129689354
/workspace/coverage/default/46.rom_ctrl_smoke.3233495088
/workspace/coverage/default/46.rom_ctrl_stress_all.3864462606
/workspace/coverage/default/46.rom_ctrl_stress_all.430336915
/workspace/coverage/default/47.rom_ctrl_alert_test.1106057448
/workspace/coverage/default/47.rom_ctrl_alert_test.1938696178
/workspace/coverage/default/47.rom_ctrl_corrupt_sig_fatal_chk.3729011276
/workspace/coverage/default/47.rom_ctrl_corrupt_sig_fatal_chk.721644657
/workspace/coverage/default/47.rom_ctrl_kmac_err_chk.2952041733
/workspace/coverage/default/47.rom_ctrl_kmac_err_chk.4033732809
/workspace/coverage/default/47.rom_ctrl_max_throughput_chk.3455661137
/workspace/coverage/default/47.rom_ctrl_max_throughput_chk.438695806
/workspace/coverage/default/47.rom_ctrl_smoke.3312334007
/workspace/coverage/default/47.rom_ctrl_smoke.3511793199
/workspace/coverage/default/47.rom_ctrl_stress_all.2000886906
/workspace/coverage/default/47.rom_ctrl_stress_all.2435187001
/workspace/coverage/default/47.rom_ctrl_stress_all_with_rand_reset.3002718002
/workspace/coverage/default/48.rom_ctrl_alert_test.2010055434
/workspace/coverage/default/48.rom_ctrl_alert_test.383665469
/workspace/coverage/default/48.rom_ctrl_corrupt_sig_fatal_chk.2216153389
/workspace/coverage/default/48.rom_ctrl_corrupt_sig_fatal_chk.3432813872
/workspace/coverage/default/48.rom_ctrl_kmac_err_chk.2102320969
/workspace/coverage/default/48.rom_ctrl_kmac_err_chk.3737562004
/workspace/coverage/default/48.rom_ctrl_max_throughput_chk.1236640132
/workspace/coverage/default/48.rom_ctrl_max_throughput_chk.2748626241
/workspace/coverage/default/48.rom_ctrl_smoke.1364908494
/workspace/coverage/default/48.rom_ctrl_smoke.2381276261
/workspace/coverage/default/48.rom_ctrl_stress_all.2791314334
/workspace/coverage/default/49.rom_ctrl_alert_test.2142116818
/workspace/coverage/default/49.rom_ctrl_alert_test.3679475533
/workspace/coverage/default/49.rom_ctrl_corrupt_sig_fatal_chk.1363492090
/workspace/coverage/default/49.rom_ctrl_corrupt_sig_fatal_chk.3258210515
/workspace/coverage/default/49.rom_ctrl_kmac_err_chk.1969001724
/workspace/coverage/default/49.rom_ctrl_kmac_err_chk.2910228506
/workspace/coverage/default/49.rom_ctrl_max_throughput_chk.2271432049
/workspace/coverage/default/49.rom_ctrl_max_throughput_chk.2371446167
/workspace/coverage/default/49.rom_ctrl_smoke.2498338551
/workspace/coverage/default/49.rom_ctrl_smoke.2661409567
/workspace/coverage/default/49.rom_ctrl_stress_all.2476545668
/workspace/coverage/default/49.rom_ctrl_stress_all.399789104
/workspace/coverage/default/49.rom_ctrl_stress_all_with_rand_reset.1660682600
/workspace/coverage/default/5.rom_ctrl_alert_test.1115562846
/workspace/coverage/default/5.rom_ctrl_alert_test.1608971274
/workspace/coverage/default/5.rom_ctrl_corrupt_sig_fatal_chk.1130666608
/workspace/coverage/default/5.rom_ctrl_corrupt_sig_fatal_chk.860033536
/workspace/coverage/default/5.rom_ctrl_kmac_err_chk.3697440370
/workspace/coverage/default/5.rom_ctrl_kmac_err_chk.847944859
/workspace/coverage/default/5.rom_ctrl_max_throughput_chk.2121906735
/workspace/coverage/default/5.rom_ctrl_max_throughput_chk.3295768940
/workspace/coverage/default/5.rom_ctrl_smoke.1712704853
/workspace/coverage/default/5.rom_ctrl_smoke.2257777381
/workspace/coverage/default/5.rom_ctrl_stress_all.2311328878
/workspace/coverage/default/5.rom_ctrl_stress_all.2667401020
/workspace/coverage/default/5.rom_ctrl_stress_all_with_rand_reset.1408261395
/workspace/coverage/default/6.rom_ctrl_alert_test.1832510193
/workspace/coverage/default/6.rom_ctrl_alert_test.4060786981
/workspace/coverage/default/6.rom_ctrl_corrupt_sig_fatal_chk.3295114155
/workspace/coverage/default/6.rom_ctrl_corrupt_sig_fatal_chk.4138022696
/workspace/coverage/default/6.rom_ctrl_kmac_err_chk.2060869598
/workspace/coverage/default/6.rom_ctrl_kmac_err_chk.3161651562
/workspace/coverage/default/6.rom_ctrl_max_throughput_chk.1476057039
/workspace/coverage/default/6.rom_ctrl_max_throughput_chk.2782975068
/workspace/coverage/default/6.rom_ctrl_smoke.2381170170
/workspace/coverage/default/6.rom_ctrl_smoke.3781723229
/workspace/coverage/default/6.rom_ctrl_stress_all.2067835942
/workspace/coverage/default/6.rom_ctrl_stress_all.2594009450
/workspace/coverage/default/6.rom_ctrl_stress_all_with_rand_reset.1563430312
/workspace/coverage/default/7.rom_ctrl_alert_test.368376034
/workspace/coverage/default/7.rom_ctrl_alert_test.952743583
/workspace/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.2914505547
/workspace/coverage/default/7.rom_ctrl_kmac_err_chk.1425609230
/workspace/coverage/default/7.rom_ctrl_kmac_err_chk.3248900379
/workspace/coverage/default/7.rom_ctrl_max_throughput_chk.3423464636
/workspace/coverage/default/7.rom_ctrl_max_throughput_chk.615743313
/workspace/coverage/default/7.rom_ctrl_smoke.1914557877
/workspace/coverage/default/7.rom_ctrl_smoke.2772058632
/workspace/coverage/default/7.rom_ctrl_stress_all.759442767
/workspace/coverage/default/7.rom_ctrl_stress_all.857734415
/workspace/coverage/default/8.rom_ctrl_alert_test.2691749142
/workspace/coverage/default/8.rom_ctrl_alert_test.3756538288
/workspace/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.1475557896
/workspace/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.460907676
/workspace/coverage/default/8.rom_ctrl_kmac_err_chk.2354311026
/workspace/coverage/default/8.rom_ctrl_kmac_err_chk.2396708170
/workspace/coverage/default/8.rom_ctrl_max_throughput_chk.2970424262
/workspace/coverage/default/8.rom_ctrl_max_throughput_chk.856771178
/workspace/coverage/default/8.rom_ctrl_smoke.2158199972
/workspace/coverage/default/8.rom_ctrl_smoke.4073965652
/workspace/coverage/default/8.rom_ctrl_stress_all.1822577246
/workspace/coverage/default/8.rom_ctrl_stress_all.2995857225
/workspace/coverage/default/9.rom_ctrl_alert_test.1125347219
/workspace/coverage/default/9.rom_ctrl_alert_test.3983560703
/workspace/coverage/default/9.rom_ctrl_corrupt_sig_fatal_chk.3093157170
/workspace/coverage/default/9.rom_ctrl_corrupt_sig_fatal_chk.3528536127
/workspace/coverage/default/9.rom_ctrl_kmac_err_chk.2366658279
/workspace/coverage/default/9.rom_ctrl_kmac_err_chk.2570852447
/workspace/coverage/default/9.rom_ctrl_max_throughput_chk.3383404211
/workspace/coverage/default/9.rom_ctrl_max_throughput_chk.3440747545
/workspace/coverage/default/9.rom_ctrl_smoke.1320262789
/workspace/coverage/default/9.rom_ctrl_smoke.4220178022
/workspace/coverage/default/9.rom_ctrl_stress_all.1123398087
/workspace/coverage/default/9.rom_ctrl_stress_all.1631702824




Total test records in report: 930
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/10.rom_ctrl_kmac_err_chk.1028100218 Mar 31 12:45:47 PM PDT 24 Mar 31 12:46:20 PM PDT 24 16962286729 ps
T2 /workspace/coverage/default/49.rom_ctrl_kmac_err_chk.1969001724 Mar 31 12:47:29 PM PDT 24 Mar 31 12:47:39 PM PDT 24 168748712 ps
T3 /workspace/coverage/default/23.rom_ctrl_smoke.3239152202 Mar 31 12:28:44 PM PDT 24 Mar 31 12:28:54 PM PDT 24 188717349 ps
T4 /workspace/coverage/default/34.rom_ctrl_corrupt_sig_fatal_chk.1106369850 Mar 31 12:29:57 PM PDT 24 Mar 31 12:31:43 PM PDT 24 7271453577 ps
T5 /workspace/coverage/default/10.rom_ctrl_max_throughput_chk.1523204018 Mar 31 12:45:46 PM PDT 24 Mar 31 12:45:55 PM PDT 24 919608794 ps
T6 /workspace/coverage/default/15.rom_ctrl_max_throughput_chk.3979908113 Mar 31 12:28:43 PM PDT 24 Mar 31 12:28:57 PM PDT 24 5652608673 ps
T7 /workspace/coverage/default/12.rom_ctrl_kmac_err_chk.1692554886 Mar 31 12:45:54 PM PDT 24 Mar 31 12:46:27 PM PDT 24 29242816938 ps
T8 /workspace/coverage/default/13.rom_ctrl_kmac_err_chk.420437088 Mar 31 12:45:54 PM PDT 24 Mar 31 12:46:06 PM PDT 24 1440106679 ps
T9 /workspace/coverage/default/8.rom_ctrl_max_throughput_chk.856771178 Mar 31 12:28:39 PM PDT 24 Mar 31 12:28:49 PM PDT 24 2848645877 ps
T10 /workspace/coverage/default/12.rom_ctrl_stress_all_with_rand_reset.2468350708 Mar 31 12:28:39 PM PDT 24 Mar 31 12:40:05 PM PDT 24 50366431783 ps
T16 /workspace/coverage/default/48.rom_ctrl_kmac_err_chk.3737562004 Mar 31 12:47:23 PM PDT 24 Mar 31 12:47:45 PM PDT 24 4080719693 ps
T17 /workspace/coverage/default/15.rom_ctrl_kmac_err_chk.3892236748 Mar 31 12:28:43 PM PDT 24 Mar 31 12:28:53 PM PDT 24 1843732712 ps
T13 /workspace/coverage/default/37.rom_ctrl_max_throughput_chk.4083547041 Mar 31 12:29:19 PM PDT 24 Mar 31 12:29:25 PM PDT 24 389051394 ps
T11 /workspace/coverage/default/38.rom_ctrl_smoke.3153774811 Mar 31 12:47:02 PM PDT 24 Mar 31 12:47:26 PM PDT 24 4373886519 ps
T12 /workspace/coverage/default/46.rom_ctrl_smoke.2129689354 Mar 31 12:28:57 PM PDT 24 Mar 31 12:29:07 PM PDT 24 188165094 ps
T59 /workspace/coverage/default/22.rom_ctrl_kmac_err_chk.1623074892 Mar 31 12:28:46 PM PDT 24 Mar 31 12:28:56 PM PDT 24 1105004608 ps
T14 /workspace/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.3593808353 Mar 31 12:28:52 PM PDT 24 Mar 31 12:32:14 PM PDT 24 14372569533 ps
T20 /workspace/coverage/default/43.rom_ctrl_kmac_err_chk.3284731539 Mar 31 12:47:19 PM PDT 24 Mar 31 12:47:44 PM PDT 24 10414794662 ps
T15 /workspace/coverage/default/48.rom_ctrl_stress_all.2060927019 Mar 31 12:47:23 PM PDT 24 Mar 31 12:47:43 PM PDT 24 389157439 ps
T70 /workspace/coverage/default/6.rom_ctrl_smoke.3781723229 Mar 31 12:45:38 PM PDT 24 Mar 31 12:46:03 PM PDT 24 8603067034 ps
T71 /workspace/coverage/default/36.rom_ctrl_stress_all.1325964504 Mar 31 12:29:56 PM PDT 24 Mar 31 12:30:09 PM PDT 24 2271339507 ps
T72 /workspace/coverage/default/14.rom_ctrl_kmac_err_chk.2309019031 Mar 31 12:28:39 PM PDT 24 Mar 31 12:28:50 PM PDT 24 258215923 ps
T21 /workspace/coverage/default/17.rom_ctrl_corrupt_sig_fatal_chk.4085663263 Mar 31 12:46:10 PM PDT 24 Mar 31 12:47:13 PM PDT 24 4184123108 ps
T63 /workspace/coverage/default/13.rom_ctrl_smoke.3316483876 Mar 31 12:45:53 PM PDT 24 Mar 31 12:46:16 PM PDT 24 10326213563 ps
T73 /workspace/coverage/default/41.rom_ctrl_kmac_err_chk.2341380971 Mar 31 12:47:11 PM PDT 24 Mar 31 12:47:39 PM PDT 24 3093027090 ps
T74 /workspace/coverage/default/27.rom_ctrl_max_throughput_chk.2204498289 Mar 31 12:29:11 PM PDT 24 Mar 31 12:29:28 PM PDT 24 5919013983 ps
T22 /workspace/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.460907676 Mar 31 12:45:47 PM PDT 24 Mar 31 12:50:08 PM PDT 24 80479212156 ps
T30 /workspace/coverage/default/3.rom_ctrl_sec_cm.2755564378 Mar 31 12:28:34 PM PDT 24 Mar 31 12:30:20 PM PDT 24 6890964001 ps
T44 /workspace/coverage/default/35.rom_ctrl_max_throughput_chk.1288444573 Mar 31 12:28:57 PM PDT 24 Mar 31 12:29:14 PM PDT 24 8126975648 ps
T45 /workspace/coverage/default/3.rom_ctrl_stress_all.2959473586 Mar 31 12:28:30 PM PDT 24 Mar 31 12:29:03 PM PDT 24 2138585177 ps
T33 /workspace/coverage/default/47.rom_ctrl_alert_test.1938696178 Mar 31 12:29:02 PM PDT 24 Mar 31 12:29:06 PM PDT 24 175148661 ps
T34 /workspace/coverage/default/37.rom_ctrl_alert_test.2786750939 Mar 31 12:47:00 PM PDT 24 Mar 31 12:47:10 PM PDT 24 4094528582 ps
T46 /workspace/coverage/default/29.rom_ctrl_max_throughput_chk.1858163624 Mar 31 12:46:41 PM PDT 24 Mar 31 12:46:57 PM PDT 24 11811644002 ps
T47 /workspace/coverage/default/5.rom_ctrl_kmac_err_chk.3697440370 Mar 31 12:45:39 PM PDT 24 Mar 31 12:46:12 PM PDT 24 4303277469 ps
T48 /workspace/coverage/default/41.rom_ctrl_smoke.3518737038 Mar 31 12:47:12 PM PDT 24 Mar 31 12:47:43 PM PDT 24 6189363657 ps
T35 /workspace/coverage/default/8.rom_ctrl_alert_test.3756538288 Mar 31 12:28:33 PM PDT 24 Mar 31 12:28:47 PM PDT 24 1487103273 ps
T49 /workspace/coverage/default/48.rom_ctrl_alert_test.2010055434 Mar 31 12:47:22 PM PDT 24 Mar 31 12:47:38 PM PDT 24 7271240133 ps
T143 /workspace/coverage/default/46.rom_ctrl_kmac_err_chk.2011470748 Mar 31 12:47:17 PM PDT 24 Mar 31 12:47:26 PM PDT 24 756773635 ps
T118 /workspace/coverage/default/49.rom_ctrl_max_throughput_chk.2371446167 Mar 31 12:47:23 PM PDT 24 Mar 31 12:47:33 PM PDT 24 2766075992 ps
T119 /workspace/coverage/default/44.rom_ctrl_stress_all.2926538231 Mar 31 12:47:15 PM PDT 24 Mar 31 12:48:07 PM PDT 24 5778137105 ps
T36 /workspace/coverage/default/43.rom_ctrl_alert_test.427592431 Mar 31 12:47:14 PM PDT 24 Mar 31 12:47:28 PM PDT 24 4742767785 ps
T67 /workspace/coverage/default/23.rom_ctrl_alert_test.3701740478 Mar 31 12:28:42 PM PDT 24 Mar 31 12:28:55 PM PDT 24 1337026826 ps
T139 /workspace/coverage/default/1.rom_ctrl_max_throughput_chk.3822340482 Mar 31 12:28:29 PM PDT 24 Mar 31 12:28:41 PM PDT 24 2065937033 ps
T138 /workspace/coverage/default/26.rom_ctrl_smoke.3664887153 Mar 31 12:28:43 PM PDT 24 Mar 31 12:28:52 PM PDT 24 364207285 ps
T142 /workspace/coverage/default/47.rom_ctrl_kmac_err_chk.4033732809 Mar 31 12:47:21 PM PDT 24 Mar 31 12:47:34 PM PDT 24 1318179354 ps
T18 /workspace/coverage/default/30.rom_ctrl_corrupt_sig_fatal_chk.3625663948 Mar 31 12:29:17 PM PDT 24 Mar 31 12:35:12 PM PDT 24 124916770817 ps
T68 /workspace/coverage/default/21.rom_ctrl_alert_test.808017451 Mar 31 12:28:43 PM PDT 24 Mar 31 12:28:59 PM PDT 24 3760445082 ps
T140 /workspace/coverage/default/8.rom_ctrl_stress_all.1822577246 Mar 31 12:28:40 PM PDT 24 Mar 31 12:29:06 PM PDT 24 3493257103 ps
T137 /workspace/coverage/default/28.rom_ctrl_smoke.2491276864 Mar 31 12:28:38 PM PDT 24 Mar 31 12:28:47 PM PDT 24 715281480 ps
T83 /workspace/coverage/default/17.rom_ctrl_smoke.3490742255 Mar 31 12:28:47 PM PDT 24 Mar 31 12:29:21 PM PDT 24 7151741665 ps
T84 /workspace/coverage/default/12.rom_ctrl_smoke.3502069978 Mar 31 12:45:53 PM PDT 24 Mar 31 12:46:18 PM PDT 24 13263702715 ps
T85 /workspace/coverage/default/33.rom_ctrl_smoke.2691319719 Mar 31 12:29:01 PM PDT 24 Mar 31 12:29:17 PM PDT 24 843015336 ps
T136 /workspace/coverage/default/15.rom_ctrl_max_throughput_chk.1807360903 Mar 31 12:46:01 PM PDT 24 Mar 31 12:46:13 PM PDT 24 4256978913 ps
T86 /workspace/coverage/default/45.rom_ctrl_stress_all.2851168829 Mar 31 12:29:55 PM PDT 24 Mar 31 12:30:27 PM PDT 24 6467586118 ps
T144 /workspace/coverage/default/39.rom_ctrl_max_throughput_chk.253535746 Mar 31 12:29:03 PM PDT 24 Mar 31 12:29:09 PM PDT 24 195410482 ps
T87 /workspace/coverage/default/11.rom_ctrl_smoke.2418344649 Mar 31 12:45:55 PM PDT 24 Mar 31 12:46:29 PM PDT 24 21539346499 ps
T88 /workspace/coverage/default/6.rom_ctrl_stress_all.2594009450 Mar 31 12:28:50 PM PDT 24 Mar 31 12:29:04 PM PDT 24 288153789 ps
T50 /workspace/coverage/default/35.rom_ctrl_corrupt_sig_fatal_chk.1556392040 Mar 31 12:29:01 PM PDT 24 Mar 31 12:33:47 PM PDT 24 248840474255 ps
T145 /workspace/coverage/default/14.rom_ctrl_max_throughput_chk.2785353510 Mar 31 12:46:01 PM PDT 24 Mar 31 12:46:14 PM PDT 24 5105961232 ps
T146 /workspace/coverage/default/21.rom_ctrl_kmac_err_chk.1463173478 Mar 31 12:46:16 PM PDT 24 Mar 31 12:46:25 PM PDT 24 693590366 ps
T24 /workspace/coverage/default/22.rom_ctrl_stress_all_with_rand_reset.2820244964 Mar 31 12:28:44 PM PDT 24 Mar 31 12:36:35 PM PDT 24 43158654081 ps
T51 /workspace/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.2914505547 Mar 31 12:45:39 PM PDT 24 Mar 31 12:48:25 PM PDT 24 10483995747 ps
T147 /workspace/coverage/default/41.rom_ctrl_max_throughput_chk.4263755001 Mar 31 12:29:24 PM PDT 24 Mar 31 12:29:40 PM PDT 24 15035268156 ps
T69 /workspace/coverage/default/26.rom_ctrl_alert_test.1785449564 Mar 31 12:28:49 PM PDT 24 Mar 31 12:28:54 PM PDT 24 320361550 ps
T141 /workspace/coverage/default/45.rom_ctrl_stress_all.352405162 Mar 31 12:47:17 PM PDT 24 Mar 31 12:47:48 PM PDT 24 5618073227 ps
T23 /workspace/coverage/default/21.rom_ctrl_corrupt_sig_fatal_chk.2213814120 Mar 31 12:28:43 PM PDT 24 Mar 31 12:31:41 PM PDT 24 5098656931 ps
T148 /workspace/coverage/default/44.rom_ctrl_kmac_err_chk.1407138132 Mar 31 12:47:17 PM PDT 24 Mar 31 12:47:40 PM PDT 24 7085424394 ps
T52 /workspace/coverage/default/48.rom_ctrl_corrupt_sig_fatal_chk.2216153389 Mar 31 12:47:29 PM PDT 24 Mar 31 12:49:42 PM PDT 24 22351228726 ps
T25 /workspace/coverage/default/38.rom_ctrl_stress_all_with_rand_reset.2092542419 Mar 31 12:47:00 PM PDT 24 Mar 31 02:47:07 PM PDT 24 32461451088 ps
T149 /workspace/coverage/default/36.rom_ctrl_stress_all.2847939056 Mar 31 12:46:51 PM PDT 24 Mar 31 12:47:08 PM PDT 24 908553805 ps
T150 /workspace/coverage/default/36.rom_ctrl_alert_test.1503758886 Mar 31 12:46:53 PM PDT 24 Mar 31 12:46:57 PM PDT 24 232961924 ps
T151 /workspace/coverage/default/24.rom_ctrl_alert_test.1513930714 Mar 31 12:28:49 PM PDT 24 Mar 31 12:28:53 PM PDT 24 171422344 ps
T152 /workspace/coverage/default/20.rom_ctrl_alert_test.479975323 Mar 31 12:28:51 PM PDT 24 Mar 31 12:28:57 PM PDT 24 303296200 ps
T153 /workspace/coverage/default/32.rom_ctrl_smoke.815283467 Mar 31 12:46:44 PM PDT 24 Mar 31 12:46:54 PM PDT 24 716525109 ps
T154 /workspace/coverage/default/11.rom_ctrl_corrupt_sig_fatal_chk.3360669878 Mar 31 12:28:31 PM PDT 24 Mar 31 12:30:34 PM PDT 24 22662813637 ps
T155 /workspace/coverage/default/12.rom_ctrl_kmac_err_chk.1552498620 Mar 31 12:28:45 PM PDT 24 Mar 31 12:29:04 PM PDT 24 6216381594 ps
T156 /workspace/coverage/default/2.rom_ctrl_alert_test.1732707490 Mar 31 12:45:34 PM PDT 24 Mar 31 12:45:47 PM PDT 24 2923668546 ps
T157 /workspace/coverage/default/25.rom_ctrl_stress_all.2827036398 Mar 31 12:46:24 PM PDT 24 Mar 31 12:46:46 PM PDT 24 837584937 ps
T158 /workspace/coverage/default/5.rom_ctrl_stress_all.2311328878 Mar 31 12:28:23 PM PDT 24 Mar 31 12:28:46 PM PDT 24 1673872449 ps
T53 /workspace/coverage/default/40.rom_ctrl_corrupt_sig_fatal_chk.2427053800 Mar 31 12:47:12 PM PDT 24 Mar 31 12:48:38 PM PDT 24 1390748025 ps
T159 /workspace/coverage/default/8.rom_ctrl_smoke.2158199972 Mar 31 12:45:49 PM PDT 24 Mar 31 12:46:24 PM PDT 24 3403040016 ps
T160 /workspace/coverage/default/38.rom_ctrl_kmac_err_chk.936085253 Mar 31 12:47:02 PM PDT 24 Mar 31 12:47:32 PM PDT 24 3879920979 ps
T161 /workspace/coverage/default/16.rom_ctrl_stress_all.152303640 Mar 31 12:46:01 PM PDT 24 Mar 31 12:46:59 PM PDT 24 14222694385 ps
T162 /workspace/coverage/default/16.rom_ctrl_smoke.115323792 Mar 31 12:28:27 PM PDT 24 Mar 31 12:28:38 PM PDT 24 188558395 ps
T163 /workspace/coverage/default/45.rom_ctrl_corrupt_sig_fatal_chk.339129428 Mar 31 12:47:15 PM PDT 24 Mar 31 12:49:18 PM PDT 24 20363058988 ps
T164 /workspace/coverage/default/1.rom_ctrl_kmac_err_chk.2701780233 Mar 31 12:45:25 PM PDT 24 Mar 31 12:46:01 PM PDT 24 30529193934 ps
T165 /workspace/coverage/default/37.rom_ctrl_corrupt_sig_fatal_chk.3045987200 Mar 31 12:29:57 PM PDT 24 Mar 31 12:34:32 PM PDT 24 33154282452 ps
T166 /workspace/coverage/default/20.rom_ctrl_stress_all.3511456775 Mar 31 12:46:15 PM PDT 24 Mar 31 12:47:19 PM PDT 24 7952063963 ps
T167 /workspace/coverage/default/34.rom_ctrl_alert_test.3032704209 Mar 31 12:28:58 PM PDT 24 Mar 31 12:29:03 PM PDT 24 361647008 ps
T168 /workspace/coverage/default/9.rom_ctrl_smoke.1320262789 Mar 31 12:45:46 PM PDT 24 Mar 31 12:46:18 PM PDT 24 3003895829 ps
T169 /workspace/coverage/default/26.rom_ctrl_kmac_err_chk.2063559734 Mar 31 12:46:31 PM PDT 24 Mar 31 12:47:00 PM PDT 24 6310752154 ps
T170 /workspace/coverage/default/27.rom_ctrl_stress_all.4243298841 Mar 31 12:46:31 PM PDT 24 Mar 31 12:46:42 PM PDT 24 199109479 ps
T171 /workspace/coverage/default/40.rom_ctrl_stress_all.1744055191 Mar 31 12:29:56 PM PDT 24 Mar 31 12:30:31 PM PDT 24 6837625483 ps
T172 /workspace/coverage/default/23.rom_ctrl_smoke.1426764250 Mar 31 12:46:24 PM PDT 24 Mar 31 12:46:40 PM PDT 24 701841265 ps
T173 /workspace/coverage/default/45.rom_ctrl_max_throughput_chk.3070678677 Mar 31 12:47:17 PM PDT 24 Mar 31 12:47:29 PM PDT 24 1167732691 ps
T174 /workspace/coverage/default/23.rom_ctrl_corrupt_sig_fatal_chk.3739103091 Mar 31 12:29:10 PM PDT 24 Mar 31 12:30:51 PM PDT 24 1685463250 ps
T175 /workspace/coverage/default/38.rom_ctrl_alert_test.2849776988 Mar 31 12:29:56 PM PDT 24 Mar 31 12:30:00 PM PDT 24 920095964 ps
T176 /workspace/coverage/default/4.rom_ctrl_corrupt_sig_fatal_chk.1758198439 Mar 31 12:28:28 PM PDT 24 Mar 31 12:29:52 PM PDT 24 5102932352 ps
T177 /workspace/coverage/default/44.rom_ctrl_corrupt_sig_fatal_chk.522003499 Mar 31 12:29:19 PM PDT 24 Mar 31 12:30:38 PM PDT 24 7702417066 ps
T178 /workspace/coverage/default/5.rom_ctrl_kmac_err_chk.847944859 Mar 31 12:28:35 PM PDT 24 Mar 31 12:29:00 PM PDT 24 15452278479 ps
T179 /workspace/coverage/default/41.rom_ctrl_stress_all.3784879167 Mar 31 12:47:14 PM PDT 24 Mar 31 12:47:53 PM PDT 24 16606856921 ps
T180 /workspace/coverage/default/25.rom_ctrl_stress_all.1712129692 Mar 31 12:28:59 PM PDT 24 Mar 31 12:29:27 PM PDT 24 8011914019 ps
T181 /workspace/coverage/default/28.rom_ctrl_kmac_err_chk.1465263579 Mar 31 12:46:40 PM PDT 24 Mar 31 12:46:50 PM PDT 24 694725312 ps
T182 /workspace/coverage/default/30.rom_ctrl_kmac_err_chk.2382400417 Mar 31 12:28:52 PM PDT 24 Mar 31 12:29:24 PM PDT 24 15722150929 ps
T183 /workspace/coverage/default/45.rom_ctrl_alert_test.4006895535 Mar 31 12:28:45 PM PDT 24 Mar 31 12:28:59 PM PDT 24 16983810854 ps
T184 /workspace/coverage/default/4.rom_ctrl_max_throughput_chk.36796965 Mar 31 12:28:34 PM PDT 24 Mar 31 12:28:48 PM PDT 24 1330273370 ps
T185 /workspace/coverage/default/20.rom_ctrl_kmac_err_chk.700618766 Mar 31 12:46:24 PM PDT 24 Mar 31 12:46:34 PM PDT 24 175672564 ps
T186 /workspace/coverage/default/14.rom_ctrl_alert_test.3012528300 Mar 31 12:46:01 PM PDT 24 Mar 31 12:46:16 PM PDT 24 7088377313 ps
T187 /workspace/coverage/default/21.rom_ctrl_kmac_err_chk.1529478777 Mar 31 12:28:49 PM PDT 24 Mar 31 12:28:59 PM PDT 24 168454402 ps
T188 /workspace/coverage/default/33.rom_ctrl_smoke.4156647327 Mar 31 12:46:45 PM PDT 24 Mar 31 12:47:00 PM PDT 24 510031661 ps
T189 /workspace/coverage/default/27.rom_ctrl_kmac_err_chk.641715492 Mar 31 12:46:40 PM PDT 24 Mar 31 12:46:59 PM PDT 24 15500289054 ps
T190 /workspace/coverage/default/7.rom_ctrl_kmac_err_chk.1425609230 Mar 31 12:28:45 PM PDT 24 Mar 31 12:29:03 PM PDT 24 1380439023 ps
T191 /workspace/coverage/default/30.rom_ctrl_stress_all.2475009393 Mar 31 12:28:47 PM PDT 24 Mar 31 12:29:33 PM PDT 24 17372944394 ps
T192 /workspace/coverage/default/1.rom_ctrl_stress_all.2245713672 Mar 31 12:45:28 PM PDT 24 Mar 31 12:45:52 PM PDT 24 2053173836 ps
T193 /workspace/coverage/default/20.rom_ctrl_max_throughput_chk.283623216 Mar 31 12:46:24 PM PDT 24 Mar 31 12:46:42 PM PDT 24 2406956497 ps
T194 /workspace/coverage/default/36.rom_ctrl_max_throughput_chk.3254030113 Mar 31 12:29:14 PM PDT 24 Mar 31 12:29:27 PM PDT 24 2836466660 ps
T195 /workspace/coverage/default/30.rom_ctrl_max_throughput_chk.1314659490 Mar 31 12:46:40 PM PDT 24 Mar 31 12:46:58 PM PDT 24 5130776217 ps
T196 /workspace/coverage/default/39.rom_ctrl_max_throughput_chk.538148704 Mar 31 12:47:12 PM PDT 24 Mar 31 12:47:21 PM PDT 24 675980547 ps
T197 /workspace/coverage/default/27.rom_ctrl_alert_test.852920485 Mar 31 12:28:49 PM PDT 24 Mar 31 12:29:04 PM PDT 24 12520239108 ps
T198 /workspace/coverage/default/26.rom_ctrl_stress_all.2799898779 Mar 31 12:28:45 PM PDT 24 Mar 31 12:29:23 PM PDT 24 28418321801 ps
T199 /workspace/coverage/default/47.rom_ctrl_corrupt_sig_fatal_chk.721644657 Mar 31 12:47:21 PM PDT 24 Mar 31 12:53:11 PM PDT 24 34271513427 ps
T200 /workspace/coverage/default/38.rom_ctrl_kmac_err_chk.2020498700 Mar 31 12:29:25 PM PDT 24 Mar 31 12:29:45 PM PDT 24 5843679289 ps
T201 /workspace/coverage/default/46.rom_ctrl_max_throughput_chk.3505743632 Mar 31 12:28:49 PM PDT 24 Mar 31 12:28:59 PM PDT 24 3113734611 ps
T202 /workspace/coverage/default/19.rom_ctrl_corrupt_sig_fatal_chk.357826728 Mar 31 12:46:12 PM PDT 24 Mar 31 12:51:36 PM PDT 24 274926409527 ps
T203 /workspace/coverage/default/5.rom_ctrl_alert_test.1115562846 Mar 31 12:28:41 PM PDT 24 Mar 31 12:28:45 PM PDT 24 1038044695 ps
T204 /workspace/coverage/default/25.rom_ctrl_alert_test.1895878324 Mar 31 12:46:31 PM PDT 24 Mar 31 12:46:42 PM PDT 24 1624291532 ps
T205 /workspace/coverage/default/11.rom_ctrl_max_throughput_chk.3723487167 Mar 31 12:28:34 PM PDT 24 Mar 31 12:28:41 PM PDT 24 1524298406 ps
T206 /workspace/coverage/default/22.rom_ctrl_alert_test.768174485 Mar 31 12:46:23 PM PDT 24 Mar 31 12:46:35 PM PDT 24 1278678141 ps
T207 /workspace/coverage/default/0.rom_ctrl_corrupt_sig_fatal_chk.4050322408 Mar 31 12:45:27 PM PDT 24 Mar 31 12:46:35 PM PDT 24 1099925357 ps
T29 /workspace/coverage/default/49.rom_ctrl_stress_all_with_rand_reset.1923188992 Mar 31 12:28:50 PM PDT 24 Mar 31 01:49:38 PM PDT 24 47840044963 ps
T208 /workspace/coverage/default/39.rom_ctrl_kmac_err_chk.3359289765 Mar 31 12:29:54 PM PDT 24 Mar 31 12:30:25 PM PDT 24 3736835876 ps
T209 /workspace/coverage/default/25.rom_ctrl_corrupt_sig_fatal_chk.3783202238 Mar 31 12:46:26 PM PDT 24 Mar 31 12:48:13 PM PDT 24 7315103044 ps
T210 /workspace/coverage/default/34.rom_ctrl_smoke.2737510338 Mar 31 12:28:59 PM PDT 24 Mar 31 12:29:14 PM PDT 24 768362262 ps
T211 /workspace/coverage/default/13.rom_ctrl_smoke.2624520301 Mar 31 12:28:40 PM PDT 24 Mar 31 12:28:52 PM PDT 24 1684800995 ps
T212 /workspace/coverage/default/37.rom_ctrl_stress_all.2366389965 Mar 31 12:47:00 PM PDT 24 Mar 31 12:48:16 PM PDT 24 9487550174 ps
T213 /workspace/coverage/default/33.rom_ctrl_max_throughput_chk.1857949221 Mar 31 12:46:46 PM PDT 24 Mar 31 12:46:59 PM PDT 24 1218272373 ps
T214 /workspace/coverage/default/33.rom_ctrl_kmac_err_chk.3113557118 Mar 31 12:46:44 PM PDT 24 Mar 31 12:47:02 PM PDT 24 1394188474 ps
T215 /workspace/coverage/default/28.rom_ctrl_corrupt_sig_fatal_chk.2422121528 Mar 31 12:46:41 PM PDT 24 Mar 31 12:50:25 PM PDT 24 73025481004 ps
T216 /workspace/coverage/default/49.rom_ctrl_corrupt_sig_fatal_chk.3258210515 Mar 31 12:29:00 PM PDT 24 Mar 31 12:33:16 PM PDT 24 135600220952 ps
T217 /workspace/coverage/default/45.rom_ctrl_kmac_err_chk.2658079856 Mar 31 12:47:15 PM PDT 24 Mar 31 12:47:38 PM PDT 24 2516282798 ps
T218 /workspace/coverage/default/18.rom_ctrl_corrupt_sig_fatal_chk.423456475 Mar 31 12:28:56 PM PDT 24 Mar 31 12:30:11 PM PDT 24 2173602960 ps
T219 /workspace/coverage/default/30.rom_ctrl_alert_test.1701729483 Mar 31 12:28:45 PM PDT 24 Mar 31 12:28:55 PM PDT 24 883524027 ps
T220 /workspace/coverage/default/46.rom_ctrl_alert_test.1201893016 Mar 31 12:29:03 PM PDT 24 Mar 31 12:29:13 PM PDT 24 862622702 ps
T26 /workspace/coverage/default/13.rom_ctrl_stress_all_with_rand_reset.2179905878 Mar 31 12:45:54 PM PDT 24 Mar 31 02:11:30 PM PDT 24 131661268250 ps
T221 /workspace/coverage/default/43.rom_ctrl_max_throughput_chk.1536463538 Mar 31 12:28:51 PM PDT 24 Mar 31 12:29:05 PM PDT 24 1487937237 ps
T54 /workspace/coverage/default/35.rom_ctrl_stress_all_with_rand_reset.3112550689 Mar 31 12:46:54 PM PDT 24 Mar 31 01:12:29 PM PDT 24 72615764639 ps
T222 /workspace/coverage/default/31.rom_ctrl_alert_test.3082860049 Mar 31 12:46:46 PM PDT 24 Mar 31 12:47:01 PM PDT 24 7518371109 ps
T223 /workspace/coverage/default/7.rom_ctrl_smoke.1914557877 Mar 31 12:28:33 PM PDT 24 Mar 31 12:29:04 PM PDT 24 11388523880 ps
T224 /workspace/coverage/default/6.rom_ctrl_kmac_err_chk.3161651562 Mar 31 12:45:40 PM PDT 24 Mar 31 12:46:13 PM PDT 24 15413214705 ps
T225 /workspace/coverage/default/4.rom_ctrl_smoke.798768907 Mar 31 12:28:40 PM PDT 24 Mar 31 12:28:50 PM PDT 24 784782430 ps
T226 /workspace/coverage/default/0.rom_ctrl_alert_test.2523620315 Mar 31 12:45:25 PM PDT 24 Mar 31 12:45:40 PM PDT 24 8413418077 ps
T227 /workspace/coverage/default/2.rom_ctrl_kmac_err_chk.456106275 Mar 31 12:28:27 PM PDT 24 Mar 31 12:28:57 PM PDT 24 13928290161 ps
T228 /workspace/coverage/default/14.rom_ctrl_corrupt_sig_fatal_chk.1619774994 Mar 31 12:46:01 PM PDT 24 Mar 31 12:51:01 PM PDT 24 32494940069 ps
T229 /workspace/coverage/default/29.rom_ctrl_alert_test.1493795153 Mar 31 12:46:41 PM PDT 24 Mar 31 12:46:47 PM PDT 24 173961997 ps
T230 /workspace/coverage/default/0.rom_ctrl_stress_all.130378310 Mar 31 12:45:26 PM PDT 24 Mar 31 12:46:03 PM PDT 24 16501674469 ps
T231 /workspace/coverage/default/2.rom_ctrl_smoke.2697561358 Mar 31 12:45:33 PM PDT 24 Mar 31 12:45:43 PM PDT 24 189990751 ps
T232 /workspace/coverage/default/41.rom_ctrl_corrupt_sig_fatal_chk.2825522129 Mar 31 12:29:14 PM PDT 24 Mar 31 12:32:54 PM PDT 24 496178320332 ps
T233 /workspace/coverage/default/47.rom_ctrl_max_throughput_chk.438695806 Mar 31 12:28:47 PM PDT 24 Mar 31 12:29:01 PM PDT 24 10177986008 ps
T55 /workspace/coverage/default/31.rom_ctrl_stress_all_with_rand_reset.2159300053 Mar 31 12:29:54 PM PDT 24 Mar 31 12:58:00 PM PDT 24 25091125055 ps
T234 /workspace/coverage/default/16.rom_ctrl_smoke.4291838981 Mar 31 12:46:06 PM PDT 24 Mar 31 12:46:41 PM PDT 24 3536939497 ps
T235 /workspace/coverage/default/16.rom_ctrl_max_throughput_chk.2520905852 Mar 31 12:28:41 PM PDT 24 Mar 31 12:28:47 PM PDT 24 530609323 ps
T236 /workspace/coverage/default/0.rom_ctrl_smoke.3801936814 Mar 31 12:28:30 PM PDT 24 Mar 31 12:28:48 PM PDT 24 2538125859 ps
T237 /workspace/coverage/default/49.rom_ctrl_stress_all.399789104 Mar 31 12:28:53 PM PDT 24 Mar 31 12:29:28 PM PDT 24 23550494095 ps
T238 /workspace/coverage/default/45.rom_ctrl_alert_test.1467716390 Mar 31 12:47:14 PM PDT 24 Mar 31 12:47:26 PM PDT 24 20534412717 ps
T239 /workspace/coverage/default/23.rom_ctrl_max_throughput_chk.3609492428 Mar 31 12:29:21 PM PDT 24 Mar 31 12:29:34 PM PDT 24 1083283033 ps
T240 /workspace/coverage/default/37.rom_ctrl_max_throughput_chk.3042743880 Mar 31 12:47:03 PM PDT 24 Mar 31 12:47:17 PM PDT 24 2562428142 ps
T241 /workspace/coverage/default/49.rom_ctrl_smoke.2498338551 Mar 31 12:28:55 PM PDT 24 Mar 31 12:29:05 PM PDT 24 742883445 ps
T242 /workspace/coverage/default/14.rom_ctrl_stress_all.895972547 Mar 31 12:46:04 PM PDT 24 Mar 31 12:46:36 PM PDT 24 1821628150 ps
T243 /workspace/coverage/default/16.rom_ctrl_stress_all.1571212617 Mar 31 12:28:44 PM PDT 24 Mar 31 12:28:52 PM PDT 24 182719786 ps
T244 /workspace/coverage/default/18.rom_ctrl_smoke.3906458797 Mar 31 12:46:14 PM PDT 24 Mar 31 12:46:28 PM PDT 24 693582092 ps
T245 /workspace/coverage/default/21.rom_ctrl_smoke.2437210770 Mar 31 12:46:17 PM PDT 24 Mar 31 12:46:58 PM PDT 24 17745270852 ps
T246 /workspace/coverage/default/34.rom_ctrl_max_throughput_chk.4111630671 Mar 31 12:46:54 PM PDT 24 Mar 31 12:47:00 PM PDT 24 105627311 ps
T247 /workspace/coverage/default/2.rom_ctrl_alert_test.90483101 Mar 31 12:28:41 PM PDT 24 Mar 31 12:28:54 PM PDT 24 21635290104 ps
T248 /workspace/coverage/default/33.rom_ctrl_alert_test.497769666 Mar 31 12:28:47 PM PDT 24 Mar 31 12:28:52 PM PDT 24 827814361 ps
T56 /workspace/coverage/default/5.rom_ctrl_stress_all_with_rand_reset.1408261395 Mar 31 12:28:29 PM PDT 24 Mar 31 01:12:40 PM PDT 24 126907078584 ps
T249 /workspace/coverage/default/19.rom_ctrl_max_throughput_chk.1432759707 Mar 31 12:46:13 PM PDT 24 Mar 31 12:46:19 PM PDT 24 206111992 ps
T57 /workspace/coverage/default/30.rom_ctrl_stress_all_with_rand_reset.96293572 Mar 31 12:28:46 PM PDT 24 Mar 31 01:13:03 PM PDT 24 139711127487 ps
T250 /workspace/coverage/default/40.rom_ctrl_stress_all.3155309172 Mar 31 12:47:08 PM PDT 24 Mar 31 12:47:41 PM PDT 24 5839199366 ps
T251 /workspace/coverage/default/26.rom_ctrl_kmac_err_chk.2107419596 Mar 31 12:28:48 PM PDT 24 Mar 31 12:29:21 PM PDT 24 4403446810 ps
T252 /workspace/coverage/default/14.rom_ctrl_smoke.2922485450 Mar 31 12:46:01 PM PDT 24 Mar 31 12:46:32 PM PDT 24 3403862093 ps
T31 /workspace/coverage/default/3.rom_ctrl_sec_cm.3068039720 Mar 31 12:45:32 PM PDT 24 Mar 31 12:47:19 PM PDT 24 29856455937 ps
T253 /workspace/coverage/default/32.rom_ctrl_alert_test.1287068239 Mar 31 12:46:46 PM PDT 24 Mar 31 12:46:51 PM PDT 24 171579499 ps
T254 /workspace/coverage/default/42.rom_ctrl_smoke.3985820962 Mar 31 12:29:01 PM PDT 24 Mar 31 12:29:11 PM PDT 24 717095768 ps
T19 /workspace/coverage/default/13.rom_ctrl_stress_all.755014361 Mar 31 12:45:51 PM PDT 24 Mar 31 12:46:24 PM PDT 24 6038616413 ps
T255 /workspace/coverage/default/37.rom_ctrl_stress_all.2516959899 Mar 31 12:29:48 PM PDT 24 Mar 31 12:30:33 PM PDT 24 3821600126 ps
T256 /workspace/coverage/default/25.rom_ctrl_kmac_err_chk.134493153 Mar 31 12:46:27 PM PDT 24 Mar 31 12:46:58 PM PDT 24 15670921804 ps
T257 /workspace/coverage/default/10.rom_ctrl_kmac_err_chk.2438486739 Mar 31 12:28:44 PM PDT 24 Mar 31 12:28:53 PM PDT 24 347096187 ps
T258 /workspace/coverage/default/9.rom_ctrl_smoke.4220178022 Mar 31 12:28:36 PM PDT 24 Mar 31 12:29:15 PM PDT 24 6629874794 ps
T259 /workspace/coverage/default/33.rom_ctrl_stress_all.2001811358 Mar 31 12:28:59 PM PDT 24 Mar 31 12:29:14 PM PDT 24 5660052936 ps
T58 /workspace/coverage/default/43.rom_ctrl_stress_all_with_rand_reset.4233550497 Mar 31 12:29:01 PM PDT 24 Mar 31 01:03:42 PM PDT 24 73183459383 ps
T260 /workspace/coverage/default/43.rom_ctrl_stress_all.405063495 Mar 31 12:47:17 PM PDT 24 Mar 31 12:48:41 PM PDT 24 35486844925 ps
T261 /workspace/coverage/default/22.rom_ctrl_corrupt_sig_fatal_chk.1215400478 Mar 31 12:46:21 PM PDT 24 Mar 31 12:47:24 PM PDT 24 1086503081 ps
T262 /workspace/coverage/default/27.rom_ctrl_kmac_err_chk.4263301907 Mar 31 12:28:45 PM PDT 24 Mar 31 12:29:09 PM PDT 24 2647224889 ps
T263 /workspace/coverage/default/12.rom_ctrl_smoke.2941111245 Mar 31 12:28:34 PM PDT 24 Mar 31 12:28:54 PM PDT 24 7805485459 ps
T264 /workspace/coverage/default/6.rom_ctrl_max_throughput_chk.2782975068 Mar 31 12:28:39 PM PDT 24 Mar 31 12:28:51 PM PDT 24 4261434827 ps
T265 /workspace/coverage/default/5.rom_ctrl_stress_all.2667401020 Mar 31 12:45:39 PM PDT 24 Mar 31 12:45:49 PM PDT 24 194370042 ps
T266 /workspace/coverage/default/40.rom_ctrl_alert_test.1108996859 Mar 31 12:47:12 PM PDT 24 Mar 31 12:47:24 PM PDT 24 1364774978 ps
T32 /workspace/coverage/default/4.rom_ctrl_sec_cm.1997597549 Mar 31 12:45:39 PM PDT 24 Mar 31 12:46:33 PM PDT 24 245816098 ps
T267 /workspace/coverage/default/15.rom_ctrl_smoke.1752422612 Mar 31 12:28:39 PM PDT 24 Mar 31 12:29:13 PM PDT 24 4426666795 ps
T268 /workspace/coverage/default/34.rom_ctrl_alert_test.3390534033 Mar 31 12:46:51 PM PDT 24 Mar 31 12:46:55 PM PDT 24 215249278 ps
T269 /workspace/coverage/default/0.rom_ctrl_kmac_err_chk.1904378375 Mar 31 12:28:45 PM PDT 24 Mar 31 12:28:56 PM PDT 24 1670898660 ps
T270 /workspace/coverage/default/22.rom_ctrl_alert_test.316757364 Mar 31 12:28:43 PM PDT 24 Mar 31 12:28:58 PM PDT 24 8068342486 ps
T271 /workspace/coverage/default/28.rom_ctrl_kmac_err_chk.3280199973 Mar 31 12:28:43 PM PDT 24 Mar 31 12:29:04 PM PDT 24 1803808824 ps
T272 /workspace/coverage/default/32.rom_ctrl_stress_all_with_rand_reset.416906684 Mar 31 12:46:46 PM PDT 24 Mar 31 01:52:04 PM PDT 24 200312065865 ps
T273 /workspace/coverage/default/39.rom_ctrl_smoke.2705740262 Mar 31 12:47:01 PM PDT 24 Mar 31 12:47:19 PM PDT 24 1908977317 ps
T274 /workspace/coverage/default/4.rom_ctrl_alert_test.356519709 Mar 31 12:28:42 PM PDT 24 Mar 31 12:28:56 PM PDT 24 1680895517 ps
T275 /workspace/coverage/default/41.rom_ctrl_corrupt_sig_fatal_chk.795137871 Mar 31 12:47:10 PM PDT 24 Mar 31 12:48:55 PM PDT 24 1975932985 ps
T276 /workspace/coverage/default/41.rom_ctrl_alert_test.1582549641 Mar 31 12:29:19 PM PDT 24 Mar 31 12:29:29 PM PDT 24 5443672258 ps
T277 /workspace/coverage/default/2.rom_ctrl_max_throughput_chk.598392389 Mar 31 12:28:30 PM PDT 24 Mar 31 12:28:36 PM PDT 24 369772540 ps
T27 /workspace/coverage/default/6.rom_ctrl_stress_all_with_rand_reset.1563430312 Mar 31 12:28:32 PM PDT 24 Mar 31 12:38:21 PM PDT 24 15733288537 ps
T278 /workspace/coverage/default/46.rom_ctrl_stress_all.430336915 Mar 31 12:28:55 PM PDT 24 Mar 31 12:29:20 PM PDT 24 3693104042 ps
T37 /workspace/coverage/default/0.rom_ctrl_sec_cm.816574354 Mar 31 12:28:32 PM PDT 24 Mar 31 12:30:11 PM PDT 24 418485668 ps
T279 /workspace/coverage/default/4.rom_ctrl_kmac_err_chk.3523559615 Mar 31 12:45:40 PM PDT 24 Mar 31 12:46:14 PM PDT 24 4262798294 ps
T38 /workspace/coverage/default/2.rom_ctrl_sec_cm.1274534331 Mar 31 12:45:32 PM PDT 24 Mar 31 12:47:13 PM PDT 24 582009227 ps
T280 /workspace/coverage/default/19.rom_ctrl_alert_test.1431777377 Mar 31 12:28:45 PM PDT 24 Mar 31 12:28:56 PM PDT 24 1032487516 ps
T281 /workspace/coverage/default/33.rom_ctrl_stress_all.1562363376 Mar 31 12:46:45 PM PDT 24 Mar 31 12:47:40 PM PDT 24 5284978057 ps
T282 /workspace/coverage/default/18.rom_ctrl_stress_all_with_rand_reset.941770171 Mar 31 12:46:10 PM PDT 24 Mar 31 01:18:23 PM PDT 24 185545659637 ps
T28 /workspace/coverage/default/41.rom_ctrl_stress_all_with_rand_reset.560164661 Mar 31 12:47:09 PM PDT 24 Mar 31 02:12:10 PM PDT 24 276491090034 ps
T283 /workspace/coverage/default/30.rom_ctrl_smoke.3796340933 Mar 31 12:28:45 PM PDT 24 Mar 31 12:29:06 PM PDT 24 6235467050 ps
T284 /workspace/coverage/default/19.rom_ctrl_smoke.58104680 Mar 31 12:46:09 PM PDT 24 Mar 31 12:46:43 PM PDT 24 4283695315 ps
T285 /workspace/coverage/default/15.rom_ctrl_smoke.2486462103 Mar 31 12:46:00 PM PDT 24 Mar 31 12:46:22 PM PDT 24 7097494990 ps
T286 /workspace/coverage/default/29.rom_ctrl_smoke.2443950255 Mar 31 12:46:39 PM PDT 24 Mar 31 12:46:54 PM PDT 24 1733881396 ps
T287 /workspace/coverage/default/27.rom_ctrl_alert_test.9263844 Mar 31 12:46:42 PM PDT 24 Mar 31 12:46:57 PM PDT 24 3696098519 ps
T288 /workspace/coverage/default/4.rom_ctrl_stress_all.2340947363 Mar 31 12:28:45 PM PDT 24 Mar 31 12:28:54 PM PDT 24 353646962 ps
T289 /workspace/coverage/default/6.rom_ctrl_kmac_err_chk.2060869598 Mar 31 12:28:44 PM PDT 24 Mar 31 12:28:54 PM PDT 24 250346479 ps
T290 /workspace/coverage/default/0.rom_ctrl_stress_all.3356073531 Mar 31 12:28:30 PM PDT 24 Mar 31 12:28:36 PM PDT 24 109573765 ps
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T301 /workspace/coverage/default/36.rom_ctrl_corrupt_sig_fatal_chk.1110471994 Mar 31 12:46:56 PM PDT 24 Mar 31 12:51:05 PM PDT 24 18896087667 ps
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T313 /workspace/coverage/default/40.rom_ctrl_max_throughput_chk.769857429 Mar 31 12:47:12 PM PDT 24 Mar 31 12:47:23 PM PDT 24 2998712168 ps
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