Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	98440	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1874505

1

T1

3

T2

8

T4

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	533408	1			T1	3		T2	62		T4	78
values[0x0]	706702	1			T12	10414		T17	14344		T18	14785
values[0x1]	732835	1			T12	10891		T17	14785		T18	15383

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49515	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1923430

1

T1

3

T2

40

T4

50

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7532	1			T12	293		T62	2		T17	139
valid_sources[0x01]	7466	1			T2	1		T10	1		T12	79
valid_sources[0x02]	7478	1			T4	1		T9	2		T12	60
valid_sources[0x03]	7812	1			T10	3		T12	77		T14	11
valid_sources[0x04]	6766	1			T10	1		T12	109		T61	5
valid_sources[0x05]	7980	1			T4	2		T10	4		T12	183
valid_sources[0x06]	7072	1			T12	200		T13	1		T61	3
valid_sources[0x07]	8219	1			T10	2		T12	255		T13	5
valid_sources[0x08]	8493	1			T10	1		T12	240		T17	169
valid_sources[0x09]	6857	1			T10	1		T12	76		T61	1
valid_sources[0x0a]	7013	1			T12	125		T62	1		T17	193
valid_sources[0x0b]	6758	1			T12	97		T61	1		T62	1
valid_sources[0x0c]	8490	1			T8	2		T9	2		T10	1
valid_sources[0x0d]	7620	1			T12	136		T61	1		T17	141
valid_sources[0x0e]	7070	1			T2	1		T12	134		T17	153
valid_sources[0x0f]	8347	1			T12	54		T62	1		T17	146
valid_sources[0x10]	7891	1			T10	3		T12	100		T61	1
valid_sources[0x11]	8024	1			T2	1		T12	58		T61	1
valid_sources[0x12]	8360	1			T10	2		T12	171		T62	2
valid_sources[0x13]	8133	1			T10	1		T12	65		T17	174
valid_sources[0x14]	8138	1			T12	26		T17	168		T87	1
valid_sources[0x15]	8368	1			T10	1		T12	138		T61	1
valid_sources[0x16]	7991	1			T9	5		T10	1		T12	108
valid_sources[0x17]	8045	1			T10	2		T12	104		T61	1
valid_sources[0x18]	7242	1			T4	1		T12	150		T62	4
valid_sources[0x19]	7601	1			T12	88		T61	1		T62	1
valid_sources[0x1a]	7272	1			T12	70		T15	1		T61	2
valid_sources[0x1b]	7745	1			T2	1		T12	93		T61	2
valid_sources[0x1c]	8520	1			T10	1		T12	72		T28	2
valid_sources[0x1d]	8854	1			T2	1		T10	1		T12	120
valid_sources[0x1e]	8079	1			T10	2		T12	80		T61	1
valid_sources[0x1f]	7285	1			T10	1		T12	216		T17	109
valid_sources[0x20]	6815	1			T12	91		T61	1		T16	7
valid_sources[0x21]	7565	1			T2	1		T8	4		T12	86
valid_sources[0x22]	7077	1			T12	45		T61	1		T62	2
valid_sources[0x23]	7744	1			T2	1		T4	1		T10	2
valid_sources[0x24]	6879	1			T12	74		T61	1		T17	124
valid_sources[0x25]	8466	1			T10	2		T12	116		T61	2
valid_sources[0x26]	7534	1			T2	3		T12	231		T61	1
valid_sources[0x27]	8091	1			T12	105		T62	1		T17	174
valid_sources[0x28]	7914	1			T2	2		T10	1		T12	93
valid_sources[0x29]	9343	1			T2	2		T10	2		T12	75
valid_sources[0x2a]	7163	1			T2	1		T10	2		T12	134
valid_sources[0x2b]	7351	1			T10	1		T12	106		T17	190
valid_sources[0x2c]	7320	1			T12	203		T28	1		T17	161
valid_sources[0x2d]	7386	1			T10	2		T12	130		T13	1
valid_sources[0x2e]	7180	1			T12	87		T62	1		T16	10
valid_sources[0x2f]	8091	1			T2	1		T9	2		T12	37
valid_sources[0x30]	7753	1			T10	1		T12	73		T62	1
valid_sources[0x31]	6863	1			T10	1		T12	80		T62	2
valid_sources[0x32]	7361	1			T12	183		T28	2		T62	3
valid_sources[0x33]	6596	1			T10	1		T12	35		T28	1
valid_sources[0x34]	7693	1			T4	1		T12	177		T13	5
valid_sources[0x35]	7760	1			T10	3		T12	121		T61	2
valid_sources[0x36]	8379	1			T4	1		T11	1		T12	168
valid_sources[0x37]	6861	1			T2	1		T10	1		T12	136
valid_sources[0x38]	6869	1			T4	3		T12	51		T61	1
valid_sources[0x39]	8462	1			T12	256		T61	1		T62	2
valid_sources[0x3a]	7330	1			T2	1		T10	2		T12	48
valid_sources[0x3b]	6816	1			T9	2		T10	1		T12	123
valid_sources[0x3c]	8187	1			T12	111		T62	1		T17	168
valid_sources[0x3d]	10108	1			T4	1		T12	123		T61	2
valid_sources[0x3e]	7242	1			T4	1		T12	52		T17	153
valid_sources[0x3f]	7803	1			T12	98		T62	3		T17	178
valid_sources[0x40]	7351	1			T12	124		T61	2		T16	14
valid_sources[0x41]	6718	1			T4	3		T10	1		T12	68
valid_sources[0x42]	7265	1			T10	1		T12	155		T61	2
valid_sources[0x43]	7302	1			T12	43		T17	205		T141	1
valid_sources[0x44]	7199	1			T2	1		T10	2		T12	223
valid_sources[0x45]	8218	1			T10	1		T12	47		T16	2
valid_sources[0x46]	8217	1			T8	2		T12	58		T17	115
valid_sources[0x47]	8719	1			T2	1		T4	1		T12	56
valid_sources[0x48]	8354	1			T9	4		T10	2		T12	88
valid_sources[0x49]	8658	1			T12	74		T61	1		T17	136
valid_sources[0x4a]	7331	1			T10	1		T12	60		T17	137
valid_sources[0x4b]	8153	1			T2	1		T4	1		T10	3
valid_sources[0x4c]	8577	1			T8	3		T9	4		T10	1
valid_sources[0x4d]	7352	1			T4	2		T10	2		T12	107
valid_sources[0x4e]	8645	1			T10	1		T12	121		T62	1
valid_sources[0x4f]	7558	1			T4	1		T12	209		T17	205
valid_sources[0x50]	7628	1			T4	3		T10	1		T12	100
valid_sources[0x51]	7458	1			T4	2		T9	1		T10	1
valid_sources[0x52]	6807	1			T12	138		T17	145		T120	1
valid_sources[0x53]	8144	1			T10	6		T12	195		T62	1
valid_sources[0x54]	7928	1			T12	66		T13	1		T17	179
valid_sources[0x55]	8035	1			T12	234		T62	1		T17	121
valid_sources[0x56]	8557	1			T2	1		T4	1		T12	160
valid_sources[0x57]	7106	1			T12	129		T14	10		T17	127
valid_sources[0x58]	7111	1			T9	4		T12	176		T17	119
valid_sources[0x59]	6991	1			T10	1		T12	185		T61	2
valid_sources[0x5a]	8529	1			T12	4		T28	1		T61	1
valid_sources[0x5b]	8588	1			T10	2		T12	61		T61	3
valid_sources[0x5c]	7463	1			T12	116		T17	134		T120	2
valid_sources[0x5d]	7491	1			T4	1		T12	43		T17	160
valid_sources[0x5e]	6939	1			T4	2		T10	1		T12	45
valid_sources[0x5f]	7232	1			T10	1		T12	37		T17	106
valid_sources[0x60]	7304	1			T4	1		T12	114		T17	151
valid_sources[0x61]	6887	1			T12	123		T16	9		T17	188
valid_sources[0x62]	7494	1			T10	1		T12	137		T17	105
valid_sources[0x63]	7225	1			T12	155		T14	8		T62	1
valid_sources[0x64]	7935	1			T12	218		T13	1		T17	152
valid_sources[0x65]	7086	1			T2	1		T10	3		T12	93
valid_sources[0x66]	7733	1			T4	1		T12	105		T13	1
valid_sources[0x67]	7239	1			T10	1		T12	43		T15	1
valid_sources[0x68]	8309	1			T9	2		T10	1		T12	141
valid_sources[0x69]	8143	1			T10	1		T12	34		T13	1
valid_sources[0x6a]	8284	1			T10	3		T12	174		T61	1
valid_sources[0x6b]	7688	1			T12	184		T13	2		T14	1
valid_sources[0x6c]	8363	1			T10	1		T12	40		T16	12
valid_sources[0x6d]	8801	1			T2	1		T8	3		T12	88
valid_sources[0x6e]	7597	1			T4	2		T8	9		T12	143
valid_sources[0x6f]	8439	1			T10	1		T12	58		T62	2
valid_sources[0x70]	6507	1			T2	1		T10	1		T12	60
valid_sources[0x71]	8528	1			T12	33		T61	3		T62	2
valid_sources[0x72]	8844	1			T2	1		T10	1		T12	37
valid_sources[0x73]	7211	1			T10	1		T12	77		T14	1
valid_sources[0x74]	8065	1			T10	1		T12	75		T61	1
valid_sources[0x75]	8771	1			T8	2		T10	1		T12	76
valid_sources[0x76]	6851	1			T10	1		T12	215		T14	7
valid_sources[0x77]	6850	1			T8	4		T10	2		T12	54
valid_sources[0x78]	8718	1			T4	3		T10	2		T12	169
valid_sources[0x79]	7892	1			T4	1		T10	1		T12	100
valid_sources[0x7a]	7777	1			T12	60		T62	1		T17	150
valid_sources[0x7b]	6955	1			T2	1		T10	1		T12	135
valid_sources[0x7c]	7524	1			T2	1		T10	1		T12	97
valid_sources[0x7d]	7304	1			T12	222		T61	1		T62	1
valid_sources[0x7e]	6891	1			T12	47		T17	182		T142	2
valid_sources[0x7f]	8070	1			T2	1		T4	1		T12	86
valid_sources[0x80]	7451	1			T10	2		T12	70		T61	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

473568

1

T1

3

T2

8

T4

8

values[0x0]

all_enables

biggest_size

700435

1

T12

10324

T17

14217

T18

14650

values[0x1]

all_enables

biggest_size

700502

1

T12

10429

T17

14119

T18

14675

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	148810	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1446689

1

T1

13

T2

12

T4

19

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	404206	1			T1	30		T2	32		T3	1
values[0x0]	552137	1			T12	7397		T34	7		T20	10
values[0x1]	639156	1			T12	8747		T34	7		T20	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69598	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1525901

1

T1

17

T2

17

T4

21

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6247	1			T4	1		T12	71		T28	4
valid_sources[0x01]	5967	1			T12	90		T17	110		T89	1
valid_sources[0x02]	6088	1			T1	30		T12	73		T17	118
valid_sources[0x03]	6070	1			T12	107		T17	113		T69	1
valid_sources[0x04]	5784	1			T12	85		T28	1		T17	120
valid_sources[0x05]	6660	1			T12	75		T17	121		T86	1
valid_sources[0x06]	6555	1			T12	91		T17	142		T51	1
valid_sources[0x07]	6034	1			T12	89		T28	1		T17	111
valid_sources[0x08]	6084	1			T12	78		T17	131		T143	1
valid_sources[0x09]	6441	1			T12	105		T17	111		T87	1
valid_sources[0x0a]	6427	1			T8	17		T11	1		T12	84
valid_sources[0x0b]	6596	1			T12	80		T17	122		T85	3
valid_sources[0x0c]	6903	1			T2	1		T12	91		T17	134
valid_sources[0x0d]	6737	1			T4	1		T12	87		T17	130
valid_sources[0x0e]	5786	1			T12	92		T17	140		T69	1
valid_sources[0x0f]	5692	1			T12	71		T17	94		T89	1
valid_sources[0x10]	5922	1			T12	83		T17	127		T52	1
valid_sources[0x11]	5693	1			T12	73		T17	113		T30	1
valid_sources[0x12]	6700	1			T12	82		T35	1		T17	147
valid_sources[0x13]	5710	1			T12	85		T17	138		T85	2
valid_sources[0x14]	5640	1			T12	90		T17	111		T87	1
valid_sources[0x15]	5701	1			T12	82		T17	137		T144	1
valid_sources[0x16]	6195	1			T12	91		T17	132		T87	1
valid_sources[0x17]	5819	1			T12	89		T17	137		T72	1
valid_sources[0x18]	6251	1			T2	1		T12	86		T35	1
valid_sources[0x19]	6207	1			T12	83		T17	107		T52	2
valid_sources[0x1a]	6045	1			T11	1		T12	91		T17	110
valid_sources[0x1b]	6309	1			T12	89		T17	121		T145	1
valid_sources[0x1c]	6924	1			T12	77		T17	101		T53	1
valid_sources[0x1d]	6229	1			T12	73		T34	4		T17	128
valid_sources[0x1e]	6249	1			T11	2		T12	71		T17	128
valid_sources[0x1f]	6660	1			T12	76		T17	129		T143	1
valid_sources[0x20]	5745	1			T11	1		T12	99		T17	138
valid_sources[0x21]	6231	1			T4	2		T12	90		T35	1
valid_sources[0x22]	6176	1			T12	96		T17	127		T146	2
valid_sources[0x23]	6448	1			T12	77		T17	85		T87	3
valid_sources[0x24]	5912	1			T11	1		T12	68		T17	143
valid_sources[0x25]	6767	1			T12	87		T29	4		T20	1
valid_sources[0x26]	6600	1			T4	4		T12	73		T17	144
valid_sources[0x27]	6515	1			T12	82		T27	2		T17	123
valid_sources[0x28]	6338	1			T12	92		T17	116		T69	1
valid_sources[0x29]	6419	1			T12	76		T17	124		T18	688
valid_sources[0x2a]	6078	1			T12	93		T17	116		T87	1
valid_sources[0x2b]	5794	1			T12	90		T20	1		T17	121
valid_sources[0x2c]	6348	1			T12	102		T17	114		T147	7
valid_sources[0x2d]	6870	1			T11	2		T12	83		T17	101
valid_sources[0x2e]	5685	1			T4	3		T12	74		T29	4
valid_sources[0x2f]	6075	1			T12	80		T17	92		T72	11
valid_sources[0x30]	6023	1			T12	92		T17	108		T85	1
valid_sources[0x31]	5801	1			T11	1		T12	106		T17	110
valid_sources[0x32]	5713	1			T12	85		T17	109		T70	1
valid_sources[0x33]	6222	1			T12	80		T17	143		T85	1
valid_sources[0x34]	5549	1			T12	84		T17	138		T52	3
valid_sources[0x35]	6792	1			T12	73		T17	131		T89	1
valid_sources[0x36]	5919	1			T12	87		T17	114		T86	2
valid_sources[0x37]	6100	1			T12	84		T17	122		T148	1
valid_sources[0x38]	6542	1			T12	75		T27	2		T17	116
valid_sources[0x39]	5775	1			T12	87		T17	110		T149	1
valid_sources[0x3a]	6026	1			T12	88		T20	3		T17	137
valid_sources[0x3b]	6256	1			T12	68		T17	120		T89	3
valid_sources[0x3c]	6729	1			T12	75		T17	117		T150	1
valid_sources[0x3d]	6200	1			T12	74		T29	3		T17	115
valid_sources[0x3e]	6860	1			T12	84		T20	2		T17	106
valid_sources[0x3f]	6866	1			T12	93		T17	102		T89	3
valid_sources[0x40]	5724	1			T2	1		T12	88		T17	117
valid_sources[0x41]	6487	1			T2	1		T12	74		T17	122
valid_sources[0x42]	5847	1			T2	1		T12	72		T17	133
valid_sources[0x43]	6662	1			T12	71		T17	120		T151	2
valid_sources[0x44]	5746	1			T12	78		T27	3		T17	142
valid_sources[0x45]	6248	1			T11	1		T12	110		T17	98
valid_sources[0x46]	6485	1			T12	93		T17	127		T89	2
valid_sources[0x47]	5739	1			T12	93		T17	136		T152	1
valid_sources[0x48]	5965	1			T11	1		T12	93		T17	130
valid_sources[0x49]	7037	1			T12	88		T17	133		T51	1
valid_sources[0x4a]	5781	1			T12	91		T17	126		T143	2
valid_sources[0x4b]	6518	1			T12	83		T28	3		T17	111
valid_sources[0x4c]	6121	1			T2	1		T11	2		T12	87
valid_sources[0x4d]	6214	1			T12	88		T17	93		T143	1
valid_sources[0x4e]	6190	1			T11	1		T12	94		T17	106
valid_sources[0x4f]	6754	1			T12	73		T17	136		T146	11
valid_sources[0x50]	6415	1			T8	9		T12	84		T17	126
valid_sources[0x51]	6254	1			T12	63		T17	88		T86	2
valid_sources[0x52]	6296	1			T12	76		T27	1		T17	134
valid_sources[0x53]	6213	1			T12	102		T17	104		T18	450
valid_sources[0x54]	5933	1			T2	2		T12	72		T17	122
valid_sources[0x55]	5758	1			T12	66		T17	118		T86	2
valid_sources[0x56]	6462	1			T12	89		T17	127		T89	1
valid_sources[0x57]	6608	1			T12	75		T17	124		T85	1
valid_sources[0x58]	6590	1			T12	80		T35	1		T17	128
valid_sources[0x59]	6869	1			T12	80		T17	97		T85	1
valid_sources[0x5a]	6923	1			T12	83		T17	137		T139	1
valid_sources[0x5b]	6264	1			T12	90		T17	96		T51	1
valid_sources[0x5c]	6889	1			T12	98		T34	10		T17	117
valid_sources[0x5d]	6521	1			T2	1		T12	86		T17	100
valid_sources[0x5e]	5960	1			T12	85		T17	125		T89	1
valid_sources[0x5f]	6044	1			T12	94		T17	121		T54	1
valid_sources[0x60]	6273	1			T12	84		T35	1		T17	167
valid_sources[0x61]	6345	1			T12	75		T17	109		T87	1
valid_sources[0x62]	5905	1			T12	69		T17	130		T51	1
valid_sources[0x63]	6778	1			T12	96		T17	123		T85	1
valid_sources[0x64]	5986	1			T12	82		T17	96		T52	3
valid_sources[0x65]	6845	1			T12	83		T17	101		T18	574
valid_sources[0x66]	5585	1			T2	1		T11	1		T12	80
valid_sources[0x67]	6892	1			T2	1		T11	1		T12	75
valid_sources[0x68]	6081	1			T12	82		T17	105		T85	1
valid_sources[0x69]	6113	1			T12	97		T17	125		T53	1
valid_sources[0x6a]	6749	1			T11	1		T12	87		T17	105
valid_sources[0x6b]	5993	1			T11	1		T12	101		T27	1
valid_sources[0x6c]	5900	1			T2	1		T12	92		T17	153
valid_sources[0x6d]	6443	1			T12	92		T17	139		T51	1
valid_sources[0x6e]	7042	1			T12	110		T27	3		T17	115
valid_sources[0x6f]	6200	1			T12	60		T17	113		T85	2
valid_sources[0x70]	5415	1			T9	1		T12	78		T17	124
valid_sources[0x71]	6628	1			T12	78		T17	115		T18	62
valid_sources[0x72]	6149	1			T12	74		T17	124		T51	1
valid_sources[0x73]	6387	1			T12	108		T35	1		T17	131
valid_sources[0x74]	6030	1			T12	99		T27	1		T35	1
valid_sources[0x75]	6506	1			T11	1		T12	83		T17	115
valid_sources[0x76]	6036	1			T12	70		T17	122		T89	1
valid_sources[0x77]	6458	1			T12	80		T17	130		T18	211
valid_sources[0x78]	6099	1			T12	87		T17	148		T153	1
valid_sources[0x79]	5884	1			T5	1		T12	104		T27	2
valid_sources[0x7a]	5834	1			T12	77		T17	99		T18	209
valid_sources[0x7b]	6789	1			T12	74		T17	139		T18	197
valid_sources[0x7c]	5790	1			T12	95		T17	91		T54	4
valid_sources[0x7d]	6336	1			T12	78		T17	167		T143	1
valid_sources[0x7e]	5540	1			T12	79		T17	129		T154	1
valid_sources[0x7f]	6047	1			T12	87		T17	153		T51	1
valid_sources[0x80]	6117	1			T12	93		T17	102		T153	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

366803

1

T1

13

T2

12

T4

19

values[0x0]

all_enables

biggest_size

540100

1

T12

7232

T34

3

T20

3

values[0x1]

all_enables

biggest_size

539786

1

T12

7400

T20

4

T35

1