Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	82325	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2071071

1

T1

6

T3

19

T4

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	560221	1			T1	6		T3	272		T4	3
values[0x0]	782544	1			T11	19712		T18	19355		T19	74973
values[0x1]	810631	1			T11	20201		T18	20217		T19	78079

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42568	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

2110828

1

T1

6

T3

152

T4

3

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8205	1			T5	1		T10	4		T14	1
valid_sources[0x01]	10656	1			T10	2		T11	205		T18	180
valid_sources[0x02]	8792	1			T3	1		T11	231		T56	2
valid_sources[0x03]	7338	1			T10	1		T11	205		T18	200
valid_sources[0x04]	7815	1			T3	1		T10	1		T11	171
valid_sources[0x05]	8169	1			T3	1		T11	209		T12	2
valid_sources[0x06]	7908	1			T3	2		T10	1		T11	211
valid_sources[0x07]	7418	1			T7	2		T10	4		T11	199
valid_sources[0x08]	7637	1			T7	1		T10	1		T11	187
valid_sources[0x09]	6910	1			T7	2		T10	3		T11	201
valid_sources[0x0a]	8454	1			T5	5		T10	1		T11	197
valid_sources[0x0b]	7703	1			T10	6		T11	187		T56	2
valid_sources[0x0c]	9135	1			T3	1		T11	189		T56	1
valid_sources[0x0d]	7629	1			T3	1		T10	2		T11	241
valid_sources[0x0e]	6380	1			T3	1		T5	1		T10	2
valid_sources[0x0f]	8067	1			T3	1		T10	1		T11	218
valid_sources[0x10]	7606	1			T10	1		T11	198		T13	1
valid_sources[0x11]	6828	1			T3	1		T11	189		T16	2
valid_sources[0x12]	7083	1			T3	2		T7	2		T11	189
valid_sources[0x13]	8419	1			T3	1		T11	203		T132	3
valid_sources[0x14]	7450	1			T10	2		T11	199		T132	1
valid_sources[0x15]	10414	1			T10	4		T11	198		T56	1
valid_sources[0x16]	8867	1			T5	1		T10	2		T11	191
valid_sources[0x17]	6513	1			T10	3		T11	244		T18	227
valid_sources[0x18]	8188	1			T10	1		T11	202		T56	1
valid_sources[0x19]	7363	1			T3	2		T10	3		T11	185
valid_sources[0x1a]	10068	1			T1	6		T3	1		T10	1
valid_sources[0x1b]	7002	1			T10	1		T11	195		T133	1
valid_sources[0x1c]	8752	1			T3	4		T10	2		T11	224
valid_sources[0x1d]	8023	1			T3	1		T11	213		T16	1
valid_sources[0x1e]	7622	1			T5	1		T7	1		T11	204
valid_sources[0x1f]	7374	1			T10	3		T11	211		T56	1
valid_sources[0x20]	10013	1			T4	3		T5	1		T10	2
valid_sources[0x21]	7981	1			T7	1		T10	4		T11	186
valid_sources[0x22]	7524	1			T7	2		T10	4		T11	232
valid_sources[0x23]	7805	1			T5	2		T7	1		T11	202
valid_sources[0x24]	8571	1			T10	2		T11	229		T134	3
valid_sources[0x25]	7413	1			T5	1		T11	191		T56	4
valid_sources[0x26]	9099	1			T3	2		T10	1		T11	197
valid_sources[0x27]	10083	1			T3	2		T10	3		T11	220
valid_sources[0x28]	9927	1			T3	5		T5	2		T10	4
valid_sources[0x29]	8618	1			T11	195		T29	1		T56	3
valid_sources[0x2a]	8855	1			T7	1		T10	1		T11	237
valid_sources[0x2b]	8245	1			T3	3		T5	1		T10	1
valid_sources[0x2c]	8521	1			T11	194		T56	6		T18	219
valid_sources[0x2d]	7576	1			T3	1		T11	171		T117	17
valid_sources[0x2e]	8154	1			T3	4		T10	2		T11	200
valid_sources[0x2f]	8774	1			T3	1		T7	3		T11	211
valid_sources[0x30]	6636	1			T3	2		T10	1		T11	175
valid_sources[0x31]	10895	1			T3	1		T7	2		T10	1
valid_sources[0x32]	7237	1			T10	3		T11	202		T134	3
valid_sources[0x33]	7237	1			T10	3		T11	193		T56	1
valid_sources[0x34]	9501	1			T3	1		T7	2		T11	224
valid_sources[0x35]	7928	1			T7	1		T10	1		T11	207
valid_sources[0x36]	9004	1			T5	1		T10	1		T11	205
valid_sources[0x37]	8245	1			T11	256		T16	2		T134	2
valid_sources[0x38]	8840	1			T3	1		T10	3		T11	192
valid_sources[0x39]	7936	1			T3	3		T7	4		T10	2
valid_sources[0x3a]	7270	1			T3	1		T11	191		T16	1
valid_sources[0x3b]	6645	1			T3	4		T10	2		T11	190
valid_sources[0x3c]	7842	1			T10	1		T11	241		T56	1
valid_sources[0x3d]	7814	1			T3	3		T7	1		T10	3
valid_sources[0x3e]	8917	1			T7	1		T10	1		T11	246
valid_sources[0x3f]	9553	1			T3	1		T10	1		T11	226
valid_sources[0x40]	7961	1			T3	4		T10	1		T11	208
valid_sources[0x41]	8458	1			T10	2		T11	209		T56	1
valid_sources[0x42]	9202	1			T10	4		T11	232		T16	3
valid_sources[0x43]	7400	1			T3	2		T7	2		T10	1
valid_sources[0x44]	10002	1			T3	2		T11	199		T133	1
valid_sources[0x45]	8437	1			T3	1		T5	2		T11	236
valid_sources[0x46]	7140	1			T11	223		T16	5		T12	1
valid_sources[0x47]	9075	1			T3	3		T10	2		T11	218
valid_sources[0x48]	8629	1			T3	2		T11	198		T56	1
valid_sources[0x49]	7114	1			T3	2		T11	193		T56	5
valid_sources[0x4a]	9004	1			T3	7		T7	2		T10	2
valid_sources[0x4b]	8703	1			T3	1		T10	1		T11	230
valid_sources[0x4c]	8406	1			T11	212		T56	1		T13	1
valid_sources[0x4d]	8468	1			T11	217		T133	1		T18	215
valid_sources[0x4e]	11721	1			T3	3		T11	242		T56	1
valid_sources[0x4f]	6662	1			T10	3		T11	195		T56	3
valid_sources[0x50]	7391	1			T3	3		T10	1		T11	206
valid_sources[0x51]	10810	1			T5	2		T10	3		T11	212
valid_sources[0x52]	7458	1			T10	1		T11	224		T13	1
valid_sources[0x53]	6900	1			T3	1		T5	2		T10	2
valid_sources[0x54]	7949	1			T7	1		T10	3		T11	195
valid_sources[0x55]	8824	1			T3	1		T6	39		T10	2
valid_sources[0x56]	10072	1			T3	3		T10	1		T11	202
valid_sources[0x57]	8743	1			T3	1		T11	228		T76	1
valid_sources[0x58]	7076	1			T10	5		T11	166		T56	2
valid_sources[0x59]	8742	1			T3	3		T10	4		T11	186
valid_sources[0x5a]	9259	1			T3	3		T5	1		T10	3
valid_sources[0x5b]	6902	1			T3	2		T10	1		T11	208
valid_sources[0x5c]	7483	1			T5	1		T11	198		T56	2
valid_sources[0x5d]	8087	1			T3	1		T7	1		T11	211
valid_sources[0x5e]	8885	1			T3	2		T10	1		T11	238
valid_sources[0x5f]	10104	1			T10	3		T11	219		T134	1
valid_sources[0x60]	9723	1			T3	1		T5	2		T10	1
valid_sources[0x61]	7482	1			T3	4		T5	1		T7	1
valid_sources[0x62]	10375	1			T3	3		T5	1		T7	1
valid_sources[0x63]	8969	1			T3	2		T10	1		T11	194
valid_sources[0x64]	9631	1			T3	2		T10	3		T11	234
valid_sources[0x65]	6499	1			T3	2		T10	2		T11	184
valid_sources[0x66]	6797	1			T3	5		T10	2		T11	225
valid_sources[0x67]	7009	1			T11	218		T56	1		T18	198
valid_sources[0x68]	6325	1			T10	2		T11	196		T56	1
valid_sources[0x69]	7106	1			T3	2		T7	1		T11	217
valid_sources[0x6a]	11914	1			T3	1		T10	1		T11	228
valid_sources[0x6b]	7054	1			T10	2		T11	199		T18	231
valid_sources[0x6c]	8473	1			T3	2		T7	1		T10	1
valid_sources[0x6d]	7195	1			T5	1		T11	211		T12	1
valid_sources[0x6e]	8480	1			T7	1		T10	2		T11	249
valid_sources[0x6f]	7702	1			T3	2		T11	239		T56	1
valid_sources[0x70]	8129	1			T7	1		T11	212		T134	2
valid_sources[0x71]	8118	1			T3	1		T9	23		T10	1
valid_sources[0x72]	7579	1			T11	237		T12	1		T13	1
valid_sources[0x73]	9470	1			T3	1		T7	1		T10	1
valid_sources[0x74]	7898	1			T10	1		T11	198		T12	1
valid_sources[0x75]	7804	1			T10	3		T11	208		T16	1
valid_sources[0x76]	9157	1			T7	2		T10	3		T11	214
valid_sources[0x77]	8243	1			T11	204		T48	2		T18	246
valid_sources[0x78]	8638	1			T7	1		T10	1		T11	215
valid_sources[0x79]	8756	1			T3	3		T7	1		T11	231
valid_sources[0x7a]	9914	1			T3	2		T10	4		T11	240
valid_sources[0x7b]	10247	1			T10	1		T11	199		T56	1
valid_sources[0x7c]	9302	1			T7	4		T14	1		T11	222
valid_sources[0x7d]	7955	1			T11	208		T16	2		T18	192
valid_sources[0x7e]	11192	1			T3	1		T5	1		T10	4
valid_sources[0x7f]	8292	1			T5	5		T6	21		T11	231
valid_sources[0x80]	7308	1			T7	1		T11	212		T56	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

519573

1

T1

6

T3

19

T4

3

values[0x0]

all_enables

biggest_size

775751

1

T11

19537

T18

19189

T19

74287

values[0x1]

all_enables

biggest_size

775747

1

T11

19327

T18

19355

T19

74670

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	153307	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1595512

1

T1

5

T2

11

T4

7

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	437755	1			T1	20		T2	21		T4	13
values[0x0]	607394	1			T17	5		T11	15953		T33	5
values[0x1]	703670	1			T17	4		T11	18168		T33	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	68299	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1680520

1

T1

5

T2

11

T4

8

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6595	1			T11	161		T56	2		T18	418
valid_sources[0x01]	6586	1			T11	153		T117	1		T13	1
valid_sources[0x02]	6559	1			T11	154		T56	1		T18	2
valid_sources[0x03]	7020	1			T11	223		T18	142		T135	1
valid_sources[0x04]	7201	1			T11	195		T56	1		T13	1
valid_sources[0x05]	7978	1			T11	156		T76	2		T18	171
valid_sources[0x06]	7300	1			T11	179		T47	1		T76	1
valid_sources[0x07]	7763	1			T7	1		T11	203		T48	7
valid_sources[0x08]	6867	1			T11	164		T18	351		T19	679
valid_sources[0x09]	6419	1			T11	168		T77	2		T136	6
valid_sources[0x0a]	6843	1			T11	169		T76	3		T45	1
valid_sources[0x0b]	6786	1			T11	214		T46	1		T47	1
valid_sources[0x0c]	6551	1			T11	199		T29	2		T57	1
valid_sources[0x0d]	6794	1			T6	2		T11	156		T57	1
valid_sources[0x0e]	6637	1			T7	1		T11	198		T47	1
valid_sources[0x0f]	6330	1			T8	1		T11	133		T46	1
valid_sources[0x10]	6537	1			T6	1		T11	153		T57	1
valid_sources[0x11]	7977	1			T8	1		T14	1		T11	187
valid_sources[0x12]	6301	1			T11	196		T19	677		T137	1
valid_sources[0x13]	6689	1			T4	1		T11	158		T56	1
valid_sources[0x14]	6503	1			T11	149		T18	6		T40	1
valid_sources[0x15]	7440	1			T7	1		T11	174		T19	674
valid_sources[0x16]	6302	1			T4	2		T6	3		T11	183
valid_sources[0x17]	6846	1			T11	162		T56	1		T18	85
valid_sources[0x18]	6277	1			T11	168		T46	2		T18	9
valid_sources[0x19]	6876	1			T11	171		T56	1		T117	3
valid_sources[0x1a]	7614	1			T11	152		T56	1		T18	1
valid_sources[0x1b]	6296	1			T4	1		T11	150		T13	2
valid_sources[0x1c]	6606	1			T11	205		T57	3		T76	1
valid_sources[0x1d]	6963	1			T8	1		T11	168		T57	2
valid_sources[0x1e]	6691	1			T7	2		T11	184		T13	2
valid_sources[0x1f]	6167	1			T17	1		T11	180		T56	1
valid_sources[0x20]	7146	1			T7	1		T11	175		T56	1
valid_sources[0x21]	7158	1			T17	2		T11	200		T18	522
valid_sources[0x22]	7063	1			T11	155		T47	2		T18	526
valid_sources[0x23]	6807	1			T7	1		T11	160		T76	1
valid_sources[0x24]	5627	1			T8	1		T11	195		T56	1
valid_sources[0x25]	6629	1			T11	180		T56	1		T13	1
valid_sources[0x26]	6602	1			T11	208		T117	7		T118	2
valid_sources[0x27]	6628	1			T11	158		T76	1		T19	611
valid_sources[0x28]	6247	1			T7	1		T11	205		T18	136
valid_sources[0x29]	8273	1			T11	147		T46	1		T76	1
valid_sources[0x2a]	6975	1			T6	1		T11	171		T18	465
valid_sources[0x2b]	5974	1			T8	1		T11	195		T46	1
valid_sources[0x2c]	7389	1			T11	179		T117	10		T18	158
valid_sources[0x2d]	6900	1			T1	2		T6	1		T11	183
valid_sources[0x2e]	7527	1			T14	1		T11	173		T117	7
valid_sources[0x2f]	6127	1			T8	1		T11	178		T56	1
valid_sources[0x30]	6895	1			T11	153		T132	14		T118	1
valid_sources[0x31]	6781	1			T11	224		T56	1		T47	2
valid_sources[0x32]	6989	1			T11	157		T132	3		T76	1
valid_sources[0x33]	6950	1			T11	213		T29	2		T57	1
valid_sources[0x34]	6784	1			T6	1		T11	141		T57	1
valid_sources[0x35]	7347	1			T8	1		T11	208		T56	2
valid_sources[0x36]	7068	1			T1	2		T11	173		T64	5
valid_sources[0x37]	6618	1			T11	181		T56	1		T47	2
valid_sources[0x38]	6194	1			T7	1		T11	197		T56	2
valid_sources[0x39]	7402	1			T6	2		T11	170		T56	1
valid_sources[0x3a]	7352	1			T11	192		T33	10		T18	5
valid_sources[0x3b]	6734	1			T11	177		T56	2		T118	2
valid_sources[0x3c]	6874	1			T8	1		T11	176		T18	73
valid_sources[0x3d]	7230	1			T8	2		T11	165		T13	1
valid_sources[0x3e]	6987	1			T11	198		T118	1		T18	1
valid_sources[0x3f]	6114	1			T11	171		T118	1		T18	23
valid_sources[0x40]	6628	1			T11	200		T13	1		T18	212
valid_sources[0x41]	7050	1			T11	186		T18	102		T19	647
valid_sources[0x42]	6551	1			T7	1		T11	172		T56	2
valid_sources[0x43]	7165	1			T11	144		T56	1		T18	431
valid_sources[0x44]	7830	1			T7	1		T9	32		T11	159
valid_sources[0x45]	7223	1			T6	1		T11	190		T56	5
valid_sources[0x46]	6525	1			T11	185		T76	1		T118	1
valid_sources[0x47]	7058	1			T11	206		T117	5		T18	3
valid_sources[0x48]	6372	1			T11	198		T19	715		T138	1
valid_sources[0x49]	6536	1			T11	170		T18	166		T19	607
valid_sources[0x4a]	7162	1			T11	172		T136	1		T18	236
valid_sources[0x4b]	6728	1			T11	193		T56	1		T139	1
valid_sources[0x4c]	6310	1			T5	32		T11	180		T29	1
valid_sources[0x4d]	6998	1			T11	172		T46	1		T117	4
valid_sources[0x4e]	6891	1			T14	2		T11	219		T56	1
valid_sources[0x4f]	6528	1			T14	1		T11	165		T18	153
valid_sources[0x50]	6981	1			T11	157		T77	1		T18	8
valid_sources[0x51]	7258	1			T11	185		T118	1		T18	395
valid_sources[0x52]	7091	1			T6	2		T11	205		T18	215
valid_sources[0x53]	7160	1			T11	170		T57	1		T18	80
valid_sources[0x54]	7521	1			T4	1		T11	170		T56	3
valid_sources[0x55]	7190	1			T11	187		T18	485		T139	1
valid_sources[0x56]	7093	1			T8	2		T11	189		T18	216
valid_sources[0x57]	6457	1			T11	242		T56	4		T46	1
valid_sources[0x58]	5961	1			T4	1		T11	209		T76	2
valid_sources[0x59]	6965	1			T14	2		T11	173		T13	1
valid_sources[0x5a]	7535	1			T11	208		T18	110		T139	1
valid_sources[0x5b]	6561	1			T11	176		T29	6		T18	586
valid_sources[0x5c]	6963	1			T11	156		T18	410		T45	1
valid_sources[0x5d]	7188	1			T11	156		T56	3		T18	736
valid_sources[0x5e]	6465	1			T1	1		T8	1		T11	198
valid_sources[0x5f]	7681	1			T11	180		T56	1		T18	299
valid_sources[0x60]	6890	1			T7	1		T11	177		T57	1
valid_sources[0x61]	6858	1			T11	176		T18	103		T45	1
valid_sources[0x62]	7510	1			T11	197		T77	2		T19	647
valid_sources[0x63]	7498	1			T6	1		T11	147		T18	10
valid_sources[0x64]	7134	1			T1	1		T11	188		T13	2
valid_sources[0x65]	8177	1			T11	147		T76	2		T18	878
valid_sources[0x66]	6517	1			T1	4		T11	191		T76	2
valid_sources[0x67]	6888	1			T11	154		T47	1		T57	2
valid_sources[0x68]	6266	1			T11	188		T56	1		T13	1
valid_sources[0x69]	7700	1			T11	176		T57	1		T18	295
valid_sources[0x6a]	6943	1			T8	1		T11	153		T56	1
valid_sources[0x6b]	6587	1			T11	175		T56	3		T48	22
valid_sources[0x6c]	7059	1			T7	2		T11	159		T132	1
valid_sources[0x6d]	7046	1			T11	191		T18	20		T19	711
valid_sources[0x6e]	7008	1			T11	198		T56	1		T18	3
valid_sources[0x6f]	6650	1			T11	156		T56	1		T18	172
valid_sources[0x70]	6272	1			T14	1		T11	164		T34	10
valid_sources[0x71]	6860	1			T11	193		T29	2		T47	1
valid_sources[0x72]	6994	1			T4	1		T11	163		T29	3
valid_sources[0x73]	7397	1			T11	186		T29	4		T118	2
valid_sources[0x74]	6230	1			T17	3		T11	151		T56	2
valid_sources[0x75]	7117	1			T11	149		T18	464		T139	1
valid_sources[0x76]	6390	1			T11	158		T56	1		T18	91
valid_sources[0x77]	7016	1			T1	4		T11	193		T56	1
valid_sources[0x78]	6671	1			T11	159		T29	1		T118	3
valid_sources[0x79]	6885	1			T6	1		T11	198		T13	1
valid_sources[0x7a]	6688	1			T11	182		T76	2		T18	197
valid_sources[0x7b]	6599	1			T11	183		T47	1		T18	382
valid_sources[0x7c]	6895	1			T11	211		T56	1		T18	7
valid_sources[0x7d]	6803	1			T14	1		T11	192		T76	1
valid_sources[0x7e]	6457	1			T11	181		T18	287		T139	1
valid_sources[0x7f]	7094	1			T11	206		T118	1		T18	245
valid_sources[0x80]	7381	1			T11	181		T56	3		T18	74

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

404483

1

T1

5

T2

11

T4

7

values[0x0]

all_enables

biggest_size

595150

1

T17

1

T11

15706

T33

1

values[0x1]

all_enables

biggest_size

595879

1

T17

1

T11

15659

T33

2