Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57536	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1176208

1

T1

23090

T2

3

T3

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	330022	1			T1	6351		T2	60		T3	84
values[0x0]	443288	1			T1	8785		T17	45870		T18	27111
values[0x1]	460434	1			T1	8999		T17	47560		T18	28122

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28898	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1204846

1

T1

23620

T2

37

T3

51

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4806	1			T1	92		T4	1		T13	4
valid_sources[0x01]	4997	1			T1	103		T16	1		T109	3
valid_sources[0x02]	4639	1			T1	85		T4	1		T16	4
valid_sources[0x03]	4773	1			T1	84		T3	2		T4	1
valid_sources[0x04]	4941	1			T1	106		T105	4		T106	2
valid_sources[0x05]	4506	1			T1	94		T3	1		T13	3
valid_sources[0x06]	4818	1			T1	115		T105	1		T107	10
valid_sources[0x07]	4642	1			T1	76		T4	1		T105	5
valid_sources[0x08]	4610	1			T1	93		T4	1		T16	3
valid_sources[0x09]	4944	1			T1	96		T13	2		T50	13
valid_sources[0x0a]	4748	1			T1	99		T3	4		T13	2
valid_sources[0x0b]	4756	1			T1	73		T16	1		T105	4
valid_sources[0x0c]	4855	1			T1	90		T105	4		T106	3
valid_sources[0x0d]	4868	1			T1	73		T15	6		T16	1
valid_sources[0x0e]	4774	1			T1	97		T3	1		T13	1
valid_sources[0x0f]	4770	1			T1	105		T3	1		T16	1
valid_sources[0x10]	4630	1			T1	85		T105	3		T106	3
valid_sources[0x11]	4969	1			T1	100		T2	2		T3	1
valid_sources[0x12]	4799	1			T1	84		T16	3		T50	1
valid_sources[0x13]	4767	1			T1	110		T4	1		T16	1
valid_sources[0x14]	4749	1			T1	93		T15	7		T16	2
valid_sources[0x15]	4927	1			T1	92		T4	2		T8	1
valid_sources[0x16]	5033	1			T1	94		T16	2		T105	1
valid_sources[0x17]	5187	1			T1	116		T4	1		T13	3
valid_sources[0x18]	4742	1			T1	89		T4	1		T13	3
valid_sources[0x19]	4594	1			T1	102		T13	5		T15	1
valid_sources[0x1a]	4742	1			T1	79		T4	2		T15	9
valid_sources[0x1b]	4834	1			T1	100		T3	1		T105	1
valid_sources[0x1c]	4817	1			T1	94		T3	3		T105	2
valid_sources[0x1d]	4766	1			T1	102		T16	1		T50	3
valid_sources[0x1e]	4583	1			T1	106		T3	2		T4	1
valid_sources[0x1f]	5093	1			T1	107		T13	4		T16	2
valid_sources[0x20]	4575	1			T1	111		T105	2		T124	2
valid_sources[0x21]	4787	1			T1	105		T3	2		T16	2
valid_sources[0x22]	4744	1			T1	76		T16	2		T50	8
valid_sources[0x23]	4888	1			T1	105		T3	2		T50	3
valid_sources[0x24]	4735	1			T1	92		T13	2		T109	4
valid_sources[0x25]	4908	1			T1	85		T3	1		T13	4
valid_sources[0x26]	4849	1			T1	89		T16	1		T11	3
valid_sources[0x27]	4648	1			T1	96		T105	3		T106	1
valid_sources[0x28]	4651	1			T1	84		T3	1		T105	2
valid_sources[0x29]	4527	1			T1	100		T4	1		T105	2
valid_sources[0x2a]	4952	1			T1	94		T13	2		T125	3
valid_sources[0x2b]	4711	1			T1	99		T13	2		T16	1
valid_sources[0x2c]	4838	1			T1	88		T10	24		T105	1
valid_sources[0x2d]	4745	1			T1	81		T3	1		T4	3
valid_sources[0x2e]	4656	1			T1	107		T13	2		T16	2
valid_sources[0x2f]	4802	1			T1	79		T4	1		T16	2
valid_sources[0x30]	5074	1			T1	84		T13	2		T16	2
valid_sources[0x31]	4729	1			T1	95		T105	2		T107	3
valid_sources[0x32]	5169	1			T1	110		T15	5		T107	2
valid_sources[0x33]	4720	1			T1	84		T16	2		T105	2
valid_sources[0x34]	4697	1			T1	103		T2	6		T15	14
valid_sources[0x35]	4725	1			T1	100		T125	2		T78	1
valid_sources[0x36]	4770	1			T1	79		T16	1		T50	2
valid_sources[0x37]	4819	1			T1	102		T13	3		T16	4
valid_sources[0x38]	4521	1			T1	82		T105	5		T106	4
valid_sources[0x39]	4786	1			T1	97		T15	5		T16	1
valid_sources[0x3a]	5818	1			T1	82		T4	1		T15	11
valid_sources[0x3b]	4824	1			T1	93		T4	1		T13	1
valid_sources[0x3c]	4633	1			T1	91		T4	2		T13	3
valid_sources[0x3d]	4617	1			T1	93		T15	6		T105	1
valid_sources[0x3e]	4811	1			T1	87		T3	1		T16	2
valid_sources[0x3f]	4900	1			T1	93		T13	1		T16	2
valid_sources[0x40]	4750	1			T1	98		T16	3		T50	3
valid_sources[0x41]	4911	1			T1	95		T13	4		T105	2
valid_sources[0x42]	4629	1			T1	90		T3	2		T4	1
valid_sources[0x43]	4694	1			T1	81		T15	7		T16	2
valid_sources[0x44]	4969	1			T1	96		T16	2		T105	4
valid_sources[0x45]	4790	1			T1	95		T13	1		T14	3
valid_sources[0x46]	4630	1			T1	94		T15	15		T16	2
valid_sources[0x47]	4751	1			T1	94		T3	2		T105	2
valid_sources[0x48]	4684	1			T1	74		T13	10		T16	1
valid_sources[0x49]	4696	1			T1	80		T4	1		T105	3
valid_sources[0x4a]	4725	1			T1	104		T3	1		T16	2
valid_sources[0x4b]	4764	1			T1	94		T15	6		T105	3
valid_sources[0x4c]	4674	1			T1	99		T3	1		T13	2
valid_sources[0x4d]	4820	1			T1	89		T4	1		T16	1
valid_sources[0x4e]	4758	1			T1	92		T105	1		T106	1
valid_sources[0x4f]	4861	1			T1	104		T16	2		T105	1
valid_sources[0x50]	4750	1			T1	93		T16	3		T105	3
valid_sources[0x51]	4720	1			T1	103		T2	1		T13	3
valid_sources[0x52]	4670	1			T1	100		T2	3		T3	1
valid_sources[0x53]	4782	1			T1	111		T3	1		T16	1
valid_sources[0x54]	4757	1			T1	88		T4	1		T16	3
valid_sources[0x55]	4715	1			T1	110		T4	1		T8	1
valid_sources[0x56]	4877	1			T1	81		T4	1		T15	22
valid_sources[0x57]	4723	1			T1	110		T4	1		T16	1
valid_sources[0x58]	4668	1			T1	82		T16	1		T105	2
valid_sources[0x59]	4769	1			T1	97		T15	2		T16	2
valid_sources[0x5a]	4725	1			T1	102		T13	1		T16	2
valid_sources[0x5b]	4601	1			T1	83		T2	1		T16	2
valid_sources[0x5c]	4978	1			T1	107		T16	2		T105	1
valid_sources[0x5d]	4780	1			T1	93		T16	2		T105	3
valid_sources[0x5e]	4813	1			T1	110		T4	1		T13	1
valid_sources[0x5f]	5278	1			T1	110		T3	1		T4	1
valid_sources[0x60]	5755	1			T1	94		T50	11		T105	5
valid_sources[0x61]	4748	1			T1	109		T3	2		T105	2
valid_sources[0x62]	4604	1			T1	70		T106	4		T109	1
valid_sources[0x63]	4835	1			T1	93		T16	1		T125	1
valid_sources[0x64]	4703	1			T1	101		T16	1		T105	2
valid_sources[0x65]	4928	1			T1	99		T108	27		T110	1
valid_sources[0x66]	5286	1			T1	81		T15	1		T16	1
valid_sources[0x67]	5037	1			T1	94		T15	19		T105	2
valid_sources[0x68]	5230	1			T1	99		T4	1		T16	2
valid_sources[0x69]	4720	1			T1	83		T4	1		T13	7
valid_sources[0x6a]	4999	1			T1	94		T3	2		T105	4
valid_sources[0x6b]	4686	1			T1	84		T2	2		T4	1
valid_sources[0x6c]	5003	1			T1	88		T13	7		T16	1
valid_sources[0x6d]	4811	1			T1	85		T105	2		T107	1
valid_sources[0x6e]	4741	1			T1	90		T16	1		T105	1
valid_sources[0x6f]	4557	1			T1	101		T13	3		T16	1
valid_sources[0x70]	4857	1			T1	91		T16	3		T105	3
valid_sources[0x71]	4666	1			T1	106		T4	3		T16	1
valid_sources[0x72]	4695	1			T1	88		T13	3		T15	2
valid_sources[0x73]	5098	1			T1	100		T13	2		T16	1
valid_sources[0x74]	4644	1			T1	89		T4	2		T107	1
valid_sources[0x75]	4625	1			T1	78		T13	1		T105	1
valid_sources[0x76]	4612	1			T1	96		T16	1		T105	1
valid_sources[0x77]	5169	1			T1	98		T13	3		T105	1
valid_sources[0x78]	4800	1			T1	92		T16	2		T105	3
valid_sources[0x79]	4645	1			T1	98		T4	2		T13	1
valid_sources[0x7a]	4691	1			T1	102		T2	1		T4	1
valid_sources[0x7b]	4839	1			T1	108		T2	1		T16	1
valid_sources[0x7c]	4814	1			T1	105		T2	4		T4	1
valid_sources[0x7d]	4638	1			T1	82		T50	2		T105	6
valid_sources[0x7e]	4793	1			T1	97		T13	2		T16	1
valid_sources[0x7f]	4567	1			T1	112		T4	1		T13	1
valid_sources[0x80]	4499	1			T1	95		T2	2		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

296440

1

T1

5808

T2

3

T3

9

values[0x0]

all_enables

biggest_size

439327

1

T1

8708

T17

45473

T18

26881

values[0x1]

all_enables

biggest_size

440441

1

T1

8574

T17

45538

T18

26836

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	90501	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

903155

1

T1

19256

T2

17

T3

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	251138	1			T1	5406		T2	32		T3	32
values[0x0]	343753	1			T1	7141		T6	3		T20	10
values[0x1]	398765	1			T1	8335		T6	4		T20	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41760	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

951896

1

T1

20148

T2

19

T3

19

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3741	1			T1	136		T82	1		T17	413
valid_sources[0x01]	4591	1			T1	474		T15	2		T27	1
valid_sources[0x02]	3869	1			T1	8		T78	1		T46	1
valid_sources[0x03]	3525	1			T1	13		T80	3		T17	389
valid_sources[0x04]	4321	1			T1	104		T50	1		T11	1
valid_sources[0x05]	3572	1			T1	81		T124	1		T11	7
valid_sources[0x06]	3735	1			T1	11		T28	2		T80	1
valid_sources[0x07]	3430	1			T1	5		T11	1		T82	2
valid_sources[0x08]	4119	1			T1	15		T6	1		T11	1
valid_sources[0x09]	3610	1			T1	133		T15	1		T17	392
valid_sources[0x0a]	4107	1			T1	3		T66	1		T28	1
valid_sources[0x0b]	3686	1			T1	7		T17	385		T126	1
valid_sources[0x0c]	4137	1			T1	307		T15	1		T127	1
valid_sources[0x0d]	4303	1			T1	171		T15	1		T50	1
valid_sources[0x0e]	3462	1			T1	193		T50	1		T46	1
valid_sources[0x0f]	3971	1			T1	19		T2	1		T78	1
valid_sources[0x10]	4018	1			T1	308		T15	1		T50	1
valid_sources[0x11]	4849	1			T1	99		T15	3		T79	1
valid_sources[0x12]	3147	1			T1	14		T15	1		T50	2
valid_sources[0x13]	4027	1			T1	70		T15	1		T125	8
valid_sources[0x14]	3753	1			T1	73		T127	1		T128	1
valid_sources[0x15]	3405	1			T1	4		T15	1		T17	437
valid_sources[0x16]	3753	1			T1	46		T78	1		T129	1
valid_sources[0x17]	3612	1			T1	9		T15	1		T50	1
valid_sources[0x18]	3531	1			T1	157		T2	1		T15	1
valid_sources[0x19]	3336	1			T1	7		T15	1		T124	1
valid_sources[0x1a]	3345	1			T1	5		T124	1		T82	2
valid_sources[0x1b]	3674	1			T1	32		T50	1		T65	1
valid_sources[0x1c]	3068	1			T1	3		T2	2		T50	1
valid_sources[0x1d]	4114	1			T1	171		T80	2		T82	1
valid_sources[0x1e]	3684	1			T1	251		T17	367		T130	1
valid_sources[0x1f]	3672	1			T1	8		T15	1		T131	1
valid_sources[0x20]	4053	1			T1	9		T10	4		T17	399
valid_sources[0x21]	4601	1			T1	13		T2	1		T80	2
valid_sources[0x22]	3909	1			T1	8		T17	382		T18	252
valid_sources[0x23]	3807	1			T1	3		T82	1		T17	387
valid_sources[0x24]	4522	1			T1	333		T15	1		T82	2
valid_sources[0x25]	3749	1			T1	126		T82	1		T17	383
valid_sources[0x26]	4368	1			T1	9		T78	1		T28	1
valid_sources[0x27]	4063	1			T1	9		T17	395		T132	1
valid_sources[0x28]	3659	1			T1	174		T50	1		T65	1
valid_sources[0x29]	4482	1			T1	16		T15	1		T133	3
valid_sources[0x2a]	3272	1			T1	2		T17	346		T18	191
valid_sources[0x2b]	3832	1			T1	35		T50	1		T80	1
valid_sources[0x2c]	3943	1			T1	286		T2	1		T50	1
valid_sources[0x2d]	3472	1			T1	3		T11	1		T131	1
valid_sources[0x2e]	3848	1			T1	75		T15	3		T78	2
valid_sources[0x2f]	3713	1			T1	10		T50	1		T64	2
valid_sources[0x30]	3805	1			T1	8		T11	1		T79	1
valid_sources[0x31]	4914	1			T1	5		T67	8		T28	1
valid_sources[0x32]	4122	1			T1	174		T2	2		T50	1
valid_sources[0x33]	4160	1			T1	19		T28	1		T127	1
valid_sources[0x34]	4083	1			T1	6		T78	1		T82	1
valid_sources[0x35]	4272	1			T1	84		T82	1		T17	388
valid_sources[0x36]	3526	1			T1	9		T80	2		T17	363
valid_sources[0x37]	3685	1			T1	9		T10	1		T78	1
valid_sources[0x38]	4075	1			T1	23		T15	1		T66	1
valid_sources[0x39]	3518	1			T1	4		T82	2		T17	369
valid_sources[0x3a]	4125	1			T1	36		T15	1		T78	1
valid_sources[0x3b]	3929	1			T1	290		T127	1		T17	361
valid_sources[0x3c]	3453	1			T1	10		T15	1		T134	2
valid_sources[0x3d]	3650	1			T1	4		T125	1		T11	3
valid_sources[0x3e]	4096	1			T1	135		T50	1		T11	2
valid_sources[0x3f]	3796	1			T1	16		T17	375		T135	1
valid_sources[0x40]	4099	1			T1	161		T15	1		T80	1
valid_sources[0x41]	3910	1			T1	47		T82	4		T131	1
valid_sources[0x42]	3611	1			T1	65		T15	1		T28	1
valid_sources[0x43]	3558	1			T1	3		T10	5		T127	1
valid_sources[0x44]	3587	1			T1	68		T131	1		T17	387
valid_sources[0x45]	3077	1			T1	2		T79	3		T136	1
valid_sources[0x46]	3265	1			T82	3		T17	428		T132	1
valid_sources[0x47]	3714	1			T1	56		T11	3		T131	1
valid_sources[0x48]	4002	1			T1	6		T80	5		T82	2
valid_sources[0x49]	3404	1			T1	5		T65	1		T124	1
valid_sources[0x4a]	3438	1			T1	5		T17	394		T126	1
valid_sources[0x4b]	3252	1			T1	6		T11	3		T17	386
valid_sources[0x4c]	3339	1			T1	2		T15	1		T133	1
valid_sources[0x4d]	4344	1			T1	7		T50	2		T137	1
valid_sources[0x4e]	3883	1			T1	36		T50	1		T78	1
valid_sources[0x4f]	4011	1			T1	3		T50	1		T124	1
valid_sources[0x50]	3559	1			T1	165		T50	1		T80	1
valid_sources[0x51]	4133	1			T1	209		T134	1		T17	464
valid_sources[0x52]	4542	1			T1	199		T50	1		T125	2
valid_sources[0x53]	3295	1			T1	24		T79	1		T46	1
valid_sources[0x54]	3465	1			T1	3		T78	1		T80	1
valid_sources[0x55]	3468	1			T1	1		T11	1		T131	1
valid_sources[0x56]	4662	1			T1	175		T124	1		T80	2
valid_sources[0x57]	3838	1			T1	43		T50	1		T29	1
valid_sources[0x58]	3692	1			T1	4		T17	369		T18	231
valid_sources[0x59]	3670	1			T1	15		T50	1		T82	1
valid_sources[0x5a]	3811	1			T1	376		T15	1		T79	1
valid_sources[0x5b]	4577	1			T1	168		T50	1		T134	1
valid_sources[0x5c]	3499	1			T1	64		T15	1		T50	1
valid_sources[0x5d]	4102	1			T1	12		T17	355		T18	212
valid_sources[0x5e]	3966	1			T1	4		T82	1		T30	2
valid_sources[0x5f]	3905	1			T1	5		T11	1		T82	1
valid_sources[0x60]	4160	1			T1	5		T64	1		T28	2
valid_sources[0x61]	3682	1			T1	7		T50	1		T80	1
valid_sources[0x62]	4192	1			T1	79		T7	1		T15	2
valid_sources[0x63]	3745	1			T1	1		T2	1		T10	2
valid_sources[0x64]	3130	1			T15	1		T80	1		T17	415
valid_sources[0x65]	4098	1			T1	5		T17	369		T132	1
valid_sources[0x66]	3453	1			T1	12		T28	2		T80	2
valid_sources[0x67]	3650	1			T1	4		T15	1		T137	1
valid_sources[0x68]	3854	1			T1	15		T2	2		T29	1
valid_sources[0x69]	3703	1			T1	108		T17	387		T18	202
valid_sources[0x6a]	4203	1			T1	50		T15	1		T82	1
valid_sources[0x6b]	3916	1			T1	7		T14	2		T134	1
valid_sources[0x6c]	3934	1			T1	2		T10	4		T15	1
valid_sources[0x6d]	4148	1			T1	64		T5	1		T17	413
valid_sources[0x6e]	3518	1			T1	301		T82	1		T30	1
valid_sources[0x6f]	3725	1			T1	195		T46	1		T80	1
valid_sources[0x70]	4119	1			T1	389		T2	1		T10	11
valid_sources[0x71]	3692	1			T1	2		T14	1		T66	1
valid_sources[0x72]	4229	1			T1	11		T15	1		T80	1
valid_sources[0x73]	4128	1			T1	84		T15	1		T63	1
valid_sources[0x74]	3597	1			T1	3		T124	1		T11	1
valid_sources[0x75]	3745	1			T1	19		T62	15		T21	1
valid_sources[0x76]	3654	1			T1	7		T17	402		T132	2
valid_sources[0x77]	3632	1			T1	8		T50	1		T124	1
valid_sources[0x78]	4135	1			T1	9		T50	1		T29	2
valid_sources[0x79]	3830	1			T1	307		T2	3		T15	1
valid_sources[0x7a]	3498	1			T1	4		T15	1		T82	1
valid_sources[0x7b]	4221	1			T1	430		T2	1		T15	2
valid_sources[0x7c]	3726	1			T1	11		T50	1		T124	1
valid_sources[0x7d]	3922	1			T1	12		T2	1		T15	2
valid_sources[0x7e]	4039	1			T1	112		T15	1		T124	1
valid_sources[0x7f]	4950	1			T1	225		T15	1		T78	1
valid_sources[0x80]	3882	1			T1	7		T124	1		T17	405

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

229197

1

T1

5008

T2

17

T3

15

values[0x0]

all_enables

biggest_size

336616

1

T1

7015

T6

3

T20

4

values[0x1]

all_enables

biggest_size

337342

1

T1

7233

T20

1

T34

1