Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64133	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1427688

1

T1

15

T2

11

T4

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	394465	1			T1	303		T2	95		T4	9
values[0x0]	539861	1			T11	45073		T17	29947		T18	20806
values[0x1]	557495	1			T11	46264		T17	31056		T18	21629

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32631	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1459190

1

T1

178

T2

61

T4

9

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7259	1			T1	2		T8	2		T10	1
valid_sources[0x01]	5338	1			T1	1		T8	2		T10	2
valid_sources[0x02]	5591	1			T11	505		T56	4		T57	12
valid_sources[0x03]	5545	1			T1	2		T8	1		T11	510
valid_sources[0x04]	5550	1			T1	2		T11	477		T55	2
valid_sources[0x05]	5657	1			T1	1		T2	3		T5	8
valid_sources[0x06]	5455	1			T1	1		T8	1		T11	468
valid_sources[0x07]	6046	1			T1	2		T8	1		T11	463
valid_sources[0x08]	5869	1			T15	1		T11	479		T12	4
valid_sources[0x09]	5849	1			T14	3		T15	3		T11	518
valid_sources[0x0a]	6195	1			T1	2		T8	1		T11	530
valid_sources[0x0b]	5455	1			T2	1		T8	1		T10	1
valid_sources[0x0c]	6302	1			T10	1		T15	1		T11	466
valid_sources[0x0d]	5274	1			T8	1		T14	4		T11	473
valid_sources[0x0e]	5624	1			T1	1		T11	506		T12	3
valid_sources[0x0f]	5211	1			T1	1		T15	1		T11	468
valid_sources[0x10]	5367	1			T2	1		T8	2		T11	487
valid_sources[0x11]	5250	1			T11	481		T13	30		T17	303
valid_sources[0x12]	5985	1			T1	1		T8	1		T11	485
valid_sources[0x13]	6100	1			T1	1		T2	2		T10	1
valid_sources[0x14]	5977	1			T10	3		T11	472		T17	341
valid_sources[0x15]	6283	1			T8	2		T14	1		T11	472
valid_sources[0x16]	5801	1			T1	3		T5	1		T11	541
valid_sources[0x17]	5209	1			T15	1		T11	472		T38	1
valid_sources[0x18]	6495	1			T1	2		T8	2		T11	469
valid_sources[0x19]	5633	1			T5	1		T11	509		T123	1
valid_sources[0x1a]	6654	1			T1	1		T15	1		T16	18
valid_sources[0x1b]	5857	1			T1	1		T2	5		T8	1
valid_sources[0x1c]	5639	1			T2	1		T5	5		T11	521
valid_sources[0x1d]	6172	1			T1	1		T15	2		T11	456
valid_sources[0x1e]	5512	1			T15	1		T16	66		T11	471
valid_sources[0x1f]	5080	1			T8	1		T16	30		T11	478
valid_sources[0x20]	5734	1			T1	1		T15	1		T11	452
valid_sources[0x21]	6428	1			T15	2		T11	466		T56	1
valid_sources[0x22]	6177	1			T1	1		T8	6		T15	1
valid_sources[0x23]	5568	1			T1	3		T8	1		T10	1
valid_sources[0x24]	5766	1			T2	3		T8	2		T10	1
valid_sources[0x25]	5339	1			T1	1		T11	476		T40	1
valid_sources[0x26]	5260	1			T15	1		T11	480		T55	2
valid_sources[0x27]	5304	1			T1	4		T2	3		T11	462
valid_sources[0x28]	5330	1			T1	2		T2	2		T5	1
valid_sources[0x29]	5742	1			T1	1		T2	1		T10	1
valid_sources[0x2a]	5216	1			T5	4		T8	1		T11	505
valid_sources[0x2b]	5452	1			T11	520		T57	2		T38	1
valid_sources[0x2c]	7622	1			T1	2		T11	496		T55	2
valid_sources[0x2d]	5313	1			T2	1		T8	1		T10	1
valid_sources[0x2e]	5456	1			T10	1		T14	1		T11	476
valid_sources[0x2f]	7193	1			T1	1		T8	1		T16	39
valid_sources[0x30]	6031	1			T1	5		T5	3		T8	1
valid_sources[0x31]	5863	1			T1	1		T8	1		T10	1
valid_sources[0x32]	6331	1			T2	2		T8	1		T15	2
valid_sources[0x33]	5811	1			T1	2		T8	1		T11	490
valid_sources[0x34]	5384	1			T1	5		T10	1		T11	500
valid_sources[0x35]	5605	1			T1	1		T8	1		T14	5
valid_sources[0x36]	7159	1			T11	528		T55	1		T57	2
valid_sources[0x37]	6284	1			T11	478		T55	1		T57	2
valid_sources[0x38]	5085	1			T1	2		T5	7		T14	3
valid_sources[0x39]	6138	1			T1	1		T8	1		T10	1
valid_sources[0x3a]	5616	1			T15	1		T11	467		T55	1
valid_sources[0x3b]	5477	1			T1	1		T8	2		T11	472
valid_sources[0x3c]	6197	1			T1	1		T8	1		T14	1
valid_sources[0x3d]	5823	1			T1	1		T16	24		T11	448
valid_sources[0x3e]	6296	1			T8	3		T11	458		T55	1
valid_sources[0x3f]	5770	1			T4	4		T8	1		T14	1
valid_sources[0x40]	5643	1			T14	7		T15	2		T11	493
valid_sources[0x41]	5465	1			T8	1		T11	463		T55	2
valid_sources[0x42]	5300	1			T1	3		T11	528		T12	7
valid_sources[0x43]	5065	1			T8	1		T15	2		T11	458
valid_sources[0x44]	4981	1			T11	483		T13	3		T43	1
valid_sources[0x45]	5322	1			T1	2		T15	1		T11	420
valid_sources[0x46]	6178	1			T1	1		T4	3		T15	1
valid_sources[0x47]	5707	1			T1	2		T8	1		T10	1
valid_sources[0x48]	5789	1			T1	1		T10	1		T11	501
valid_sources[0x49]	5865	1			T5	4		T10	1		T15	2
valid_sources[0x4a]	6838	1			T8	2		T15	3		T11	464
valid_sources[0x4b]	5437	1			T5	9		T15	1		T11	504
valid_sources[0x4c]	5122	1			T11	453		T56	2		T17	287
valid_sources[0x4d]	6432	1			T1	1		T2	2		T10	3
valid_sources[0x4e]	5954	1			T15	1		T11	478		T12	4
valid_sources[0x4f]	5123	1			T1	3		T11	499		T57	1
valid_sources[0x50]	6922	1			T8	1		T15	1		T11	480
valid_sources[0x51]	5204	1			T14	1		T11	503		T13	2
valid_sources[0x52]	6313	1			T1	4		T5	2		T8	1
valid_sources[0x53]	5969	1			T1	1		T8	1		T10	1
valid_sources[0x54]	5884	1			T1	3		T4	1		T11	428
valid_sources[0x55]	5853	1			T1	2		T5	7		T8	1
valid_sources[0x56]	6165	1			T10	1		T14	4		T11	493
valid_sources[0x57]	6207	1			T1	1		T2	7		T8	1
valid_sources[0x58]	5890	1			T1	2		T2	2		T5	2
valid_sources[0x59]	5426	1			T8	3		T15	1		T11	459
valid_sources[0x5a]	6717	1			T1	1		T5	3		T8	1
valid_sources[0x5b]	5204	1			T1	2		T2	5		T8	1
valid_sources[0x5c]	6156	1			T1	1		T10	3		T11	483
valid_sources[0x5d]	6288	1			T1	1		T11	465		T12	3
valid_sources[0x5e]	5351	1			T2	1		T8	1		T11	473
valid_sources[0x5f]	6103	1			T1	1		T8	1		T10	1
valid_sources[0x60]	5428	1			T1	1		T11	479		T55	2
valid_sources[0x61]	5368	1			T1	1		T8	1		T14	1
valid_sources[0x62]	5688	1			T1	2		T8	2		T11	430
valid_sources[0x63]	5316	1			T2	3		T8	3		T15	1
valid_sources[0x64]	5288	1			T1	1		T8	2		T16	35
valid_sources[0x65]	6194	1			T15	1		T11	481		T56	1
valid_sources[0x66]	6334	1			T8	2		T10	1		T15	1
valid_sources[0x67]	5146	1			T1	5		T14	3		T11	520
valid_sources[0x68]	5589	1			T8	1		T10	1		T15	1
valid_sources[0x69]	6175	1			T2	3		T14	1		T11	466
valid_sources[0x6a]	5533	1			T1	2		T11	474		T55	2
valid_sources[0x6b]	6317	1			T1	1		T10	1		T11	499
valid_sources[0x6c]	6881	1			T15	1		T11	476		T55	1
valid_sources[0x6d]	5850	1			T1	1		T2	4		T10	1
valid_sources[0x6e]	5629	1			T1	2		T15	1		T11	465
valid_sources[0x6f]	5682	1			T1	1		T8	2		T10	2
valid_sources[0x70]	5956	1			T1	1		T2	1		T16	18
valid_sources[0x71]	5892	1			T8	1		T14	2		T11	489
valid_sources[0x72]	6045	1			T1	2		T5	7		T8	1
valid_sources[0x73]	6753	1			T10	1		T11	485		T56	3
valid_sources[0x74]	7413	1			T8	1		T11	461		T12	4
valid_sources[0x75]	6680	1			T1	2		T11	495		T56	3
valid_sources[0x76]	5743	1			T1	1		T5	1		T11	505
valid_sources[0x77]	6731	1			T1	2		T15	1		T11	500
valid_sources[0x78]	5581	1			T5	1		T8	1		T14	1
valid_sources[0x79]	5323	1			T1	3		T15	1		T11	463
valid_sources[0x7a]	6268	1			T1	2		T10	1		T11	526
valid_sources[0x7b]	5285	1			T8	1		T14	1		T15	2
valid_sources[0x7c]	5336	1			T8	2		T15	1		T11	455
valid_sources[0x7d]	5434	1			T1	1		T5	2		T11	531
valid_sources[0x7e]	5664	1			T5	5		T8	1		T15	1
valid_sources[0x7f]	5530	1			T1	3		T5	3		T11	459
valid_sources[0x80]	6683	1			T1	1		T5	13		T8	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

359539

1

T1

15

T2

11

T4

9

values[0x0]

all_enables

biggest_size

535171

1

T11

44710

T17

29682

T18

20618

values[0x1]

all_enables

biggest_size

532978

1

T11

44284

T17

29703

T18

20673

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	109984	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1098722

1

T2

16

T3

3

T4

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	302958	1			T2	32		T4	29		T5	96
values[0x0]	419638	1			T3	3		T6	4		T11	33745
values[0x1]	486110	1			T3	8		T6	4		T11	39096

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49904	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1158802

1

T2

21

T3

6

T4

15

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5591	1			T11	399		T43	1		T17	280
valid_sources[0x01]	5554	1			T5	1		T11	375		T41	1
valid_sources[0x02]	4905	1			T2	1		T11	379		T57	12
valid_sources[0x03]	4050	1			T11	401		T44	1		T17	234
valid_sources[0x04]	4623	1			T2	1		T4	10		T5	2
valid_sources[0x05]	5771	1			T5	1		T11	375		T55	2
valid_sources[0x06]	4047	1			T15	21		T11	355		T12	3
valid_sources[0x07]	5222	1			T9	1		T11	373		T17	262
valid_sources[0x08]	5237	1			T10	1		T11	397		T17	302
valid_sources[0x09]	4998	1			T11	328		T12	1		T40	1
valid_sources[0x0a]	5141	1			T9	1		T11	331		T12	7
valid_sources[0x0b]	4477	1			T11	289		T29	1		T13	1
valid_sources[0x0c]	4175	1			T9	1		T11	363		T17	314
valid_sources[0x0d]	3371	1			T5	1		T11	408		T17	297
valid_sources[0x0e]	4174	1			T11	395		T17	248		T18	170
valid_sources[0x0f]	4234	1			T11	356		T12	4		T13	1
valid_sources[0x10]	4975	1			T5	1		T11	310		T41	3
valid_sources[0x11]	5619	1			T11	403		T12	5		T29	2
valid_sources[0x12]	4865	1			T11	391		T12	7		T17	279
valid_sources[0x13]	3972	1			T11	312		T28	1		T29	2
valid_sources[0x14]	5525	1			T11	366		T40	1		T17	288
valid_sources[0x15]	3776	1			T11	380		T30	3		T17	265
valid_sources[0x16]	4037	1			T11	377		T17	246		T18	154
valid_sources[0x17]	4882	1			T11	397		T42	2		T17	266
valid_sources[0x18]	4798	1			T11	339		T13	1		T30	1
valid_sources[0x19]	4904	1			T11	331		T55	2		T13	1
valid_sources[0x1a]	4139	1			T11	470		T12	1		T32	1
valid_sources[0x1b]	4870	1			T11	384		T17	254		T18	202
valid_sources[0x1c]	4393	1			T11	346		T42	1		T17	266
valid_sources[0x1d]	4454	1			T11	391		T12	1		T29	1
valid_sources[0x1e]	3862	1			T11	360		T12	1		T41	2
valid_sources[0x1f]	5148	1			T11	348		T13	1		T17	292
valid_sources[0x20]	5651	1			T5	2		T11	380		T55	3
valid_sources[0x21]	5048	1			T5	2		T11	370		T30	2
valid_sources[0x22]	4741	1			T11	397		T29	1		T17	273
valid_sources[0x23]	4081	1			T2	1		T11	435		T57	1
valid_sources[0x24]	3770	1			T5	1		T11	375		T47	1
valid_sources[0x25]	4356	1			T11	399		T57	2		T17	284
valid_sources[0x26]	5113	1			T4	1		T5	1		T11	335
valid_sources[0x27]	4033	1			T11	354		T17	296		T18	176
valid_sources[0x28]	4629	1			T11	408		T12	1		T17	289
valid_sources[0x29]	5196	1			T11	322		T17	279		T18	142
valid_sources[0x2a]	4736	1			T10	1		T11	405		T28	1
valid_sources[0x2b]	4307	1			T11	322		T17	256		T18	153
valid_sources[0x2c]	3636	1			T5	1		T11	358		T20	1
valid_sources[0x2d]	4253	1			T5	1		T11	360		T12	1
valid_sources[0x2e]	4872	1			T11	408		T42	1		T17	246
valid_sources[0x2f]	4116	1			T9	1		T11	483		T23	1
valid_sources[0x30]	4735	1			T5	2		T11	398		T55	1
valid_sources[0x31]	5027	1			T5	1		T15	4		T11	426
valid_sources[0x32]	5129	1			T11	456		T17	289		T18	198
valid_sources[0x33]	5033	1			T2	1		T11	447		T12	5
valid_sources[0x34]	4564	1			T11	345		T12	1		T17	308
valid_sources[0x35]	5653	1			T9	1		T11	331		T41	1
valid_sources[0x36]	3892	1			T10	2		T11	440		T13	1
valid_sources[0x37]	4526	1			T5	4		T11	418		T12	1
valid_sources[0x38]	5335	1			T10	1		T11	392		T17	279
valid_sources[0x39]	4632	1			T11	396		T17	277		T18	166
valid_sources[0x3a]	5890	1			T11	338		T17	265		T18	173
valid_sources[0x3b]	4398	1			T11	344		T13	1		T17	247
valid_sources[0x3c]	4344	1			T5	2		T11	338		T13	1
valid_sources[0x3d]	4807	1			T11	341		T17	269		T18	190
valid_sources[0x3e]	5605	1			T11	426		T57	6		T17	263
valid_sources[0x3f]	4927	1			T5	1		T10	1		T11	399
valid_sources[0x40]	4369	1			T11	411		T17	269		T18	171
valid_sources[0x41]	5830	1			T11	404		T12	1		T41	3
valid_sources[0x42]	4370	1			T11	374		T13	2		T30	1
valid_sources[0x43]	4594	1			T11	312		T17	326		T18	152
valid_sources[0x44]	5818	1			T2	2		T11	435		T17	272
valid_sources[0x45]	4976	1			T15	26		T11	455		T30	2
valid_sources[0x46]	3783	1			T11	377		T12	2		T23	1
valid_sources[0x47]	4329	1			T11	337		T17	274		T18	190
valid_sources[0x48]	4916	1			T11	352		T12	1		T30	2
valid_sources[0x49]	4521	1			T11	374		T30	1		T17	297
valid_sources[0x4a]	4659	1			T2	2		T5	1		T11	323
valid_sources[0x4b]	5092	1			T11	358		T63	16		T17	273
valid_sources[0x4c]	5150	1			T11	413		T29	1		T13	1
valid_sources[0x4d]	3956	1			T11	414		T17	268		T18	162
valid_sources[0x4e]	6369	1			T11	352		T41	2		T17	248
valid_sources[0x4f]	5356	1			T5	1		T11	348		T17	246
valid_sources[0x50]	5202	1			T11	385		T12	2		T17	225
valid_sources[0x51]	5810	1			T2	1		T11	414		T13	1
valid_sources[0x52]	4379	1			T11	386		T17	281		T18	156
valid_sources[0x53]	4385	1			T2	1		T11	363		T57	11
valid_sources[0x54]	5290	1			T11	411		T57	7		T30	1
valid_sources[0x55]	4949	1			T11	410		T29	1		T40	1
valid_sources[0x56]	4305	1			T11	354		T40	1		T41	1
valid_sources[0x57]	4752	1			T11	343		T23	1		T17	286
valid_sources[0x58]	3711	1			T5	1		T11	356		T44	2
valid_sources[0x59]	5053	1			T9	1		T11	306		T17	238
valid_sources[0x5a]	3510	1			T11	426		T17	248		T18	157
valid_sources[0x5b]	5221	1			T5	1		T11	443		T38	64
valid_sources[0x5c]	4249	1			T11	388		T57	1		T30	1
valid_sources[0x5d]	4346	1			T2	1		T11	357		T55	2
valid_sources[0x5e]	4763	1			T5	1		T11	396		T40	1
valid_sources[0x5f]	4731	1			T11	394		T23	1		T17	234
valid_sources[0x60]	3895	1			T11	371		T12	1		T17	299
valid_sources[0x61]	4322	1			T11	384		T17	266		T18	154
valid_sources[0x62]	5126	1			T5	1		T11	379		T13	1
valid_sources[0x63]	3794	1			T2	1		T11	440		T47	1
valid_sources[0x64]	5024	1			T11	434		T17	270		T18	178
valid_sources[0x65]	4831	1			T5	1		T11	422		T40	1
valid_sources[0x66]	4592	1			T5	3		T11	337		T29	1
valid_sources[0x67]	5652	1			T5	1		T11	384		T12	2
valid_sources[0x68]	4383	1			T2	1		T5	2		T11	377
valid_sources[0x69]	4231	1			T4	2		T11	402		T13	1
valid_sources[0x6a]	5765	1			T5	2		T10	1		T11	389
valid_sources[0x6b]	4294	1			T11	322		T17	271		T18	160
valid_sources[0x6c]	4704	1			T10	1		T11	339		T32	7
valid_sources[0x6d]	4033	1			T11	334		T17	229		T18	190
valid_sources[0x6e]	4891	1			T9	1		T11	334		T40	1
valid_sources[0x6f]	5372	1			T9	1		T11	326		T57	1
valid_sources[0x70]	5277	1			T11	380		T29	1		T17	269
valid_sources[0x71]	3688	1			T10	1		T11	360		T30	1
valid_sources[0x72]	4312	1			T11	377		T13	2		T47	1
valid_sources[0x73]	4847	1			T5	1		T10	2		T11	355
valid_sources[0x74]	4916	1			T11	353		T47	1		T17	264
valid_sources[0x75]	4698	1			T11	365		T41	3		T17	279
valid_sources[0x76]	5261	1			T11	361		T29	1		T32	2
valid_sources[0x77]	4596	1			T11	430		T57	15		T17	293
valid_sources[0x78]	5847	1			T11	314		T17	315		T18	180
valid_sources[0x79]	4134	1			T5	1		T11	445		T12	2
valid_sources[0x7a]	5281	1			T4	1		T11	337		T47	1
valid_sources[0x7b]	3451	1			T11	439		T13	1		T64	1
valid_sources[0x7c]	4320	1			T11	354		T41	1		T44	1
valid_sources[0x7d]	4097	1			T11	355		T55	3		T23	1
valid_sources[0x7e]	4721	1			T2	1		T5	1		T11	343
valid_sources[0x7f]	4690	1			T2	1		T11	377		T17	256
valid_sources[0x80]	5732	1			T6	2		T11	377		T23	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

277854

1

T2

16

T4

15

T5

40

values[0x0]

all_enables

biggest_size

410769

1

T3

1

T6

2

T11

33050

values[0x1]

all_enables

biggest_size

410099

1

T3

2

T6

1

T11

32927