Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53329	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1088566

1

T1

7

T2

33

T4

107462

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	305553	1			T1	81		T2	392		T4	28054
values[0x0]	410899	1			T4	40758		T22	19435		T23	30520
values[0x1]	425443	1			T4	42140		T22	20060		T23	31682

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27118	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1114777

1

T1

51

T2

257

T4

109069

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5430	1			T2	1		T4	371		T14	4
valid_sources[0x01]	4792	1			T4	380		T14	2		T11	5
valid_sources[0x02]	3205	1			T2	2		T4	372		T46	1
valid_sources[0x03]	3685	1			T2	3		T4	531		T14	1
valid_sources[0x04]	4687	1			T1	2		T2	1		T4	474
valid_sources[0x05]	5200	1			T2	1		T4	410		T44	2
valid_sources[0x06]	4106	1			T4	436		T14	2		T129	3
valid_sources[0x07]	6172	1			T1	1		T4	394		T14	1
valid_sources[0x08]	4772	1			T1	1		T2	1		T4	428
valid_sources[0x09]	4188	1			T1	1		T2	1		T4	452
valid_sources[0x0a]	4201	1			T2	2		T4	412		T7	2
valid_sources[0x0b]	4973	1			T4	400		T14	3		T11	1
valid_sources[0x0c]	3451	1			T2	2		T4	438		T7	5
valid_sources[0x0d]	4553	1			T2	1		T4	364		T5	1
valid_sources[0x0e]	5025	1			T1	1		T4	501		T14	2
valid_sources[0x0f]	4935	1			T4	451		T14	4		T87	3
valid_sources[0x10]	4173	1			T1	1		T2	2		T4	465
valid_sources[0x11]	4698	1			T2	3		T4	438		T7	1
valid_sources[0x12]	3802	1			T1	2		T2	1		T4	486
valid_sources[0x13]	3506	1			T2	1		T4	416		T9	14
valid_sources[0x14]	3919	1			T1	1		T2	2		T4	392
valid_sources[0x15]	4951	1			T1	1		T4	460		T7	3
valid_sources[0x16]	4790	1			T1	1		T4	403		T11	8
valid_sources[0x17]	4018	1			T2	2		T4	394		T14	1
valid_sources[0x18]	4638	1			T2	3		T4	463		T7	1
valid_sources[0x19]	5537	1			T2	1		T4	420		T9	21
valid_sources[0x1a]	4232	1			T4	373		T5	1		T130	1
valid_sources[0x1b]	4163	1			T2	2		T4	389		T7	1
valid_sources[0x1c]	4584	1			T2	1		T4	396		T83	1
valid_sources[0x1d]	4578	1			T2	2		T4	519		T5	1
valid_sources[0x1e]	4508	1			T1	1		T2	3		T4	477
valid_sources[0x1f]	3824	1			T1	4		T2	1		T4	438
valid_sources[0x20]	5872	1			T2	1		T4	482		T14	1
valid_sources[0x21]	3765	1			T1	1		T2	3		T4	457
valid_sources[0x22]	3411	1			T4	425		T5	3		T44	1
valid_sources[0x23]	3700	1			T2	1		T4	415		T7	2
valid_sources[0x24]	4819	1			T1	1		T2	2		T4	476
valid_sources[0x25]	4659	1			T2	2		T4	378		T11	2
valid_sources[0x26]	4934	1			T2	1		T4	400		T14	1
valid_sources[0x27]	3401	1			T2	4		T4	447		T14	5
valid_sources[0x28]	3429	1			T2	5		T4	491		T14	1
valid_sources[0x29]	3437	1			T4	405		T14	3		T83	1
valid_sources[0x2a]	5103	1			T2	3		T4	420		T44	2
valid_sources[0x2b]	6246	1			T2	2		T4	452		T46	6
valid_sources[0x2c]	4555	1			T2	3		T4	431		T9	15
valid_sources[0x2d]	4205	1			T2	1		T4	432		T44	3
valid_sources[0x2e]	5076	1			T2	5		T4	428		T14	4
valid_sources[0x2f]	4960	1			T4	477		T45	2		T129	1
valid_sources[0x30]	3349	1			T4	543		T5	1		T9	22
valid_sources[0x31]	4833	1			T4	496		T84	5		T129	1
valid_sources[0x32]	4841	1			T1	2		T4	408		T44	1
valid_sources[0x33]	3835	1			T2	2		T4	444		T11	8
valid_sources[0x34]	3121	1			T2	2		T4	371		T7	1
valid_sources[0x35]	4393	1			T2	1		T4	465		T5	1
valid_sources[0x36]	4810	1			T2	5		T4	434		T7	1
valid_sources[0x37]	3309	1			T4	413		T5	1		T7	1
valid_sources[0x38]	4826	1			T1	2		T2	3		T4	437
valid_sources[0x39]	4012	1			T2	2		T4	379		T14	5
valid_sources[0x3a]	4286	1			T2	1		T4	452		T45	3
valid_sources[0x3b]	3114	1			T4	448		T5	5		T44	1
valid_sources[0x3c]	4682	1			T2	1		T4	422		T14	1
valid_sources[0x3d]	4345	1			T4	418		T14	2		T11	2
valid_sources[0x3e]	5553	1			T4	450		T5	1		T11	3
valid_sources[0x3f]	4895	1			T2	3		T4	434		T14	3
valid_sources[0x40]	4451	1			T2	2		T4	407		T129	2
valid_sources[0x41]	5340	1			T4	393		T16	1		T130	3
valid_sources[0x42]	3582	1			T2	3		T4	447		T14	1
valid_sources[0x43]	4775	1			T1	2		T2	3		T4	397
valid_sources[0x44]	3973	1			T2	2		T4	405		T14	2
valid_sources[0x45]	3620	1			T1	1		T2	2		T4	447
valid_sources[0x46]	5675	1			T2	1		T4	383		T16	1
valid_sources[0x47]	3087	1			T2	2		T4	493		T11	1
valid_sources[0x48]	3752	1			T2	2		T4	456		T14	2
valid_sources[0x49]	4749	1			T4	430		T14	2		T131	2
valid_sources[0x4a]	5116	1			T2	1		T4	385		T14	1
valid_sources[0x4b]	5067	1			T2	1		T4	435		T14	1
valid_sources[0x4c]	3300	1			T4	427		T11	6		T12	6
valid_sources[0x4d]	3823	1			T4	460		T14	2		T46	3
valid_sources[0x4e]	4356	1			T2	7		T4	414		T5	1
valid_sources[0x4f]	4478	1			T4	433		T14	1		T11	11
valid_sources[0x50]	4862	1			T1	1		T2	3		T4	413
valid_sources[0x51]	4114	1			T2	1		T4	433		T5	3
valid_sources[0x52]	4219	1			T4	457		T11	4		T86	1
valid_sources[0x53]	3864	1			T2	3		T4	380		T14	5
valid_sources[0x54]	3982	1			T1	1		T4	420		T14	2
valid_sources[0x55]	4313	1			T2	1		T4	463		T5	3
valid_sources[0x56]	3619	1			T4	416		T14	2		T44	1
valid_sources[0x57]	3862	1			T2	1		T4	342		T45	2
valid_sources[0x58]	4263	1			T2	2		T4	379		T11	2
valid_sources[0x59]	4567	1			T2	1		T4	430		T7	2
valid_sources[0x5a]	5525	1			T2	3		T4	427		T7	1
valid_sources[0x5b]	4053	1			T2	1		T4	402		T5	1
valid_sources[0x5c]	3478	1			T2	1		T4	370		T132	1
valid_sources[0x5d]	4011	1			T2	1		T4	361		T14	2
valid_sources[0x5e]	5273	1			T4	416		T83	1		T129	1
valid_sources[0x5f]	4071	1			T4	432		T83	1		T133	1
valid_sources[0x60]	4883	1			T1	1		T2	1		T4	466
valid_sources[0x61]	4041	1			T4	415		T11	2		T132	1
valid_sources[0x62]	4565	1			T2	2		T4	441		T13	9
valid_sources[0x63]	4405	1			T1	1		T2	1		T4	536
valid_sources[0x64]	4231	1			T2	3		T4	434		T14	4
valid_sources[0x65]	4144	1			T1	1		T2	1		T4	426
valid_sources[0x66]	3813	1			T1	1		T4	405		T134	23
valid_sources[0x67]	4187	1			T1	1		T2	4		T4	421
valid_sources[0x68]	4137	1			T2	1		T4	428		T83	2
valid_sources[0x69]	4589	1			T1	2		T2	2		T4	423
valid_sources[0x6a]	5188	1			T2	4		T4	402		T5	1
valid_sources[0x6b]	3906	1			T2	1		T4	419		T9	40
valid_sources[0x6c]	4172	1			T2	4		T4	487		T5	1
valid_sources[0x6d]	3399	1			T2	5		T4	485		T7	1
valid_sources[0x6e]	5172	1			T2	1		T4	509		T5	1
valid_sources[0x6f]	4191	1			T2	1		T4	452		T5	1
valid_sources[0x70]	3224	1			T2	1		T4	490		T14	1
valid_sources[0x71]	3900	1			T2	2		T4	462		T44	2
valid_sources[0x72]	4261	1			T2	5		T4	500		T5	3
valid_sources[0x73]	5499	1			T2	2		T4	447		T5	2
valid_sources[0x74]	4680	1			T1	1		T2	1		T4	544
valid_sources[0x75]	3842	1			T1	2		T2	1		T4	428
valid_sources[0x76]	4613	1			T1	2		T2	2		T4	456
valid_sources[0x77]	4239	1			T2	2		T4	360		T44	3
valid_sources[0x78]	4041	1			T2	2		T4	461		T14	2
valid_sources[0x79]	3870	1			T2	6		T4	457		T5	1
valid_sources[0x7a]	6125	1			T2	3		T4	496		T14	4
valid_sources[0x7b]	4715	1			T1	1		T2	2		T4	438
valid_sources[0x7c]	3609	1			T2	4		T4	408		T5	1
valid_sources[0x7d]	4412	1			T4	458		T14	1		T44	1
valid_sources[0x7e]	4396	1			T4	420		T7	1		T44	1
valid_sources[0x7f]	4977	1			T1	1		T2	4		T4	440
valid_sources[0x80]	4734	1			T2	2		T4	434		T15	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

274843

1

T1

7

T2

33

T4

26859

values[0x0]

all_enables

biggest_size

407229

1

T4

40362

T22

19279

T23

30255

values[0x1]

all_enables

biggest_size

406494

1

T4

40241

T22

19143

T23

30245

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	86344	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

841170

1

T1

16

T4

77232

T5

29

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	234040	1			T1	32		T3	1		T4	21008
values[0x0]	321359	1			T4	29681		T6	5		T20	2
values[0x1]	372115	1			T4	34385		T6	3		T8	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39805	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

887709

1

T1

22

T4

81637

T5

37

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4559	1			T4	275		T5	1		T44	2
valid_sources[0x01]	3864	1			T4	350		T7	1		T11	1
valid_sources[0x02]	3248	1			T4	454		T5	1		T6	4
valid_sources[0x03]	3047	1			T4	300		T134	1		T135	1
valid_sources[0x04]	4695	1			T1	1		T4	368		T16	1
valid_sources[0x05]	3917	1			T4	513		T5	1		T132	2
valid_sources[0x06]	3964	1			T4	270		T5	1		T133	1
valid_sources[0x07]	4445	1			T4	236		T11	1		T44	3
valid_sources[0x08]	3395	1			T4	347		T11	1		T135	2
valid_sources[0x09]	3928	1			T4	299		T83	2		T72	2
valid_sources[0x0a]	3925	1			T1	3		T4	415		T11	1
valid_sources[0x0b]	3668	1			T4	441		T69	1		T85	2
valid_sources[0x0c]	3769	1			T4	368		T11	2		T16	1
valid_sources[0x0d]	3344	1			T4	284		T136	1		T87	1
valid_sources[0x0e]	3005	1			T4	300		T11	1		T16	1
valid_sources[0x0f]	2919	1			T4	221		T11	1		T16	1
valid_sources[0x10]	3946	1			T4	274		T15	1		T22	189
valid_sources[0x11]	3505	1			T4	365		T87	1		T22	178
valid_sources[0x12]	2986	1			T4	282		T11	1		T134	1
valid_sources[0x13]	3536	1			T4	288		T15	7		T135	2
valid_sources[0x14]	4032	1			T4	353		T134	1		T135	1
valid_sources[0x15]	3921	1			T4	328		T20	3		T36	1
valid_sources[0x16]	3791	1			T4	325		T44	2		T83	1
valid_sources[0x17]	3586	1			T4	349		T11	1		T85	2
valid_sources[0x18]	3296	1			T4	292		T11	1		T36	1
valid_sources[0x19]	4045	1			T4	350		T16	1		T83	1
valid_sources[0x1a]	4739	1			T4	300		T134	1		T135	1
valid_sources[0x1b]	3637	1			T4	295		T11	1		T133	3
valid_sources[0x1c]	3258	1			T4	364		T70	1		T136	2
valid_sources[0x1d]	4727	1			T4	265		T11	1		T36	1
valid_sources[0x1e]	3318	1			T4	367		T38	3		T22	247
valid_sources[0x1f]	4367	1			T4	360		T16	1		T135	1
valid_sources[0x20]	3136	1			T4	250		T45	20		T135	2
valid_sources[0x21]	3388	1			T4	290		T7	1		T136	1
valid_sources[0x22]	4025	1			T4	359		T11	1		T22	233
valid_sources[0x23]	3885	1			T4	366		T11	1		T22	63
valid_sources[0x24]	3491	1			T4	390		T5	1		T20	1
valid_sources[0x25]	3853	1			T4	325		T11	1		T83	1
valid_sources[0x26]	4209	1			T4	433		T11	1		T16	1
valid_sources[0x27]	3903	1			T3	1		T4	280		T11	1
valid_sources[0x28]	3911	1			T4	375		T10	1		T137	11
valid_sources[0x29]	3020	1			T4	314		T7	1		T11	1
valid_sources[0x2a]	2802	1			T4	217		T133	1		T39	1
valid_sources[0x2b]	3722	1			T4	364		T85	1		T87	1
valid_sources[0x2c]	3445	1			T4	508		T11	1		T16	1
valid_sources[0x2d]	3342	1			T1	3		T4	509		T7	3
valid_sources[0x2e]	3327	1			T4	332		T16	1		T36	1
valid_sources[0x2f]	3164	1			T4	303		T15	2		T20	1
valid_sources[0x30]	3457	1			T4	367		T132	3		T135	1
valid_sources[0x31]	3296	1			T4	331		T7	1		T22	180
valid_sources[0x32]	3295	1			T4	348		T11	1		T83	1
valid_sources[0x33]	4364	1			T4	275		T5	1		T11	1
valid_sources[0x34]	3200	1			T4	282		T11	2		T137	8
valid_sources[0x35]	4927	1			T4	399		T5	2		T72	1
valid_sources[0x36]	3474	1			T4	241		T15	1		T83	1
valid_sources[0x37]	2695	1			T4	279		T11	1		T135	1
valid_sources[0x38]	4262	1			T4	318		T5	1		T11	1
valid_sources[0x39]	3565	1			T1	1		T4	285		T135	1
valid_sources[0x3a]	3748	1			T4	324		T5	1		T11	2
valid_sources[0x3b]	3509	1			T4	385		T11	1		T134	1
valid_sources[0x3c]	3057	1			T4	317		T15	1		T20	2
valid_sources[0x3d]	3689	1			T4	307		T138	1		T22	103
valid_sources[0x3e]	3467	1			T4	353		T11	1		T44	1
valid_sources[0x3f]	3999	1			T4	374		T11	1		T22	346
valid_sources[0x40]	3108	1			T4	306		T5	1		T11	2
valid_sources[0x41]	4215	1			T4	406		T85	1		T22	318
valid_sources[0x42]	3400	1			T1	1		T4	364		T135	1
valid_sources[0x43]	3996	1			T4	380		T7	1		T11	1
valid_sources[0x44]	4094	1			T4	369		T11	1		T134	2
valid_sources[0x45]	3557	1			T4	486		T11	1		T68	2
valid_sources[0x46]	4283	1			T4	389		T20	2		T134	1
valid_sources[0x47]	3080	1			T4	260		T5	1		T21	2
valid_sources[0x48]	3436	1			T4	311		T15	2		T83	1
valid_sources[0x49]	3934	1			T4	280		T5	1		T11	1
valid_sources[0x4a]	3759	1			T4	303		T133	2		T136	2
valid_sources[0x4b]	3042	1			T4	395		T7	1		T11	1
valid_sources[0x4c]	4176	1			T4	334		T5	1		T136	1
valid_sources[0x4d]	3986	1			T4	328		T7	1		T44	2
valid_sources[0x4e]	3324	1			T1	1		T4	407		T11	1
valid_sources[0x4f]	3398	1			T4	358		T22	44		T23	284
valid_sources[0x50]	3208	1			T4	360		T5	2		T83	1
valid_sources[0x51]	3201	1			T4	324		T11	1		T44	2
valid_sources[0x52]	3778	1			T4	278		T11	3		T44	2
valid_sources[0x53]	4656	1			T4	344		T21	1		T132	1
valid_sources[0x54]	3529	1			T4	424		T136	2		T22	8
valid_sources[0x55]	3280	1			T4	290		T5	1		T11	1
valid_sources[0x56]	3817	1			T4	283		T12	1		T134	1
valid_sources[0x57]	3049	1			T4	279		T11	2		T133	1
valid_sources[0x58]	3891	1			T4	349		T7	1		T11	2
valid_sources[0x59]	3243	1			T4	226		T11	1		T132	1
valid_sources[0x5a]	3178	1			T1	2		T4	282		T5	3
valid_sources[0x5b]	3332	1			T4	324		T135	1		T38	1
valid_sources[0x5c]	2949	1			T4	239		T11	1		T38	1
valid_sources[0x5d]	3111	1			T4	358		T11	1		T22	19
valid_sources[0x5e]	2889	1			T4	380		T5	1		T22	137
valid_sources[0x5f]	4182	1			T4	274		T11	1		T133	1
valid_sources[0x60]	4391	1			T4	328		T11	2		T133	2
valid_sources[0x61]	3448	1			T4	398		T5	1		T135	1
valid_sources[0x62]	3260	1			T4	324		T13	9		T15	1
valid_sources[0x63]	3308	1			T1	2		T4	351		T11	1
valid_sources[0x64]	4112	1			T4	345		T138	1		T22	242
valid_sources[0x65]	3112	1			T4	344		T5	2		T45	2
valid_sources[0x66]	4000	1			T4	312		T45	10		T12	1
valid_sources[0x67]	3436	1			T4	423		T133	1		T22	71
valid_sources[0x68]	3378	1			T4	281		T5	1		T11	1
valid_sources[0x69]	3619	1			T4	356		T133	2		T22	155
valid_sources[0x6a]	3541	1			T4	260		T136	1		T87	1
valid_sources[0x6b]	3825	1			T4	345		T44	1		T136	2
valid_sources[0x6c]	3916	1			T4	403		T133	1		T22	226
valid_sources[0x6d]	3928	1			T4	307		T15	1		T135	1
valid_sources[0x6e]	3434	1			T1	1		T4	295		T135	1
valid_sources[0x6f]	4327	1			T4	360		T44	2		T87	1
valid_sources[0x70]	2921	1			T4	378		T5	1		T11	1
valid_sources[0x71]	3640	1			T4	192		T11	1		T135	2
valid_sources[0x72]	3875	1			T4	379		T37	30		T135	1
valid_sources[0x73]	3539	1			T4	309		T11	1		T16	1
valid_sources[0x74]	3627	1			T4	317		T11	2		T83	2
valid_sources[0x75]	3180	1			T4	381		T87	1		T22	92
valid_sources[0x76]	3544	1			T4	416		T5	1		T11	1
valid_sources[0x77]	2951	1			T1	1		T4	332		T5	1
valid_sources[0x78]	3608	1			T4	336		T7	1		T11	1
valid_sources[0x79]	4223	1			T4	380		T16	3		T22	188
valid_sources[0x7a]	4404	1			T4	272		T139	1		T87	1
valid_sources[0x7b]	3858	1			T4	295		T11	1		T132	3
valid_sources[0x7c]	2863	1			T4	320		T5	1		T7	2
valid_sources[0x7d]	4369	1			T4	372		T11	2		T138	1
valid_sources[0x7e]	3366	1			T4	416		T11	1		T135	1
valid_sources[0x7f]	4233	1			T4	304		T44	1		T134	1
valid_sources[0x80]	3275	1			T4	285		T7	1		T136	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

212933

1

T1

16

T4

19499

T5

29

values[0x0]

all_enables

biggest_size

314286

1

T4

29028

T6

3

T20

1

values[0x1]

all_enables

biggest_size

313951

1

T4

28705

T20

2

T21

1