Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 63238 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1458940 1 T2 4 T3 25 T4 12



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 401357 1 T2 85 T3 255 T4 118
values[0x0] 550831 1 T20 29496 T21 47458 T22 9182
values[0x1] 569990 1 T20 30456 T21 49109 T22 9514



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 32460 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1489718 1 T2 55 T3 143 T4 71



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 6394 1 T12 1 T16 1 T85 2
valid_sources[0x01] 5897 1 T3 3 T16 1 T20 163
valid_sources[0x02] 5957 1 T3 1 T7 1 T87 1
valid_sources[0x03] 5671 1 T3 3 T42 2 T85 2
valid_sources[0x04] 6000 1 T7 1 T112 3 T87 2
valid_sources[0x05] 5377 1 T16 1 T42 6 T87 1
valid_sources[0x06] 7252 1 T16 2 T20 440 T62 1
valid_sources[0x07] 6475 1 T3 1 T7 2 T16 4
valid_sources[0x08] 5324 1 T3 1 T43 2 T87 6
valid_sources[0x09] 5686 1 T43 2 T13 1 T87 2
valid_sources[0x0a] 6102 1 T16 4 T43 1 T110 40
valid_sources[0x0b] 5634 1 T3 1 T12 5 T16 3
valid_sources[0x0c] 5266 1 T3 2 T7 1 T16 3
valid_sources[0x0d] 5668 1 T3 2 T16 1 T42 1
valid_sources[0x0e] 5269 1 T11 3 T16 2 T87 2
valid_sources[0x0f] 5625 1 T3 1 T7 1 T16 1
valid_sources[0x10] 5392 1 T16 1 T43 1 T20 5
valid_sources[0x11] 5371 1 T3 4 T7 1 T16 4
valid_sources[0x12] 6279 1 T3 2 T16 1 T86 1
valid_sources[0x13] 5659 1 T3 1 T16 1 T85 1
valid_sources[0x14] 5472 1 T3 2 T111 2 T20 596
valid_sources[0x15] 6608 1 T3 1 T43 3 T85 2
valid_sources[0x16] 5935 1 T3 2 T7 1 T16 1
valid_sources[0x17] 5511 1 T3 1 T16 2 T42 4
valid_sources[0x18] 5375 1 T7 1 T43 2 T87 1
valid_sources[0x19] 5439 1 T16 1 T87 3 T21 495
valid_sources[0x1a] 5195 1 T7 2 T16 1 T42 2
valid_sources[0x1b] 6187 1 T16 3 T87 2 T20 623
valid_sources[0x1c] 6271 1 T3 3 T12 2 T87 1
valid_sources[0x1d] 7471 1 T3 3 T7 1 T16 1
valid_sources[0x1e] 7163 1 T3 1 T16 2 T43 4
valid_sources[0x1f] 5932 1 T7 1 T112 2 T84 1
valid_sources[0x20] 6695 1 T3 3 T16 2 T42 3
valid_sources[0x21] 5250 1 T42 8 T111 1 T86 1
valid_sources[0x22] 5720 1 T3 1 T7 1 T16 1
valid_sources[0x23] 5278 1 T3 1 T16 1 T85 1
valid_sources[0x24] 6798 1 T3 1 T42 1 T86 1
valid_sources[0x25] 6159 1 T3 1 T16 1 T85 1
valid_sources[0x26] 5422 1 T3 1 T11 13 T16 1
valid_sources[0x27] 6484 1 T3 1 T16 2 T86 1
valid_sources[0x28] 5958 1 T3 1 T16 1 T43 1
valid_sources[0x29] 5803 1 T2 43 T3 1 T7 2
valid_sources[0x2a] 5228 1 T12 8 T87 2 T62 1
valid_sources[0x2b] 4850 1 T16 5 T43 2 T13 1
valid_sources[0x2c] 6290 1 T3 1 T12 1 T16 3
valid_sources[0x2d] 6878 1 T3 2 T12 18 T16 1
valid_sources[0x2e] 5810 1 T7 2 T110 16 T112 5
valid_sources[0x2f] 7621 1 T7 1 T16 1 T86 2
valid_sources[0x30] 5297 1 T3 6 T85 1 T86 1
valid_sources[0x31] 7102 1 T3 1 T7 1 T12 2
valid_sources[0x32] 5522 1 T3 1 T16 1 T43 1
valid_sources[0x33] 7328 1 T3 1 T7 2 T11 5
valid_sources[0x34] 5730 1 T3 3 T16 5 T128 16
valid_sources[0x35] 5145 1 T3 2 T16 1 T43 1
valid_sources[0x36] 5395 1 T110 15 T86 1 T87 1
valid_sources[0x37] 5440 1 T3 1 T20 220 T60 3
valid_sources[0x38] 6727 1 T12 2 T16 2 T42 1
valid_sources[0x39] 6418 1 T3 4 T12 1 T16 1
valid_sources[0x3a] 6352 1 T11 11 T12 2 T16 1
valid_sources[0x3b] 5343 1 T7 1 T16 4 T87 2
valid_sources[0x3c] 5418 1 T84 2 T87 1 T20 368
valid_sources[0x3d] 6032 1 T3 1 T4 21 T110 8
valid_sources[0x3e] 7667 1 T3 2 T43 2 T85 1
valid_sources[0x3f] 5516 1 T15 1 T16 1 T112 6
valid_sources[0x40] 6155 1 T7 1 T16 1 T112 4
valid_sources[0x41] 5447 1 T16 1 T42 1 T85 1
valid_sources[0x42] 5974 1 T3 2 T43 1 T85 1
valid_sources[0x43] 6228 1 T3 1 T4 46 T7 1
valid_sources[0x44] 6231 1 T11 2 T16 1 T43 2
valid_sources[0x45] 6779 1 T3 2 T16 1 T14 6
valid_sources[0x46] 4891 1 T16 3 T112 4 T87 2
valid_sources[0x47] 7076 1 T3 1 T7 1 T16 1
valid_sources[0x48] 5548 1 T2 21 T3 2 T7 1
valid_sources[0x49] 6703 1 T16 2 T87 1 T20 319
valid_sources[0x4a] 5219 1 T3 1 T12 3 T42 1
valid_sources[0x4b] 5817 1 T7 1 T16 2 T86 1
valid_sources[0x4c] 5465 1 T16 2 T110 11 T37 1
valid_sources[0x4d] 6394 1 T16 1 T42 7 T43 1
valid_sources[0x4e] 5699 1 T15 3 T16 2 T20 281
valid_sources[0x4f] 5870 1 T16 1 T87 2 T20 29
valid_sources[0x50] 6683 1 T2 21 T3 1 T16 2
valid_sources[0x51] 5666 1 T16 1 T85 1 T87 1
valid_sources[0x52] 6228 1 T3 2 T16 1 T43 1
valid_sources[0x53] 5494 1 T16 1 T43 1 T20 391
valid_sources[0x54] 6410 1 T3 1 T43 1 T110 13
valid_sources[0x55] 6308 1 T16 2 T13 1 T86 1
valid_sources[0x56] 5383 1 T12 10 T42 3 T112 7
valid_sources[0x57] 6069 1 T3 2 T7 1 T16 1
valid_sources[0x58] 6084 1 T7 1 T60 2 T62 2
valid_sources[0x59] 6075 1 T3 1 T7 3 T16 2
valid_sources[0x5a] 5250 1 T3 2 T16 1 T21 499
valid_sources[0x5b] 7429 1 T16 1 T43 1 T111 3
valid_sources[0x5c] 5902 1 T3 2 T85 1 T87 3
valid_sources[0x5d] 5972 1 T3 1 T16 2 T43 1
valid_sources[0x5e] 5508 1 T3 2 T43 2 T86 1
valid_sources[0x5f] 5815 1 T7 1 T16 1 T86 1
valid_sources[0x60] 7305 1 T3 4 T16 2 T42 1
valid_sources[0x61] 5456 1 T3 1 T16 2 T87 1
valid_sources[0x62] 5196 1 T3 1 T16 2 T43 1
valid_sources[0x63] 5919 1 T16 3 T43 3 T84 1
valid_sources[0x64] 5140 1 T3 1 T16 2 T42 3
valid_sources[0x65] 6394 1 T7 1 T11 4 T87 2
valid_sources[0x66] 5344 1 T3 2 T16 1 T86 2
valid_sources[0x67] 6561 1 T16 1 T42 3 T43 3
valid_sources[0x68] 6067 1 T43 1 T20 489 T60 2
valid_sources[0x69] 7513 1 T7 1 T16 1 T86 3
valid_sources[0x6a] 6349 1 T3 1 T16 1 T43 1
valid_sources[0x6b] 5541 1 T3 2 T16 3 T110 24
valid_sources[0x6c] 5959 1 T3 1 T16 4 T43 1
valid_sources[0x6d] 5953 1 T3 1 T16 4 T85 1
valid_sources[0x6e] 6007 1 T3 1 T7 1 T16 2
valid_sources[0x6f] 6316 1 T16 1 T110 15 T112 13
valid_sources[0x70] 5155 1 T3 1 T112 8 T85 1
valid_sources[0x71] 5435 1 T16 2 T87 1 T20 297
valid_sources[0x72] 5750 1 T3 1 T16 4 T43 1
valid_sources[0x73] 7425 1 T43 4 T85 1 T87 6
valid_sources[0x74] 6104 1 T11 5 T16 1 T42 10
valid_sources[0x75] 7406 1 T3 1 T12 3 T16 1
valid_sources[0x76] 5720 1 T3 4 T16 3 T13 5
valid_sources[0x77] 5881 1 T43 1 T85 2 T20 256
valid_sources[0x78] 5899 1 T16 1 T43 1 T87 4
valid_sources[0x79] 6738 1 T3 2 T7 1 T12 2
valid_sources[0x7a] 6468 1 T3 1 T16 1 T42 10
valid_sources[0x7b] 5757 1 T3 2 T85 1 T20 482
valid_sources[0x7c] 6219 1 T3 1 T11 2 T16 2
valid_sources[0x7d] 6182 1 T12 1 T16 1 T42 3
valid_sources[0x7e] 5258 1 T3 2 T87 1 T20 230
valid_sources[0x7f] 6266 1 T7 1 T8 6 T87 1
valid_sources[0x80] 7400 1 T3 2 T7 1 T12 5



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 367891 1 T2 4 T3 25 T4 12
values[0x0] all_enables biggest_size 545953 1 T20 29230 T21 46998 T22 9120
values[0x1] all_enables biggest_size 545096 1 T20 29170 T21 46910 T22 9121


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 111413 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1120269 1 T2 17 T3 47 T4 29



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 308574 1 T2 32 T3 96 T4 64
values[0x0] 426869 1 T1 2 T9 4 T10 2
values[0x1] 496239 1 T1 4 T9 5 T10 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 50427 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1181255 1 T1 1 T2 18 T3 53



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 5984 1 T20 256 T21 787 T22 96
valid_sources[0x01] 4754 1 T20 225 T57 16 T60 1
valid_sources[0x02] 5132 1 T20 237 T60 2 T21 395
valid_sources[0x03] 4657 1 T20 288 T60 2 T21 131
valid_sources[0x04] 4642 1 T20 263 T60 1 T62 1
valid_sources[0x05] 4346 1 T49 1 T20 283 T21 316
valid_sources[0x06] 4117 1 T6 5 T12 2 T20 281
valid_sources[0x07] 4413 1 T13 1 T20 274 T60 1
valid_sources[0x08] 4489 1 T20 263 T21 33 T22 61
valid_sources[0x09] 4650 1 T20 259 T21 568 T22 82
valid_sources[0x0a] 3889 1 T20 270 T21 41 T22 79
valid_sources[0x0b] 4676 1 T14 2 T20 239 T60 1
valid_sources[0x0c] 4458 1 T20 273 T60 1 T21 345
valid_sources[0x0d] 4902 1 T84 13 T85 1 T20 239
valid_sources[0x0e] 4263 1 T20 211 T60 1 T21 389
valid_sources[0x0f] 5603 1 T24 1 T36 1 T20 271
valid_sources[0x10] 4430 1 T20 264 T21 271 T22 84
valid_sources[0x11] 3680 1 T85 1 T20 261 T21 89
valid_sources[0x12] 5323 1 T85 1 T20 245 T60 2
valid_sources[0x13] 5215 1 T36 1 T20 273 T60 1
valid_sources[0x14] 4333 1 T20 279 T60 2 T21 257
valid_sources[0x15] 4642 1 T20 232 T60 1 T21 631
valid_sources[0x16] 4560 1 T2 21 T42 5 T20 241
valid_sources[0x17] 4865 1 T7 14 T20 268 T60 2
valid_sources[0x18] 5526 1 T72 1 T20 226 T21 1309
valid_sources[0x19] 4539 1 T87 4 T20 231 T21 472
valid_sources[0x1a] 5319 1 T36 1 T20 225 T21 726
valid_sources[0x1b] 4185 1 T2 5 T20 265 T21 110
valid_sources[0x1c] 4101 1 T87 5 T20 261 T60 1
valid_sources[0x1d] 4565 1 T20 281 T60 1 T21 179
valid_sources[0x1e] 5437 1 T42 10 T20 256 T21 1194
valid_sources[0x1f] 4750 1 T3 8 T13 10 T20 255
valid_sources[0x20] 4038 1 T20 250 T60 1 T21 68
valid_sources[0x21] 5187 1 T42 5 T73 1 T20 240
valid_sources[0x22] 4659 1 T42 1 T20 267 T57 7
valid_sources[0x23] 5676 1 T10 1 T20 278 T62 2
valid_sources[0x24] 5378 1 T20 229 T60 2 T21 191
valid_sources[0x25] 4718 1 T20 261 T21 114 T22 76
valid_sources[0x26] 4164 1 T3 7 T15 4 T36 1
valid_sources[0x27] 4533 1 T42 7 T20 275 T60 1
valid_sources[0x28] 5491 1 T20 235 T60 1 T63 17
valid_sources[0x29] 4873 1 T87 10 T20 266 T60 1
valid_sources[0x2a] 5105 1 T20 277 T62 3 T21 781
valid_sources[0x2b] 4122 1 T20 268 T60 3 T21 385
valid_sources[0x2c] 3557 1 T8 1 T10 1 T14 1
valid_sources[0x2d] 4284 1 T14 1 T20 244 T21 220
valid_sources[0x2e] 4509 1 T20 260 T21 12 T22 76
valid_sources[0x2f] 4443 1 T20 238 T60 1 T21 333
valid_sources[0x30] 4071 1 T20 290 T21 598 T22 81
valid_sources[0x31] 4610 1 T20 259 T21 486 T22 79
valid_sources[0x32] 5617 1 T20 267 T21 407 T22 74
valid_sources[0x33] 5243 1 T71 4 T20 254 T60 2
valid_sources[0x34] 4768 1 T20 256 T21 357 T22 76
valid_sources[0x35] 4515 1 T85 1 T20 286 T21 253
valid_sources[0x36] 5148 1 T8 4 T20 258 T60 2
valid_sources[0x37] 5134 1 T20 253 T21 342 T22 84
valid_sources[0x38] 4290 1 T41 4 T20 240 T60 1
valid_sources[0x39] 5203 1 T5 1 T36 1 T20 241
valid_sources[0x3a] 5599 1 T20 258 T60 1 T21 797
valid_sources[0x3b] 4696 1 T1 2 T20 259 T21 582
valid_sources[0x3c] 4152 1 T20 285 T60 1 T21 3
valid_sources[0x3d] 4573 1 T20 262 T21 95 T22 77
valid_sources[0x3e] 5528 1 T20 258 T21 92 T100 1
valid_sources[0x3f] 5410 1 T85 1 T72 1 T20 272
valid_sources[0x40] 5135 1 T3 1 T20 265 T38 20
valid_sources[0x41] 4563 1 T20 238 T60 1 T21 380
valid_sources[0x42] 5314 1 T42 5 T20 256 T21 1385
valid_sources[0x43] 5021 1 T72 1 T20 268 T21 447
valid_sources[0x44] 4890 1 T20 240 T62 3 T21 338
valid_sources[0x45] 4627 1 T85 3 T20 245 T21 332
valid_sources[0x46] 5208 1 T20 262 T60 1 T21 773
valid_sources[0x47] 4810 1 T20 239 T60 1 T21 346
valid_sources[0x48] 4590 1 T85 1 T20 275 T60 2
valid_sources[0x49] 4253 1 T3 3 T20 246 T60 1
valid_sources[0x4a] 3342 1 T7 9 T85 1 T20 265
valid_sources[0x4b] 4134 1 T36 1 T20 223 T60 1
valid_sources[0x4c] 5483 1 T11 32 T20 243 T60 1
valid_sources[0x4d] 5346 1 T20 258 T60 1 T21 481
valid_sources[0x4e] 4497 1 T15 1 T14 1 T20 259
valid_sources[0x4f] 4855 1 T36 1 T20 241 T60 1
valid_sources[0x50] 4942 1 T9 1 T20 237 T21 278
valid_sources[0x51] 5138 1 T13 1 T20 270 T21 948
valid_sources[0x52] 5042 1 T20 253 T21 424 T22 78
valid_sources[0x53] 5476 1 T20 268 T60 3 T21 757
valid_sources[0x54] 4327 1 T20 269 T21 161 T22 85
valid_sources[0x55] 5519 1 T42 3 T13 9 T20 246
valid_sources[0x56] 4327 1 T20 267 T60 1 T21 439
valid_sources[0x57] 5276 1 T3 2 T20 276 T62 1
valid_sources[0x58] 4517 1 T87 44 T20 257 T21 561
valid_sources[0x59] 4643 1 T20 246 T60 3 T21 156
valid_sources[0x5a] 3702 1 T3 10 T85 1 T20 281
valid_sources[0x5b] 5101 1 T42 3 T14 2 T87 8
valid_sources[0x5c] 4720 1 T20 270 T60 1 T21 189
valid_sources[0x5d] 4469 1 T3 8 T72 1 T20 253
valid_sources[0x5e] 4962 1 T72 1 T20 260 T60 1
valid_sources[0x5f] 5130 1 T20 263 T21 955 T22 75
valid_sources[0x60] 4230 1 T12 19 T20 259 T21 259
valid_sources[0x61] 4366 1 T8 4 T20 285 T21 166
valid_sources[0x62] 4850 1 T7 1 T20 255 T60 1
valid_sources[0x63] 4114 1 T20 253 T21 390 T22 79
valid_sources[0x64] 4449 1 T20 257 T21 445 T22 78
valid_sources[0x65] 4992 1 T72 1 T20 251 T60 1
valid_sources[0x66] 4233 1 T87 49 T20 267 T62 5
valid_sources[0x67] 5008 1 T8 1 T42 1 T14 1
valid_sources[0x68] 5922 1 T20 260 T21 524 T22 96
valid_sources[0x69] 4952 1 T20 289 T21 414 T100 1
valid_sources[0x6a] 5018 1 T36 1 T20 242 T21 467
valid_sources[0x6b] 4611 1 T20 225 T21 125 T22 65
valid_sources[0x6c] 4414 1 T20 232 T21 56 T22 85
valid_sources[0x6d] 4885 1 T20 228 T21 225 T22 75
valid_sources[0x6e] 6078 1 T20 271 T21 1100 T100 1
valid_sources[0x6f] 5070 1 T85 1 T20 292 T21 504
valid_sources[0x70] 4915 1 T42 2 T20 286 T60 1
valid_sources[0x71] 5095 1 T14 1 T20 276 T21 289
valid_sources[0x72] 4432 1 T20 233 T60 1 T21 99
valid_sources[0x73] 4617 1 T20 229 T21 223 T22 60
valid_sources[0x74] 5569 1 T3 2 T42 9 T20 259
valid_sources[0x75] 5942 1 T87 10 T20 272 T21 1069
valid_sources[0x76] 4925 1 T20 240 T59 1 T21 354
valid_sources[0x77] 5329 1 T4 64 T23 1 T13 6
valid_sources[0x78] 5207 1 T20 265 T21 759 T22 77
valid_sources[0x79] 4963 1 T20 271 T21 441 T100 2
valid_sources[0x7a] 4735 1 T14 2 T20 242 T21 376
valid_sources[0x7b] 5364 1 T20 270 T21 748 T100 2
valid_sources[0x7c] 3998 1 T42 3 T20 266 T60 1
valid_sources[0x7d] 4915 1 T15 7 T20 271 T60 2
valid_sources[0x7e] 4323 1 T20 258 T21 500 T100 1
valid_sources[0x7f] 5181 1 T20 279 T21 163 T22 81
valid_sources[0x80] 4534 1 T20 223 T21 274 T22 88



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 283299 1 T2 17 T3 47 T4 29
values[0x0] all_enables biggest_size 417809 1 T9 1 T10 1 T41 2
values[0x1] all_enables biggest_size 419161 1 T9 1 T41 1 T72 2

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