Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	62756	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1413264

1

T1

6

T2

10

T4

30

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	388139	1			T1	6		T2	87		T4	384
values[0x0]	533780	1			T11	14235		T12	50393		T13	15955
values[0x1]	554101	1			T11	15152		T12	52534		T13	16537

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32413	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1443607

1

T1

6

T2

46

T4

218

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5181	1			T15	2		T11	153		T56	6
valid_sources[0x01]	5076	1			T10	1		T16	3		T11	153
valid_sources[0x02]	5077	1			T2	3		T9	1		T10	1
valid_sources[0x03]	5056	1			T7	2		T9	1		T117	1
valid_sources[0x04]	6509	1			T10	1		T16	1		T11	201
valid_sources[0x05]	5151	1			T4	84		T10	1		T11	148
valid_sources[0x06]	5900	1			T11	134		T61	1		T142	1
valid_sources[0x07]	5932	1			T14	10		T16	2		T17	1
valid_sources[0x08]	5760	1			T9	3		T11	162		T60	1
valid_sources[0x09]	5179	1			T7	2		T10	1		T66	17
valid_sources[0x0a]	6639	1			T11	123		T60	1		T61	4
valid_sources[0x0b]	5140	1			T2	5		T116	1		T11	145
valid_sources[0x0c]	5603	1			T10	2		T116	1		T11	145
valid_sources[0x0d]	5189	1			T7	2		T9	2		T10	2
valid_sources[0x0e]	6028	1			T2	1		T10	1		T16	1
valid_sources[0x0f]	5770	1			T10	1		T143	2		T11	140
valid_sources[0x10]	5830	1			T116	2		T11	136		T61	2
valid_sources[0x11]	6587	1			T116	1		T11	146		T61	1
valid_sources[0x12]	4880	1			T117	1		T11	147		T60	1
valid_sources[0x13]	5408	1			T4	35		T116	1		T11	158
valid_sources[0x14]	5343	1			T17	3		T116	2		T143	4
valid_sources[0x15]	6412	1			T16	1		T11	135		T60	2
valid_sources[0x16]	5663	1			T2	4		T11	128		T12	534
valid_sources[0x17]	5504	1			T116	1		T11	135		T56	3
valid_sources[0x18]	6061	1			T116	1		T11	169		T12	449
valid_sources[0x19]	6665	1			T9	1		T11	168		T61	1
valid_sources[0x1a]	5986	1			T116	2		T11	167		T61	1
valid_sources[0x1b]	6655	1			T10	1		T11	117		T59	3
valid_sources[0x1c]	5134	1			T11	191		T61	3		T82	3
valid_sources[0x1d]	5482	1			T10	1		T16	3		T117	1
valid_sources[0x1e]	5636	1			T11	156		T61	4		T82	2
valid_sources[0x1f]	4973	1			T11	166		T61	2		T18	2
valid_sources[0x20]	5435	1			T7	1		T9	1		T116	1
valid_sources[0x21]	5573	1			T2	1		T16	4		T17	12
valid_sources[0x22]	4981	1			T11	140		T83	2		T142	2
valid_sources[0x23]	5929	1			T4	10		T9	2		T16	3
valid_sources[0x24]	6416	1			T11	196		T60	1		T61	2
valid_sources[0x25]	6476	1			T143	2		T11	169		T81	3
valid_sources[0x26]	5966	1			T143	4		T11	142		T61	2
valid_sources[0x27]	5653	1			T9	1		T116	3		T11	197
valid_sources[0x28]	5321	1			T116	1		T11	147		T61	1
valid_sources[0x29]	6043	1			T143	3		T11	131		T12	537
valid_sources[0x2a]	6291	1			T11	186		T56	5		T142	1
valid_sources[0x2b]	5973	1			T11	190		T60	10		T61	3
valid_sources[0x2c]	6274	1			T7	1		T11	192		T61	3
valid_sources[0x2d]	5429	1			T2	1		T7	1		T17	2
valid_sources[0x2e]	5542	1			T2	1		T117	1		T11	148
valid_sources[0x2f]	5673	1			T2	6		T16	3		T117	1
valid_sources[0x30]	6407	1			T7	1		T9	1		T11	195
valid_sources[0x31]	6425	1			T117	3		T11	153		T61	2
valid_sources[0x32]	5564	1			T16	4		T11	141		T61	1
valid_sources[0x33]	5202	1			T7	1		T16	1		T11	126
valid_sources[0x34]	4912	1			T16	2		T143	11		T11	126
valid_sources[0x35]	6111	1			T2	8		T14	7		T143	4
valid_sources[0x36]	6073	1			T17	3		T117	2		T143	1
valid_sources[0x37]	6196	1			T116	1		T11	157		T60	2
valid_sources[0x38]	5722	1			T16	1		T11	180		T60	2
valid_sources[0x39]	5208	1			T7	5		T16	1		T11	174
valid_sources[0x3a]	5909	1			T116	1		T11	155		T61	1
valid_sources[0x3b]	5732	1			T16	1		T143	3		T11	164
valid_sources[0x3c]	6999	1			T2	2		T117	3		T143	1
valid_sources[0x3d]	5320	1			T11	142		T61	1		T12	586
valid_sources[0x3e]	5746	1			T16	4		T11	174		T12	595
valid_sources[0x3f]	5099	1			T2	3		T7	1		T14	1
valid_sources[0x40]	6060	1			T10	1		T116	1		T11	168
valid_sources[0x41]	5438	1			T116	1		T11	135		T59	4
valid_sources[0x42]	6283	1			T16	2		T11	147		T59	1
valid_sources[0x43]	5699	1			T116	2		T11	207		T61	3
valid_sources[0x44]	6202	1			T2	8		T16	4		T17	3
valid_sources[0x45]	5924	1			T15	1		T11	169		T61	3
valid_sources[0x46]	5884	1			T7	4		T9	1		T15	7
valid_sources[0x47]	6885	1			T116	1		T11	135		T61	4
valid_sources[0x48]	5095	1			T7	4		T9	2		T17	5
valid_sources[0x49]	6020	1			T117	1		T11	126		T12	521
valid_sources[0x4a]	5149	1			T2	2		T116	2		T117	1
valid_sources[0x4b]	5366	1			T10	2		T116	1		T11	145
valid_sources[0x4c]	5784	1			T16	1		T66	36		T11	190
valid_sources[0x4d]	5861	1			T14	1		T15	7		T116	1
valid_sources[0x4e]	4932	1			T16	2		T11	136		T61	1
valid_sources[0x4f]	5710	1			T2	1		T16	1		T117	6
valid_sources[0x50]	5938	1			T16	2		T116	1		T11	130
valid_sources[0x51]	5140	1			T11	124		T61	1		T12	559
valid_sources[0x52]	6250	1			T10	1		T116	1		T66	18
valid_sources[0x53]	5482	1			T9	1		T15	2		T11	179
valid_sources[0x54]	4958	1			T9	1		T10	2		T11	189
valid_sources[0x55]	5097	1			T7	2		T10	1		T17	4
valid_sources[0x56]	5564	1			T10	1		T116	1		T117	5
valid_sources[0x57]	5895	1			T1	2		T16	2		T117	1
valid_sources[0x58]	5260	1			T4	37		T11	158		T59	11
valid_sources[0x59]	6386	1			T116	1		T11	173		T118	40
valid_sources[0x5a]	6320	1			T2	1		T9	1		T11	122
valid_sources[0x5b]	6762	1			T15	1		T116	1		T11	170
valid_sources[0x5c]	6091	1			T16	2		T11	132		T61	2
valid_sources[0x5d]	6436	1			T116	1		T11	138		T142	2
valid_sources[0x5e]	5453	1			T7	2		T116	1		T11	140
valid_sources[0x5f]	5275	1			T10	1		T11	165		T60	1
valid_sources[0x60]	6143	1			T15	1		T143	1		T11	147
valid_sources[0x61]	7623	1			T116	2		T143	2		T11	158
valid_sources[0x62]	5602	1			T4	12		T116	3		T117	1
valid_sources[0x63]	5861	1			T15	4		T116	1		T117	5
valid_sources[0x64]	5251	1			T10	1		T11	183		T61	3
valid_sources[0x65]	4812	1			T7	1		T143	2		T11	149
valid_sources[0x66]	5776	1			T16	2		T11	143		T61	3
valid_sources[0x67]	5580	1			T9	2		T10	1		T143	1
valid_sources[0x68]	6045	1			T9	3		T11	156		T60	1
valid_sources[0x69]	6032	1			T10	1		T116	2		T11	116
valid_sources[0x6a]	5900	1			T4	34		T9	2		T10	2
valid_sources[0x6b]	8031	1			T11	142		T118	50		T12	590
valid_sources[0x6c]	6401	1			T116	2		T11	163		T56	4
valid_sources[0x6d]	6022	1			T2	5		T10	3		T117	5
valid_sources[0x6e]	5760	1			T10	1		T16	3		T11	179
valid_sources[0x6f]	4945	1			T11	176		T61	1		T83	1
valid_sources[0x70]	6774	1			T116	2		T11	155		T56	2
valid_sources[0x71]	7294	1			T11	138		T60	1		T12	606
valid_sources[0x72]	5240	1			T17	40		T116	1		T11	137
valid_sources[0x73]	6386	1			T2	3		T9	1		T11	192
valid_sources[0x74]	6792	1			T16	2		T117	7		T11	160
valid_sources[0x75]	5818	1			T7	1		T117	1		T11	129
valid_sources[0x76]	7107	1			T2	2		T11	198		T81	1
valid_sources[0x77]	6393	1			T2	3		T10	1		T11	178
valid_sources[0x78]	7036	1			T10	1		T117	1		T143	6
valid_sources[0x79]	6694	1			T9	3		T15	2		T116	1
valid_sources[0x7a]	5776	1			T117	1		T11	144		T83	3
valid_sources[0x7b]	5042	1			T17	2		T11	244		T60	2
valid_sources[0x7c]	5140	1			T2	3		T10	1		T11	127
valid_sources[0x7d]	5233	1			T10	1		T116	2		T11	146
valid_sources[0x7e]	5291	1			T10	1		T117	1		T11	125
valid_sources[0x7f]	5322	1			T16	2		T116	2		T117	1
valid_sources[0x80]	5507	1			T10	1		T117	1		T11	163

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

355079

1

T1

6

T2

10

T4

30

values[0x0]

all_enables

biggest_size

528817

1

T11

14087

T12

49910

T13

15820

values[0x1]

all_enables

biggest_size

529368

1

T11

14456

T12

50239

T13

15740

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	108969	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1106169

1

T1

9

T2

16

T3

23

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	304488	1			T1	25		T2	32		T3	48
values[0x0]	421385	1			T6	8		T22	9		T11	12313
values[0x1]	489265	1			T6	7		T22	7		T11	13931

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49448	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1165690

1

T1

13

T2

20

T3

28

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4631	1			T11	77		T121	1		T12	416
valid_sources[0x01]	4726	1			T9	1		T16	64		T143	2
valid_sources[0x02]	5171	1			T11	544		T121	1		T12	428
valid_sources[0x03]	4694	1			T10	1		T56	8		T12	422
valid_sources[0x04]	4814	1			T143	1		T12	436		T13	161
valid_sources[0x05]	4686	1			T3	4		T11	183		T12	470
valid_sources[0x06]	4587	1			T14	1		T12	466		T13	138
valid_sources[0x07]	4315	1			T1	1		T11	4		T12	423
valid_sources[0x08]	5261	1			T7	1		T10	4		T116	1
valid_sources[0x09]	4830	1			T1	2		T9	1		T11	73
valid_sources[0x0a]	4409	1			T11	15		T82	1		T12	406
valid_sources[0x0b]	4643	1			T116	1		T12	459		T13	149
valid_sources[0x0c]	4867	1			T11	390		T12	430		T13	207
valid_sources[0x0d]	4800	1			T116	1		T66	2		T11	341
valid_sources[0x0e]	4475	1			T1	1		T17	12		T11	2
valid_sources[0x0f]	4721	1			T122	1		T11	4		T144	2
valid_sources[0x10]	4544	1			T60	1		T121	1		T12	413
valid_sources[0x11]	4489	1			T11	6		T56	1		T121	1
valid_sources[0x12]	4446	1			T116	1		T143	1		T11	7
valid_sources[0x13]	5275	1			T143	1		T11	340		T60	1
valid_sources[0x14]	4562	1			T142	2		T12	429		T13	167
valid_sources[0x15]	4680	1			T10	2		T11	138		T12	414
valid_sources[0x16]	4723	1			T11	293		T12	460		T13	147
valid_sources[0x17]	4869	1			T116	1		T11	76		T121	1
valid_sources[0x18]	4555	1			T11	9		T12	450		T13	168
valid_sources[0x19]	4774	1			T2	32		T14	4		T11	141
valid_sources[0x1a]	4545	1			T116	1		T83	2		T73	1
valid_sources[0x1b]	4514	1			T7	1		T116	1		T143	2
valid_sources[0x1c]	5242	1			T66	2		T11	571		T121	2
valid_sources[0x1d]	4569	1			T11	7		T83	1		T12	430
valid_sources[0x1e]	4800	1			T116	1		T11	229		T62	4
valid_sources[0x1f]	5197	1			T11	675		T59	10		T12	439
valid_sources[0x20]	4447	1			T17	10		T12	422		T145	1
valid_sources[0x21]	4571	1			T12	473		T13	172		T146	2
valid_sources[0x22]	4808	1			T7	1		T11	4		T56	4
valid_sources[0x23]	4874	1			T11	140		T121	2		T12	410
valid_sources[0x24]	4525	1			T11	2		T142	1		T12	417
valid_sources[0x25]	4526	1			T15	1		T11	88		T60	1
valid_sources[0x26]	4335	1			T9	1		T12	484		T145	1
valid_sources[0x27]	4598	1			T56	4		T121	1		T12	420
valid_sources[0x28]	4531	1			T60	1		T121	1		T12	445
valid_sources[0x29]	4417	1			T7	1		T116	1		T66	2
valid_sources[0x2a]	4632	1			T9	1		T143	1		T11	287
valid_sources[0x2b]	4924	1			T14	5		T11	427		T147	1
valid_sources[0x2c]	4770	1			T143	1		T11	176		T60	1
valid_sources[0x2d]	4777	1			T5	1		T9	1		T11	23
valid_sources[0x2e]	4543	1			T7	1		T116	1		T11	167
valid_sources[0x2f]	4694	1			T17	1		T70	2		T144	1
valid_sources[0x30]	4409	1			T1	1		T12	428		T13	157
valid_sources[0x31]	4752	1			T143	1		T12	481		T13	145
valid_sources[0x32]	4461	1			T11	73		T82	5		T12	437
valid_sources[0x33]	4883	1			T11	91		T82	2		T12	431
valid_sources[0x34]	4511	1			T56	1		T12	450		T13	127
valid_sources[0x35]	5300	1			T11	354		T81	1		T12	417
valid_sources[0x36]	4727	1			T1	2		T11	171		T82	2
valid_sources[0x37]	4835	1			T7	1		T11	5		T81	1
valid_sources[0x38]	4824	1			T11	328		T60	2		T12	404
valid_sources[0x39]	4738	1			T7	1		T10	2		T24	1
valid_sources[0x3a]	4564	1			T7	1		T83	1		T121	3
valid_sources[0x3b]	4627	1			T1	2		T10	1		T11	264
valid_sources[0x3c]	4456	1			T7	1		T11	2		T82	2
valid_sources[0x3d]	4648	1			T9	2		T143	3		T11	2
valid_sources[0x3e]	4667	1			T12	441		T13	153		T146	2
valid_sources[0x3f]	4773	1			T15	3		T116	2		T11	161
valid_sources[0x40]	4333	1			T10	3		T15	2		T81	1
valid_sources[0x41]	4503	1			T3	3		T116	1		T11	98
valid_sources[0x42]	5216	1			T116	1		T11	134		T12	407
valid_sources[0x43]	4886	1			T9	2		T15	3		T11	108
valid_sources[0x44]	5261	1			T7	1		T116	1		T143	1
valid_sources[0x45]	4691	1			T11	74		T81	2		T82	3
valid_sources[0x46]	4441	1			T9	1		T11	79		T58	1
valid_sources[0x47]	5110	1			T7	1		T143	1		T11	310
valid_sources[0x48]	4724	1			T3	4		T11	113		T12	470
valid_sources[0x49]	4909	1			T3	1		T143	1		T11	3
valid_sources[0x4a]	4287	1			T7	1		T116	1		T66	1
valid_sources[0x4b]	5148	1			T7	1		T11	269		T81	1
valid_sources[0x4c]	4389	1			T10	1		T14	1		T121	1
valid_sources[0x4d]	4933	1			T116	1		T66	2		T11	138
valid_sources[0x4e]	4513	1			T11	9		T83	2		T12	425
valid_sources[0x4f]	4622	1			T9	1		T66	1		T11	4
valid_sources[0x50]	4896	1			T11	322		T121	1		T12	426
valid_sources[0x51]	4878	1			T3	3		T66	2		T11	146
valid_sources[0x52]	4442	1			T82	2		T144	1		T12	437
valid_sources[0x53]	4450	1			T3	2		T143	1		T56	5
valid_sources[0x54]	4517	1			T116	1		T11	11		T12	445
valid_sources[0x55]	4701	1			T7	1		T143	1		T11	184
valid_sources[0x56]	4941	1			T8	1		T143	1		T11	187
valid_sources[0x57]	5149	1			T10	3		T11	153		T12	440
valid_sources[0x58]	4566	1			T3	5		T10	3		T83	1
valid_sources[0x59]	4707	1			T7	1		T14	8		T121	1
valid_sources[0x5a]	4684	1			T143	1		T11	289		T121	1
valid_sources[0x5b]	5564	1			T9	2		T143	1		T11	81
valid_sources[0x5c]	4559	1			T3	6		T143	1		T121	1
valid_sources[0x5d]	4772	1			T116	1		T143	1		T11	2
valid_sources[0x5e]	4406	1			T121	1		T12	431		T13	146
valid_sources[0x5f]	4819	1			T121	1		T12	461		T13	144
valid_sources[0x60]	4908	1			T11	71		T23	1		T121	1
valid_sources[0x61]	4717	1			T11	157		T12	433		T13	182
valid_sources[0x62]	4817	1			T9	1		T116	1		T66	2
valid_sources[0x63]	4931	1			T11	429		T12	426		T13	176
valid_sources[0x64]	4696	1			T143	1		T11	7		T12	484
valid_sources[0x65]	4938	1			T11	204		T12	440		T13	195
valid_sources[0x66]	4639	1			T116	1		T11	2		T83	1
valid_sources[0x67]	4655	1			T7	1		T14	1		T11	83
valid_sources[0x68]	4577	1			T116	1		T66	1		T11	59
valid_sources[0x69]	5213	1			T15	10		T143	1		T11	176
valid_sources[0x6a]	4790	1			T11	141		T81	1		T121	1
valid_sources[0x6b]	5068	1			T143	1		T11	348		T73	3
valid_sources[0x6c]	4382	1			T9	1		T60	1		T81	1
valid_sources[0x6d]	4833	1			T7	1		T11	329		T12	442
valid_sources[0x6e]	4709	1			T7	1		T116	2		T143	1
valid_sources[0x6f]	4562	1			T116	1		T11	2		T12	468
valid_sources[0x70]	4630	1			T11	150		T18	5		T12	452
valid_sources[0x71]	5273	1			T11	492		T12	453		T13	158
valid_sources[0x72]	4903	1			T11	351		T81	1		T121	2
valid_sources[0x73]	5154	1			T61	128		T12	453		T148	9
valid_sources[0x74]	4727	1			T143	1		T121	1		T12	437
valid_sources[0x75]	4664	1			T11	124		T60	2		T12	427
valid_sources[0x76]	4609	1			T143	1		T11	145		T82	1
valid_sources[0x77]	4708	1			T11	143		T60	1		T12	441
valid_sources[0x78]	4669	1			T10	1		T11	93		T56	1
valid_sources[0x79]	4728	1			T11	144		T12	430		T145	1
valid_sources[0x7a]	5054	1			T11	75		T60	1		T144	1
valid_sources[0x7b]	4743	1			T10	3		T11	1		T60	1
valid_sources[0x7c]	4980	1			T1	4		T7	1		T11	111
valid_sources[0x7d]	4463	1			T1	1		T143	1		T83	2
valid_sources[0x7e]	4874	1			T11	138		T121	1		T12	465
valid_sources[0x7f]	4638	1			T116	1		T11	110		T18	1
valid_sources[0x80]	5063	1			T116	1		T11	591		T121	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

279611

1

T1

9

T2

16

T3

23

values[0x0]

all_enables

biggest_size

412589

1

T6

6

T22

7

T11

12086

values[0x1]

all_enables

biggest_size

413969

1

T6

1

T22

2

T11

12038