Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67585	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1606743

1

T1

25

T2

17

T3

119172

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	439486	1			T1	184		T2	144		T3	30183
values[0x0]	607054	1			T3	45204		T11	69704		T12	12757
values[0x1]	627788	1			T3	46358		T11	71879		T12	13366

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34803	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1639525

1

T1

111

T2

89

T3

120262

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6654	1			T3	462		T8	3		T11	843
valid_sources[0x01]	6953	1			T2	4		T3	406		T6	5
valid_sources[0x02]	6772	1			T3	480		T8	2		T11	779
valid_sources[0x03]	6558	1			T3	535		T8	1		T10	4
valid_sources[0x04]	6150	1			T3	442		T8	2		T11	740
valid_sources[0x05]	6276	1			T3	548		T8	5		T11	691
valid_sources[0x06]	5555	1			T3	388		T9	19		T11	692
valid_sources[0x07]	5755	1			T3	450		T11	767		T12	141
valid_sources[0x08]	6121	1			T3	501		T8	3		T11	704
valid_sources[0x09]	6685	1			T1	44		T3	392		T8	1
valid_sources[0x0a]	7736	1			T3	451		T8	2		T11	795
valid_sources[0x0b]	6466	1			T3	459		T8	1		T11	683
valid_sources[0x0c]	7349	1			T2	1		T3	427		T8	2
valid_sources[0x0d]	6629	1			T3	528		T11	763		T12	140
valid_sources[0x0e]	6156	1			T3	441		T8	1		T11	707
valid_sources[0x0f]	8326	1			T3	464		T8	1		T11	710
valid_sources[0x10]	6539	1			T3	502		T11	725		T12	144
valid_sources[0x11]	7147	1			T3	521		T11	655		T12	128
valid_sources[0x12]	6794	1			T3	455		T11	707		T12	132
valid_sources[0x13]	6696	1			T2	3		T3	446		T8	2
valid_sources[0x14]	5959	1			T3	500		T8	1		T11	668
valid_sources[0x15]	6936	1			T3	420		T6	7		T8	1
valid_sources[0x16]	6144	1			T2	2		T3	438		T8	1
valid_sources[0x17]	6191	1			T2	1		T3	510		T8	2
valid_sources[0x18]	7231	1			T3	451		T7	22		T8	2
valid_sources[0x19]	7047	1			T3	537		T8	3		T11	683
valid_sources[0x1a]	6616	1			T3	519		T5	9		T8	5
valid_sources[0x1b]	6583	1			T3	542		T8	4		T11	725
valid_sources[0x1c]	6057	1			T2	2		T3	563		T8	1
valid_sources[0x1d]	7674	1			T3	471		T6	1		T8	3
valid_sources[0x1e]	6263	1			T1	12		T2	2		T3	456
valid_sources[0x1f]	8109	1			T3	546		T8	1		T11	700
valid_sources[0x20]	7852	1			T3	461		T11	784		T12	119
valid_sources[0x21]	6618	1			T1	75		T3	414		T8	2
valid_sources[0x22]	6126	1			T3	610		T6	3		T8	4
valid_sources[0x23]	6062	1			T3	464		T5	8		T11	703
valid_sources[0x24]	5890	1			T3	408		T8	1		T11	700
valid_sources[0x25]	6238	1			T3	506		T11	764		T12	131
valid_sources[0x26]	5945	1			T3	469		T8	2		T11	733
valid_sources[0x27]	6895	1			T3	503		T11	750		T12	134
valid_sources[0x28]	5566	1			T3	469		T11	635		T12	141
valid_sources[0x29]	6198	1			T3	458		T5	3		T8	1
valid_sources[0x2a]	7229	1			T3	442		T8	3		T10	1
valid_sources[0x2b]	6314	1			T3	496		T8	1		T11	729
valid_sources[0x2c]	6495	1			T3	426		T11	681		T12	117
valid_sources[0x2d]	6704	1			T3	509		T8	1		T11	754
valid_sources[0x2e]	6050	1			T3	416		T8	2		T11	682
valid_sources[0x2f]	6233	1			T3	545		T6	1		T8	2
valid_sources[0x30]	7502	1			T2	2		T3	497		T8	2
valid_sources[0x31]	6485	1			T3	426		T8	1		T11	731
valid_sources[0x32]	6227	1			T2	2		T3	469		T9	16
valid_sources[0x33]	5776	1			T3	437		T11	710		T12	141
valid_sources[0x34]	6444	1			T3	474		T8	2		T10	5
valid_sources[0x35]	7244	1			T2	5		T3	490		T11	667
valid_sources[0x36]	5406	1			T2	7		T3	527		T8	1
valid_sources[0x37]	6858	1			T3	484		T6	1		T11	711
valid_sources[0x38]	5960	1			T3	477		T8	1		T11	713
valid_sources[0x39]	6151	1			T2	3		T3	553		T11	728
valid_sources[0x3a]	6662	1			T3	398		T8	2		T11	724
valid_sources[0x3b]	6232	1			T3	525		T11	734		T12	128
valid_sources[0x3c]	6614	1			T3	576		T8	2		T11	752
valid_sources[0x3d]	6208	1			T3	461		T7	13		T8	1
valid_sources[0x3e]	5667	1			T3	454		T11	732		T12	119
valid_sources[0x3f]	5964	1			T2	1		T3	519		T11	748
valid_sources[0x40]	6787	1			T2	4		T3	506		T11	796
valid_sources[0x41]	6356	1			T3	527		T5	4		T11	706
valid_sources[0x42]	6650	1			T3	478		T6	6		T11	711
valid_sources[0x43]	6402	1			T3	508		T8	1		T11	712
valid_sources[0x44]	5829	1			T3	510		T11	716		T12	144
valid_sources[0x45]	6844	1			T3	547		T11	671		T12	129
valid_sources[0x46]	6150	1			T3	527		T8	3		T11	739
valid_sources[0x47]	5274	1			T3	454		T11	721		T12	125
valid_sources[0x48]	5881	1			T3	447		T8	2		T11	776
valid_sources[0x49]	5828	1			T3	451		T11	714		T12	122
valid_sources[0x4a]	5750	1			T3	422		T11	672		T12	143
valid_sources[0x4b]	6043	1			T2	2		T3	429		T9	14
valid_sources[0x4c]	6005	1			T3	468		T8	4		T11	771
valid_sources[0x4d]	6863	1			T3	410		T8	2		T11	692
valid_sources[0x4e]	6433	1			T3	413		T5	6		T8	1
valid_sources[0x4f]	6023	1			T3	473		T8	1		T11	704
valid_sources[0x50]	6808	1			T3	467		T7	36		T11	789
valid_sources[0x51]	6360	1			T3	435		T11	731		T12	126
valid_sources[0x52]	6340	1			T3	383		T6	2		T10	11
valid_sources[0x53]	6116	1			T3	492		T8	1		T11	755
valid_sources[0x54]	6068	1			T3	501		T8	1		T11	755
valid_sources[0x55]	6390	1			T3	489		T11	805		T12	137
valid_sources[0x56]	5927	1			T2	3		T3	435		T8	3
valid_sources[0x57]	5629	1			T2	1		T3	493		T8	2
valid_sources[0x58]	5217	1			T3	400		T8	3		T10	2
valid_sources[0x59]	6096	1			T2	2		T3	475		T8	3
valid_sources[0x5a]	6691	1			T3	580		T8	2		T11	776
valid_sources[0x5b]	7791	1			T3	447		T10	4		T11	788
valid_sources[0x5c]	8776	1			T3	526		T8	1		T11	792
valid_sources[0x5d]	7287	1			T2	2		T3	427		T8	1
valid_sources[0x5e]	5775	1			T3	490		T11	744		T12	133
valid_sources[0x5f]	7623	1			T3	465		T5	7		T8	1
valid_sources[0x60]	6753	1			T3	407		T8	2		T11	758
valid_sources[0x61]	6468	1			T3	536		T8	2		T11	724
valid_sources[0x62]	5761	1			T3	455		T8	1		T11	790
valid_sources[0x63]	7777	1			T3	470		T8	2		T11	706
valid_sources[0x64]	6596	1			T2	1		T3	511		T8	1
valid_sources[0x65]	6853	1			T2	1		T3	503		T8	3
valid_sources[0x66]	7289	1			T2	4		T3	401		T8	1
valid_sources[0x67]	5931	1			T3	422		T11	799		T12	129
valid_sources[0x68]	6642	1			T3	398		T8	2		T10	5
valid_sources[0x69]	7250	1			T3	481		T10	1		T11	752
valid_sources[0x6a]	5777	1			T3	467		T8	1		T11	796
valid_sources[0x6b]	5778	1			T3	461		T10	2		T11	735
valid_sources[0x6c]	5899	1			T3	471		T9	24		T11	643
valid_sources[0x6d]	6800	1			T3	534		T8	1		T11	818
valid_sources[0x6e]	6498	1			T3	438		T8	1		T11	780
valid_sources[0x6f]	6356	1			T3	510		T5	1		T11	662
valid_sources[0x70]	6275	1			T3	476		T8	1		T11	724
valid_sources[0x71]	5662	1			T3	446		T8	3		T11	804
valid_sources[0x72]	6935	1			T3	464		T11	680		T12	131
valid_sources[0x73]	6823	1			T1	13		T2	8		T3	501
valid_sources[0x74]	7174	1			T2	1		T3	483		T5	4
valid_sources[0x75]	5991	1			T2	12		T3	431		T6	3
valid_sources[0x76]	7944	1			T2	3		T3	440		T8	1
valid_sources[0x77]	6788	1			T3	385		T8	1		T11	677
valid_sources[0x78]	5223	1			T2	1		T3	526		T8	2
valid_sources[0x79]	7879	1			T3	437		T5	1		T11	724
valid_sources[0x7a]	7351	1			T2	2		T3	426		T8	3
valid_sources[0x7b]	5944	1			T3	444		T8	1		T11	717
valid_sources[0x7c]	7645	1			T3	483		T8	1		T11	797
valid_sources[0x7d]	5348	1			T1	22		T3	379		T8	1
valid_sources[0x7e]	7502	1			T2	1		T3	490		T11	805
valid_sources[0x7f]	7467	1			T3	529		T11	751		T12	125
valid_sources[0x80]	7166	1			T3	516		T8	2		T11	731

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

404135

1

T1

25

T2

17

T3

29805

values[0x0]

all_enables

biggest_size

601800

1

T3

44838

T11

69056

T12

12645

values[0x1]

all_enables

biggest_size

600808

1

T3

44529

T11

68654

T12

12774

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	121943	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1233072

1

T2

23

T3

83402

T5

20

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	339746	1			T2	64		T3	22292		T4	1
values[0x0]	469573	1			T3	31881		T11	52903		T12	9468
values[0x1]	545696	1			T3	36932		T11	61118		T12	10998

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	55240	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1299775

1

T2

31

T3

87891

T5

23

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5108	1			T3	331		T11	649		T12	111
valid_sources[0x01]	4363	1			T3	181		T11	672		T12	92
valid_sources[0x02]	5714	1			T3	718		T11	847		T12	115
valid_sources[0x03]	5292	1			T3	549		T11	514		T12	111
valid_sources[0x04]	5143	1			T3	255		T11	517		T12	107
valid_sources[0x05]	4597	1			T3	131		T11	442		T12	116
valid_sources[0x06]	5068	1			T3	244		T11	869		T12	77
valid_sources[0x07]	4921	1			T3	184		T11	461		T12	105
valid_sources[0x08]	5454	1			T3	786		T11	497		T12	92
valid_sources[0x09]	4444	1			T3	414		T11	523		T12	90
valid_sources[0x0a]	5175	1			T3	343		T11	532		T12	103
valid_sources[0x0b]	6233	1			T3	272		T11	683		T12	116
valid_sources[0x0c]	6363	1			T3	427		T11	643		T12	120
valid_sources[0x0d]	5136	1			T3	79		T11	620		T12	109
valid_sources[0x0e]	6743	1			T3	315		T11	710		T12	142
valid_sources[0x0f]	4995	1			T3	145		T11	377		T12	89
valid_sources[0x10]	5134	1			T3	156		T7	1		T11	604
valid_sources[0x11]	4676	1			T3	401		T11	355		T12	119
valid_sources[0x12]	7192	1			T3	483		T7	1		T11	547
valid_sources[0x13]	5918	1			T3	299		T5	1		T11	669
valid_sources[0x14]	4351	1			T3	169		T7	1		T11	537
valid_sources[0x15]	5337	1			T3	246		T11	575		T12	122
valid_sources[0x16]	3792	1			T3	118		T11	439		T12	110
valid_sources[0x17]	4965	1			T3	337		T11	638		T12	103
valid_sources[0x18]	4932	1			T3	273		T11	832		T12	92
valid_sources[0x19]	4915	1			T3	305		T11	578		T12	105
valid_sources[0x1a]	5516	1			T3	185		T11	730		T12	115
valid_sources[0x1b]	5285	1			T3	218		T7	1		T11	506
valid_sources[0x1c]	5607	1			T3	247		T5	1		T11	470
valid_sources[0x1d]	5214	1			T3	363		T11	546		T12	105
valid_sources[0x1e]	4868	1			T3	42		T11	642		T12	125
valid_sources[0x1f]	4669	1			T3	178		T11	617		T12	113
valid_sources[0x20]	5339	1			T3	307		T11	526		T12	72
valid_sources[0x21]	4839	1			T3	322		T5	1		T7	1
valid_sources[0x22]	4820	1			T3	128		T11	574		T12	112
valid_sources[0x23]	6274	1			T3	475		T6	2		T11	640
valid_sources[0x24]	6680	1			T3	430		T11	409		T12	133
valid_sources[0x25]	5688	1			T3	408		T11	611		T12	96
valid_sources[0x26]	4939	1			T3	267		T7	1		T11	755
valid_sources[0x27]	4655	1			T3	318		T5	1		T11	649
valid_sources[0x28]	4704	1			T3	526		T11	557		T12	117
valid_sources[0x29]	4539	1			T3	85		T11	745		T12	97
valid_sources[0x2a]	5043	1			T3	407		T11	547		T12	106
valid_sources[0x2b]	5090	1			T3	95		T11	450		T12	123
valid_sources[0x2c]	4475	1			T3	570		T11	622		T12	135
valid_sources[0x2d]	5861	1			T3	823		T7	1		T11	786
valid_sources[0x2e]	4446	1			T3	313		T11	468		T12	75
valid_sources[0x2f]	4885	1			T3	116		T5	1		T11	809
valid_sources[0x30]	6307	1			T2	18		T3	255		T11	447
valid_sources[0x31]	4992	1			T3	229		T11	489		T12	86
valid_sources[0x32]	5332	1			T3	277		T11	725		T12	94
valid_sources[0x33]	6226	1			T3	684		T11	610		T12	107
valid_sources[0x34]	4111	1			T3	162		T11	616		T12	88
valid_sources[0x35]	5169	1			T2	8		T3	125		T11	888
valid_sources[0x36]	4702	1			T3	148		T11	552		T12	99
valid_sources[0x37]	6067	1			T3	487		T11	660		T12	124
valid_sources[0x38]	5583	1			T3	475		T11	535		T12	123
valid_sources[0x39]	5336	1			T3	578		T11	1014		T12	96
valid_sources[0x3a]	4535	1			T3	371		T11	547		T12	109
valid_sources[0x3b]	4962	1			T3	537		T11	602		T12	117
valid_sources[0x3c]	5510	1			T3	557		T6	1		T11	345
valid_sources[0x3d]	5759	1			T3	344		T11	327		T12	99
valid_sources[0x3e]	4928	1			T3	484		T11	622		T12	86
valid_sources[0x3f]	4671	1			T3	204		T11	448		T12	119
valid_sources[0x40]	4838	1			T3	441		T11	563		T12	105
valid_sources[0x41]	4911	1			T3	25		T5	1		T10	32
valid_sources[0x42]	5663	1			T3	591		T11	727		T12	108
valid_sources[0x43]	6160	1			T3	421		T11	531		T12	117
valid_sources[0x44]	6245	1			T3	302		T11	738		T12	109
valid_sources[0x45]	5099	1			T3	119		T11	574		T12	107
valid_sources[0x46]	5568	1			T3	315		T11	443		T12	98
valid_sources[0x47]	5414	1			T3	312		T11	647		T12	126
valid_sources[0x48]	5540	1			T3	580		T11	642		T12	115
valid_sources[0x49]	5744	1			T3	467		T11	572		T12	120
valid_sources[0x4a]	5406	1			T3	238		T7	1		T11	673
valid_sources[0x4b]	6688	1			T3	635		T11	610		T12	96
valid_sources[0x4c]	5253	1			T3	128		T7	3		T11	608
valid_sources[0x4d]	6705	1			T3	179		T11	487		T12	110
valid_sources[0x4e]	4861	1			T3	608		T11	503		T12	106
valid_sources[0x4f]	5956	1			T3	625		T11	631		T12	121
valid_sources[0x50]	4891	1			T3	443		T5	1		T11	523
valid_sources[0x51]	7481	1			T3	526		T5	1		T7	1
valid_sources[0x52]	4835	1			T3	247		T11	601		T12	85
valid_sources[0x53]	4749	1			T3	474		T11	398		T12	108
valid_sources[0x54]	4360	1			T3	295		T11	727		T12	103
valid_sources[0x55]	5359	1			T2	4		T3	365		T11	399
valid_sources[0x56]	4703	1			T3	379		T5	1		T11	552
valid_sources[0x57]	4718	1			T3	449		T11	541		T12	132
valid_sources[0x58]	4912	1			T3	106		T11	688		T12	112
valid_sources[0x59]	5293	1			T3	191		T11	360		T12	118
valid_sources[0x5a]	5802	1			T3	532		T11	493		T12	93
valid_sources[0x5b]	4910	1			T3	128		T5	1		T11	476
valid_sources[0x5c]	4670	1			T3	83		T7	1		T11	806
valid_sources[0x5d]	5283	1			T3	412		T7	1		T11	514
valid_sources[0x5e]	6988	1			T3	784		T7	1		T11	642
valid_sources[0x5f]	5054	1			T3	242		T11	633		T12	140
valid_sources[0x60]	6106	1			T3	453		T11	756		T12	148
valid_sources[0x61]	4628	1			T3	327		T11	534		T12	102
valid_sources[0x62]	5242	1			T3	366		T11	681		T12	105
valid_sources[0x63]	5217	1			T3	293		T11	870		T12	99
valid_sources[0x64]	4869	1			T3	555		T6	3		T11	754
valid_sources[0x65]	6444	1			T3	513		T11	714		T12	91
valid_sources[0x66]	5105	1			T3	377		T11	586		T12	108
valid_sources[0x67]	4708	1			T3	580		T6	12		T11	462
valid_sources[0x68]	4644	1			T3	55		T11	747		T12	120
valid_sources[0x69]	5257	1			T3	406		T11	821		T12	93
valid_sources[0x6a]	4585	1			T3	352		T11	496		T12	126
valid_sources[0x6b]	5727	1			T3	737		T11	652		T12	129
valid_sources[0x6c]	5734	1			T3	707		T11	634		T12	121
valid_sources[0x6d]	6337	1			T3	593		T4	1		T5	1
valid_sources[0x6e]	6444	1			T3	483		T11	392		T12	122
valid_sources[0x6f]	6526	1			T3	433		T11	457		T12	135
valid_sources[0x70]	4972	1			T3	320		T5	1		T11	620
valid_sources[0x71]	5276	1			T3	549		T5	1		T11	572
valid_sources[0x72]	4588	1			T3	314		T7	2		T11	658
valid_sources[0x73]	4314	1			T3	74		T11	515		T12	100
valid_sources[0x74]	5696	1			T3	192		T11	688		T12	114
valid_sources[0x75]	4983	1			T3	191		T11	352		T12	109
valid_sources[0x76]	5811	1			T3	209		T11	637		T12	105
valid_sources[0x77]	6168	1			T3	548		T11	600		T12	126
valid_sources[0x78]	5241	1			T3	380		T11	480		T12	87
valid_sources[0x79]	4723	1			T3	510		T11	335		T12	79
valid_sources[0x7a]	5963	1			T3	426		T11	649		T12	90
valid_sources[0x7b]	4666	1			T3	747		T11	272		T12	121
valid_sources[0x7c]	4957	1			T3	212		T11	480		T12	80
valid_sources[0x7d]	6332	1			T3	455		T7	1		T11	483
valid_sources[0x7e]	5450	1			T3	34		T11	501		T12	97
valid_sources[0x7f]	6229	1			T3	467		T11	703		T12	140
valid_sources[0x80]	6043	1			T3	944		T11	622		T12	100

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

312280

1

T2

23

T3

21000

T5

20

values[0x0]

all_enables

biggest_size

459763

1

T3

31273

T11

51850

T12

9248

values[0x1]

all_enables

biggest_size

461029

1

T3

31129

T11

51662

T12

9140