Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	78214	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1999740

1

T2

132270

T3

3

T4

14

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	539834	1			T2	34028		T3	3		T4	134
values[0x0]	755215	1			T2	49999		T11	18818		T20	44031
values[0x1]	782905	1			T2	51899		T11	19462		T20	45473

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	40631	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

2037323

1

T2

133877

T3

3

T4

83

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8385	1			T2	547		T5	3		T11	207
valid_sources[0x01]	9986	1			T2	516		T5	2		T8	1
valid_sources[0x02]	8003	1			T2	556		T5	5		T8	1
valid_sources[0x03]	8017	1			T2	604		T4	3		T8	1
valid_sources[0x04]	8889	1			T2	569		T5	2		T8	2
valid_sources[0x05]	7458	1			T2	501		T5	4		T11	172
valid_sources[0x06]	8387	1			T2	514		T8	1		T11	193
valid_sources[0x07]	6720	1			T2	522		T5	2		T8	2
valid_sources[0x08]	7067	1			T2	542		T11	203		T12	2
valid_sources[0x09]	8237	1			T2	530		T4	1		T11	213
valid_sources[0x0a]	8444	1			T2	490		T8	3		T11	202
valid_sources[0x0b]	7820	1			T2	540		T8	1		T11	206
valid_sources[0x0c]	6847	1			T2	521		T5	6		T8	1
valid_sources[0x0d]	10084	1			T2	557		T4	2		T5	2
valid_sources[0x0e]	9694	1			T2	581		T4	1		T5	2
valid_sources[0x0f]	7822	1			T2	581		T9	1		T11	212
valid_sources[0x10]	7544	1			T2	536		T5	1		T11	192
valid_sources[0x11]	7191	1			T2	566		T8	1		T11	222
valid_sources[0x12]	7937	1			T2	533		T5	6		T8	3
valid_sources[0x13]	7340	1			T2	575		T8	1		T9	1
valid_sources[0x14]	8525	1			T2	502		T4	1		T5	1
valid_sources[0x15]	6591	1			T2	510		T5	13		T8	1
valid_sources[0x16]	8412	1			T2	543		T8	1		T11	197
valid_sources[0x17]	10504	1			T2	542		T5	4		T8	2
valid_sources[0x18]	7486	1			T2	510		T4	4		T11	186
valid_sources[0x19]	9425	1			T2	477		T4	1		T11	203
valid_sources[0x1a]	9406	1			T2	540		T8	2		T11	235
valid_sources[0x1b]	9698	1			T2	514		T8	1		T9	3
valid_sources[0x1c]	8149	1			T2	496		T11	197		T12	1
valid_sources[0x1d]	8579	1			T2	544		T11	205		T14	8
valid_sources[0x1e]	8910	1			T2	535		T5	1		T11	174
valid_sources[0x1f]	8470	1			T2	554		T5	7		T8	1
valid_sources[0x20]	7842	1			T2	519		T4	1		T5	3
valid_sources[0x21]	7958	1			T2	531		T5	2		T8	1
valid_sources[0x22]	6116	1			T2	520		T8	1		T11	207
valid_sources[0x23]	8021	1			T2	563		T5	3		T9	1
valid_sources[0x24]	5855	1			T2	495		T8	4		T11	210
valid_sources[0x25]	7403	1			T2	502		T5	2		T8	2
valid_sources[0x26]	7876	1			T2	572		T4	1		T5	1
valid_sources[0x27]	7610	1			T2	536		T8	1		T9	1
valid_sources[0x28]	6802	1			T2	525		T8	2		T9	1
valid_sources[0x29]	7574	1			T2	473		T11	167		T20	756
valid_sources[0x2a]	9861	1			T2	520		T9	2		T11	197
valid_sources[0x2b]	10071	1			T2	502		T4	2		T11	210
valid_sources[0x2c]	8682	1			T2	547		T9	2		T11	183
valid_sources[0x2d]	10164	1			T2	550		T7	1		T8	1
valid_sources[0x2e]	6759	1			T2	493		T4	3		T5	1
valid_sources[0x2f]	9054	1			T2	552		T4	6		T8	1
valid_sources[0x30]	7867	1			T2	491		T4	1		T9	1
valid_sources[0x31]	10217	1			T2	587		T5	11		T11	207
valid_sources[0x32]	7192	1			T2	515		T5	2		T11	216
valid_sources[0x33]	8231	1			T2	537		T4	1		T8	2
valid_sources[0x34]	8180	1			T2	528		T4	1		T8	3
valid_sources[0x35]	6267	1			T2	589		T4	2		T5	4
valid_sources[0x36]	8694	1			T2	542		T4	1		T11	233
valid_sources[0x37]	7554	1			T2	524		T8	1		T9	2
valid_sources[0x38]	7806	1			T2	481		T5	1		T8	1
valid_sources[0x39]	9644	1			T2	552		T8	2		T10	1
valid_sources[0x3a]	9067	1			T2	517		T5	4		T8	1
valid_sources[0x3b]	8639	1			T2	516		T11	198		T20	1042
valid_sources[0x3c]	7089	1			T2	612		T11	217		T20	326
valid_sources[0x3d]	6360	1			T2	490		T11	181		T70	1
valid_sources[0x3e]	6589	1			T2	532		T4	1		T5	4
valid_sources[0x3f]	8316	1			T2	529		T11	200		T20	360
valid_sources[0x40]	6938	1			T2	538		T5	4		T8	1
valid_sources[0x41]	13464	1			T2	510		T11	186		T70	2
valid_sources[0x42]	7302	1			T2	495		T8	2		T11	183
valid_sources[0x43]	7473	1			T2	537		T8	1		T11	194
valid_sources[0x44]	7366	1			T2	529		T8	2		T9	1
valid_sources[0x45]	7455	1			T2	477		T8	1		T11	213
valid_sources[0x46]	9386	1			T2	493		T5	3		T8	1
valid_sources[0x47]	7735	1			T2	503		T5	10		T11	211
valid_sources[0x48]	7804	1			T2	541		T9	3		T11	221
valid_sources[0x49]	7113	1			T2	556		T8	1		T9	1
valid_sources[0x4a]	7540	1			T2	500		T8	1		T9	2
valid_sources[0x4b]	8127	1			T2	583		T8	1		T11	195
valid_sources[0x4c]	8246	1			T2	573		T11	204		T12	1
valid_sources[0x4d]	7708	1			T2	562		T11	208		T110	3
valid_sources[0x4e]	9979	1			T2	494		T11	220		T20	1413
valid_sources[0x4f]	8255	1			T2	536		T8	1		T9	6
valid_sources[0x50]	9337	1			T2	543		T4	1		T5	11
valid_sources[0x51]	6824	1			T2	542		T8	1		T11	206
valid_sources[0x52]	7180	1			T2	537		T4	1		T5	3
valid_sources[0x53]	8108	1			T2	546		T4	1		T5	1
valid_sources[0x54]	7778	1			T2	492		T7	1		T11	204
valid_sources[0x55]	6794	1			T2	497		T8	1		T9	1
valid_sources[0x56]	7701	1			T2	511		T4	1		T11	173
valid_sources[0x57]	6608	1			T2	510		T8	2		T11	230
valid_sources[0x58]	8479	1			T2	544		T4	2		T8	2
valid_sources[0x59]	12188	1			T2	537		T4	1		T5	3
valid_sources[0x5a]	11128	1			T2	559		T8	3		T11	189
valid_sources[0x5b]	7201	1			T2	477		T4	1		T11	188
valid_sources[0x5c]	8624	1			T2	520		T4	1		T11	218
valid_sources[0x5d]	7096	1			T2	549		T11	196		T12	1
valid_sources[0x5e]	7305	1			T2	506		T11	209		T20	1546
valid_sources[0x5f]	7705	1			T2	507		T5	1		T11	184
valid_sources[0x60]	7574	1			T2	529		T4	2		T5	1
valid_sources[0x61]	7616	1			T2	527		T8	2		T11	195
valid_sources[0x62]	9170	1			T2	512		T5	5		T8	1
valid_sources[0x63]	9884	1			T2	543		T4	3		T8	2
valid_sources[0x64]	8404	1			T2	467		T5	2		T8	1
valid_sources[0x65]	5683	1			T2	536		T4	1		T8	1
valid_sources[0x66]	8669	1			T2	469		T8	2		T9	1
valid_sources[0x67]	8145	1			T2	482		T4	1		T11	208
valid_sources[0x68]	7185	1			T2	518		T9	2		T11	174
valid_sources[0x69]	7678	1			T2	525		T4	2		T7	1
valid_sources[0x6a]	8328	1			T2	503		T5	1		T8	3
valid_sources[0x6b]	7904	1			T2	496		T5	1		T8	1
valid_sources[0x6c]	8506	1			T2	524		T8	3		T9	2
valid_sources[0x6d]	7773	1			T2	476		T5	7		T11	200
valid_sources[0x6e]	9259	1			T2	478		T5	9		T11	188
valid_sources[0x6f]	8282	1			T2	550		T5	1		T9	3
valid_sources[0x70]	7105	1			T2	521		T5	4		T11	193
valid_sources[0x71]	9720	1			T2	512		T5	2		T8	1
valid_sources[0x72]	6240	1			T2	499		T5	3		T8	1
valid_sources[0x73]	9594	1			T2	541		T4	1		T8	1
valid_sources[0x74]	10251	1			T2	510		T4	1		T11	202
valid_sources[0x75]	7166	1			T2	517		T4	1		T8	1
valid_sources[0x76]	8751	1			T2	580		T4	2		T8	4
valid_sources[0x77]	8497	1			T2	542		T11	190		T20	152
valid_sources[0x78]	7241	1			T2	534		T5	4		T8	3
valid_sources[0x79]	8587	1			T2	555		T8	1		T11	190
valid_sources[0x7a]	7418	1			T2	572		T4	2		T11	202
valid_sources[0x7b]	8970	1			T2	544		T4	1		T8	1
valid_sources[0x7c]	10834	1			T2	587		T4	1		T8	4
valid_sources[0x7d]	9375	1			T2	536		T11	201		T20	250
valid_sources[0x7e]	8473	1			T2	517		T4	1		T11	225
valid_sources[0x7f]	7123	1			T2	515		T4	1		T5	5
valid_sources[0x80]	7186	1			T2	557		T5	3		T8	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

502592

1

T2

33050

T3

3

T4

14

values[0x0]

all_enables

biggest_size

748658

1

T2

49562

T11

18616

T20

43673

values[0x1]

all_enables

biggest_size

748490

1

T2

49658

T11

18552

T20

43518

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	148570	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1551358

1

T1

2

T2

101868

T3

13

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	423571	1			T2	27257		T3	27		T4	64
values[0x0]	590874	1			T1	8		T2	38816		T11	15995
values[0x1]	685483	1			T1	10		T2	45090		T11	18154

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	66244	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1633684

1

T1

4

T2

107170

T3

15

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6801	1			T2	464		T11	210		T20	461
valid_sources[0x01]	7263	1			T2	601		T11	174		T20	464
valid_sources[0x02]	6130	1			T2	362		T4	1		T7	1
valid_sources[0x03]	6728	1			T2	467		T11	192		T20	334
valid_sources[0x04]	6919	1			T2	423		T10	3		T11	179
valid_sources[0x05]	6980	1			T2	619		T11	167		T20	621
valid_sources[0x06]	6024	1			T2	233		T11	171		T20	147
valid_sources[0x07]	7300	1			T2	572		T9	64		T11	167
valid_sources[0x08]	6646	1			T2	396		T11	185		T20	155
valid_sources[0x09]	6483	1			T2	357		T11	206		T20	561
valid_sources[0x0a]	6763	1			T2	330		T11	182		T20	275
valid_sources[0x0b]	6498	1			T2	584		T10	6		T11	205
valid_sources[0x0c]	6585	1			T2	385		T11	171		T22	1
valid_sources[0x0d]	6086	1			T2	355		T11	180		T20	230
valid_sources[0x0e]	6792	1			T2	351		T11	175		T20	538
valid_sources[0x0f]	6808	1			T2	375		T11	159		T20	295
valid_sources[0x10]	6568	1			T2	536		T11	202		T20	196
valid_sources[0x11]	6757	1			T2	306		T3	8		T11	189
valid_sources[0x12]	7574	1			T2	409		T11	178		T20	884
valid_sources[0x13]	6594	1			T2	389		T11	198		T14	1
valid_sources[0x14]	6458	1			T2	439		T4	5		T11	184
valid_sources[0x15]	6871	1			T2	617		T11	185		T20	418
valid_sources[0x16]	6847	1			T2	373		T11	172		T70	1
valid_sources[0x17]	6484	1			T2	619		T11	174		T12	4
valid_sources[0x18]	7025	1			T2	621		T11	187		T20	479
valid_sources[0x19]	6448	1			T2	265		T11	170		T20	531
valid_sources[0x1a]	6073	1			T2	289		T4	1		T11	155
valid_sources[0x1b]	6593	1			T2	553		T11	190		T70	2
valid_sources[0x1c]	6151	1			T2	517		T11	166		T20	88
valid_sources[0x1d]	6708	1			T2	395		T11	181		T20	244
valid_sources[0x1e]	6905	1			T2	266		T11	173		T70	4
valid_sources[0x1f]	6513	1			T2	522		T4	11		T11	193
valid_sources[0x20]	6359	1			T2	330		T11	185		T70	2
valid_sources[0x21]	6936	1			T2	366		T11	181		T14	1
valid_sources[0x22]	7184	1			T2	511		T11	168		T20	436
valid_sources[0x23]	7022	1			T2	402		T11	177		T12	2
valid_sources[0x24]	6776	1			T2	379		T11	155		T20	575
valid_sources[0x25]	6324	1			T2	304		T11	187		T20	261
valid_sources[0x26]	7406	1			T2	585		T11	164		T20	1198
valid_sources[0x27]	6549	1			T2	379		T11	166		T20	468
valid_sources[0x28]	6841	1			T2	467		T11	150		T20	468
valid_sources[0x29]	7231	1			T2	588		T7	1		T11	177
valid_sources[0x2a]	6666	1			T2	660		T11	181		T20	400
valid_sources[0x2b]	6386	1			T2	492		T11	181		T70	1
valid_sources[0x2c]	6708	1			T2	503		T11	152		T20	600
valid_sources[0x2d]	6455	1			T2	341		T7	1		T11	183
valid_sources[0x2e]	6850	1			T2	452		T11	180		T20	381
valid_sources[0x2f]	6105	1			T2	355		T10	4		T11	183
valid_sources[0x30]	6923	1			T2	448		T7	1		T11	151
valid_sources[0x31]	6219	1			T2	507		T11	179		T20	163
valid_sources[0x32]	6993	1			T2	482		T11	168		T20	450
valid_sources[0x33]	6540	1			T2	485		T11	204		T20	377
valid_sources[0x34]	6657	1			T2	513		T11	162		T20	247
valid_sources[0x35]	6674	1			T2	550		T7	1		T11	152
valid_sources[0x36]	6443	1			T2	379		T11	172		T14	2
valid_sources[0x37]	6563	1			T2	350		T11	172		T20	360
valid_sources[0x38]	6116	1			T2	288		T11	149		T20	289
valid_sources[0x39]	6580	1			T2	580		T11	165		T14	1
valid_sources[0x3a]	6465	1			T2	321		T11	182		T20	193
valid_sources[0x3b]	6631	1			T2	409		T11	197		T20	319
valid_sources[0x3c]	6775	1			T2	547		T11	204		T20	594
valid_sources[0x3d]	6504	1			T2	270		T11	155		T14	1
valid_sources[0x3e]	6323	1			T2	282		T11	153		T70	1
valid_sources[0x3f]	6530	1			T2	404		T7	1		T11	170
valid_sources[0x40]	6187	1			T2	254		T11	181		T20	296
valid_sources[0x41]	6680	1			T2	474		T4	2		T7	1
valid_sources[0x42]	6778	1			T2	253		T11	155		T20	607
valid_sources[0x43]	6924	1			T2	545		T7	1		T11	170
valid_sources[0x44]	6466	1			T2	401		T11	177		T20	212
valid_sources[0x45]	6313	1			T2	395		T11	164		T20	105
valid_sources[0x46]	6301	1			T2	245		T11	178		T20	358
valid_sources[0x47]	6130	1			T2	457		T11	189		T20	169
valid_sources[0x48]	6520	1			T2	418		T11	170		T14	2
valid_sources[0x49]	6796	1			T2	433		T11	193		T20	344
valid_sources[0x4a]	6142	1			T2	392		T11	167		T20	107
valid_sources[0x4b]	6794	1			T2	542		T11	165		T20	729
valid_sources[0x4c]	6317	1			T2	483		T11	169		T14	2
valid_sources[0x4d]	6999	1			T2	641		T11	183		T20	523
valid_sources[0x4e]	6658	1			T2	530		T11	187		T20	314
valid_sources[0x4f]	6946	1			T2	550		T11	172		T20	465
valid_sources[0x50]	6395	1			T2	179		T11	178		T12	1
valid_sources[0x51]	6685	1			T2	572		T11	212		T14	2
valid_sources[0x52]	6276	1			T2	379		T11	163		T20	124
valid_sources[0x53]	6355	1			T2	502		T11	184		T20	154
valid_sources[0x54]	6156	1			T1	18		T2	349		T11	144
valid_sources[0x55]	6658	1			T2	483		T11	175		T12	5
valid_sources[0x56]	6339	1			T2	626		T11	204		T20	131
valid_sources[0x57]	6306	1			T2	231		T11	143		T20	163
valid_sources[0x58]	6781	1			T2	327		T10	1		T11	201
valid_sources[0x59]	6547	1			T2	427		T8	128		T11	159
valid_sources[0x5a]	6728	1			T2	397		T11	147		T20	504
valid_sources[0x5b]	6772	1			T2	396		T11	194		T14	3
valid_sources[0x5c]	6697	1			T2	449		T7	1		T11	198
valid_sources[0x5d]	7046	1			T2	478		T11	159		T20	672
valid_sources[0x5e]	6370	1			T2	532		T11	189		T20	72
valid_sources[0x5f]	6677	1			T2	493		T11	198		T20	392
valid_sources[0x60]	6572	1			T2	391		T11	174		T20	369
valid_sources[0x61]	6768	1			T2	474		T11	204		T20	436
valid_sources[0x62]	7166	1			T2	460		T11	180		T20	642
valid_sources[0x63]	6372	1			T2	543		T11	196		T20	73
valid_sources[0x64]	6763	1			T2	421		T11	199		T20	642
valid_sources[0x65]	6916	1			T2	668		T11	179		T20	471
valid_sources[0x66]	6393	1			T2	256		T11	194		T20	373
valid_sources[0x67]	6703	1			T2	485		T11	161		T20	171
valid_sources[0x68]	7028	1			T2	367		T7	1		T11	165
valid_sources[0x69]	7163	1			T2	615		T4	8		T11	138
valid_sources[0x6a]	6331	1			T2	346		T11	182		T20	85
valid_sources[0x6b]	6553	1			T2	426		T7	1		T11	183
valid_sources[0x6c]	6584	1			T2	357		T11	185		T14	4
valid_sources[0x6d]	6355	1			T2	269		T11	199		T20	264
valid_sources[0x6e]	6897	1			T2	366		T11	163		T20	337
valid_sources[0x6f]	6760	1			T2	458		T7	1		T11	160
valid_sources[0x70]	6708	1			T2	392		T11	204		T20	347
valid_sources[0x71]	6646	1			T2	519		T11	199		T20	217
valid_sources[0x72]	6996	1			T2	214		T4	4		T11	175
valid_sources[0x73]	6618	1			T2	615		T11	192		T13	32
valid_sources[0x74]	6981	1			T2	545		T11	173		T20	663
valid_sources[0x75]	6341	1			T2	220		T11	170		T14	1
valid_sources[0x76]	6846	1			T2	558		T10	3		T11	168
valid_sources[0x77]	6616	1			T2	355		T11	203		T14	1
valid_sources[0x78]	6661	1			T2	408		T4	11		T11	196
valid_sources[0x79]	6488	1			T2	397		T11	184		T20	193
valid_sources[0x7a]	6540	1			T2	634		T11	174		T20	382
valid_sources[0x7b]	7172	1			T2	392		T11	193		T20	467
valid_sources[0x7c]	6213	1			T2	476		T3	8		T4	8
valid_sources[0x7d]	7043	1			T2	555		T7	1		T11	152
valid_sources[0x7e]	6973	1			T2	407		T7	1		T11	205
valid_sources[0x7f]	6925	1			T2	607		T7	1		T11	182
valid_sources[0x80]	6359	1			T2	383		T11	201		T20	103

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

391560

1

T2

25604

T3

13

T4

40

values[0x0]

all_enables

biggest_size

579240

1

T1

2

T2

38098

T11

15740

values[0x1]

all_enables

biggest_size

580558

1

T2

38166

T11

15635

T20

32406