Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	57377	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1210781

1

T1

98846

T2

1

T3

27

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	337165	1			T1	25374		T2	51		T3	247
values[0x0]	456943	1			T1	37069		T13	9648		T14	120392
values[0x1]	474050	1			T1	39120		T13	10142		T14	124190

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28981	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1239177

1

T1

100009

T2

27

T3

163

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4915	1			T1	383		T18	3		T17	7
valid_sources[0x01]	4993	1			T1	425		T4	2		T7	1
valid_sources[0x02]	4837	1			T1	421		T4	1		T7	1
valid_sources[0x03]	5089	1			T1	396		T4	2		T7	1
valid_sources[0x04]	4772	1			T1	365		T7	1		T104	12
valid_sources[0x05]	4770	1			T1	366		T3	1		T7	2
valid_sources[0x06]	4740	1			T1	374		T4	1		T7	3
valid_sources[0x07]	5093	1			T1	376		T4	1		T18	2
valid_sources[0x08]	4884	1			T1	406		T7	1		T18	1
valid_sources[0x09]	4908	1			T1	405		T3	2		T4	1
valid_sources[0x0a]	5044	1			T1	378		T3	2		T4	1
valid_sources[0x0b]	4696	1			T1	382		T4	2		T7	1
valid_sources[0x0c]	4977	1			T1	355		T3	3		T4	1
valid_sources[0x0d]	5043	1			T1	413		T3	2		T4	6
valid_sources[0x0e]	4994	1			T1	407		T3	3		T4	1
valid_sources[0x0f]	5159	1			T1	413		T3	1		T4	2
valid_sources[0x10]	5446	1			T1	414		T3	1		T7	2
valid_sources[0x11]	4952	1			T1	387		T7	1		T120	3
valid_sources[0x12]	4989	1			T1	395		T7	1		T18	1
valid_sources[0x13]	4988	1			T1	369		T3	2		T4	4
valid_sources[0x14]	4703	1			T1	393		T3	2		T4	1
valid_sources[0x15]	5042	1			T1	381		T3	3		T7	4
valid_sources[0x16]	4983	1			T1	364		T3	1		T7	1
valid_sources[0x17]	4941	1			T1	431		T2	26		T7	1
valid_sources[0x18]	4910	1			T1	416		T3	1		T9	2
valid_sources[0x19]	4886	1			T1	403		T4	1		T7	1
valid_sources[0x1a]	4806	1			T1	382		T4	1		T7	1
valid_sources[0x1b]	4886	1			T1	411		T3	1		T4	3
valid_sources[0x1c]	5108	1			T1	400		T3	2		T18	1
valid_sources[0x1d]	4825	1			T1	404		T3	1		T4	1
valid_sources[0x1e]	5008	1			T1	383		T4	1		T7	1
valid_sources[0x1f]	5342	1			T1	406		T3	1		T4	1
valid_sources[0x20]	5026	1			T1	421		T80	1		T121	1
valid_sources[0x21]	5180	1			T1	422		T7	2		T9	1
valid_sources[0x22]	5104	1			T1	369		T3	1		T4	1
valid_sources[0x23]	4982	1			T1	405		T3	2		T4	2
valid_sources[0x24]	4800	1			T1	396		T2	10		T4	6
valid_sources[0x25]	4962	1			T1	387		T3	1		T7	1
valid_sources[0x26]	4962	1			T1	395		T3	4		T9	1
valid_sources[0x27]	4816	1			T1	379		T3	1		T7	5
valid_sources[0x28]	4770	1			T1	404		T3	1		T4	4
valid_sources[0x29]	5035	1			T1	374		T4	1		T7	1
valid_sources[0x2a]	5008	1			T1	402		T4	1		T7	2
valid_sources[0x2b]	4995	1			T1	397		T3	3		T4	1
valid_sources[0x2c]	5071	1			T1	410		T3	1		T18	3
valid_sources[0x2d]	4715	1			T1	373		T3	1		T4	1
valid_sources[0x2e]	5091	1			T1	410		T3	2		T18	1
valid_sources[0x2f]	4816	1			T1	428		T3	1		T4	2
valid_sources[0x30]	4870	1			T1	396		T7	1		T18	1
valid_sources[0x31]	5020	1			T1	386		T4	1		T7	3
valid_sources[0x32]	4927	1			T1	424		T7	7		T9	4
valid_sources[0x33]	4980	1			T1	391		T7	4		T18	2
valid_sources[0x34]	4893	1			T1	407		T4	2		T7	2
valid_sources[0x35]	4942	1			T1	362		T4	1		T7	5
valid_sources[0x36]	5113	1			T1	395		T3	1		T4	1
valid_sources[0x37]	4714	1			T1	361		T4	4		T7	3
valid_sources[0x38]	5111	1			T1	422		T7	4		T18	1
valid_sources[0x39]	4857	1			T1	395		T7	2		T9	3
valid_sources[0x3a]	4892	1			T1	365		T7	1		T9	2
valid_sources[0x3b]	5074	1			T1	364		T2	15		T3	1
valid_sources[0x3c]	5099	1			T1	403		T4	2		T7	1
valid_sources[0x3d]	5031	1			T1	369		T3	4		T4	2
valid_sources[0x3e]	4964	1			T1	413		T3	2		T4	1
valid_sources[0x3f]	5116	1			T1	395		T4	4		T7	1
valid_sources[0x40]	4849	1			T1	371		T3	3		T7	4
valid_sources[0x41]	4785	1			T1	379		T3	3		T7	2
valid_sources[0x42]	4908	1			T1	393		T18	1		T120	1
valid_sources[0x43]	5084	1			T1	458		T3	1		T7	1
valid_sources[0x44]	4794	1			T1	396		T4	1		T7	2
valid_sources[0x45]	4789	1			T1	409		T18	4		T48	1
valid_sources[0x46]	5208	1			T1	381		T3	2		T4	1
valid_sources[0x47]	4908	1			T1	377		T3	1		T7	1
valid_sources[0x48]	5027	1			T1	388		T3	1		T7	2
valid_sources[0x49]	4854	1			T1	400		T3	1		T4	1
valid_sources[0x4a]	4799	1			T1	348		T4	1		T7	1
valid_sources[0x4b]	4975	1			T1	386		T3	2		T4	2
valid_sources[0x4c]	4899	1			T1	388		T7	2		T9	1
valid_sources[0x4d]	4835	1			T1	395		T3	1		T4	4
valid_sources[0x4e]	4982	1			T1	369		T3	2		T4	1
valid_sources[0x4f]	5208	1			T1	435		T3	3		T4	3
valid_sources[0x50]	4848	1			T1	399		T7	1		T9	1
valid_sources[0x51]	5064	1			T1	450		T3	1		T7	1
valid_sources[0x52]	4855	1			T1	395		T3	2		T4	1
valid_sources[0x53]	4955	1			T1	405		T3	1		T4	1
valid_sources[0x54]	4783	1			T1	412		T3	1		T9	3
valid_sources[0x55]	4890	1			T1	432		T9	1		T18	1
valid_sources[0x56]	5051	1			T1	419		T3	1		T4	1
valid_sources[0x57]	5038	1			T1	432		T3	2		T4	2
valid_sources[0x58]	5040	1			T1	381		T3	3		T4	1
valid_sources[0x59]	4818	1			T1	392		T3	2		T7	1
valid_sources[0x5a]	4842	1			T1	373		T7	5		T104	3
valid_sources[0x5b]	4892	1			T1	413		T4	2		T18	1
valid_sources[0x5c]	4836	1			T1	381		T3	1		T18	1
valid_sources[0x5d]	4964	1			T1	399		T3	3		T4	4
valid_sources[0x5e]	4949	1			T1	381		T7	1		T18	2
valid_sources[0x5f]	4921	1			T1	404		T3	2		T7	1
valid_sources[0x60]	5183	1			T1	400		T3	2		T4	1
valid_sources[0x61]	4991	1			T1	382		T3	1		T7	1
valid_sources[0x62]	4916	1			T1	410		T3	3		T4	1
valid_sources[0x63]	5005	1			T1	419		T3	1		T7	1
valid_sources[0x64]	5204	1			T1	395		T3	2		T4	1
valid_sources[0x65]	4939	1			T1	368		T3	2		T4	1
valid_sources[0x66]	4889	1			T1	375		T3	1		T7	2
valid_sources[0x67]	4869	1			T1	369		T4	2		T7	1
valid_sources[0x68]	4921	1			T1	389		T12	16		T104	5
valid_sources[0x69]	4917	1			T1	404		T4	4		T18	1
valid_sources[0x6a]	4916	1			T1	388		T3	1		T7	2
valid_sources[0x6b]	4919	1			T1	390		T7	2		T104	1
valid_sources[0x6c]	5010	1			T1	389		T3	3		T4	1
valid_sources[0x6d]	5140	1			T1	371		T7	1		T122	2
valid_sources[0x6e]	4927	1			T1	408		T4	1		T7	1
valid_sources[0x6f]	4711	1			T1	403		T3	1		T4	1
valid_sources[0x70]	4885	1			T1	394		T3	5		T4	4
valid_sources[0x71]	5021	1			T1	389		T4	1		T7	3
valid_sources[0x72]	4855	1			T1	386		T3	1		T4	1
valid_sources[0x73]	4793	1			T1	435		T3	3		T4	1
valid_sources[0x74]	4860	1			T1	358		T3	2		T4	2
valid_sources[0x75]	4722	1			T1	392		T4	1		T7	1
valid_sources[0x76]	5157	1			T1	419		T3	3		T7	1
valid_sources[0x77]	5066	1			T1	432		T3	1		T7	3
valid_sources[0x78]	5012	1			T1	401		T4	2		T7	2
valid_sources[0x79]	4664	1			T1	353		T4	2		T7	1
valid_sources[0x7a]	5133	1			T1	369		T3	1		T4	1
valid_sources[0x7b]	5035	1			T1	385		T3	1		T4	1
valid_sources[0x7c]	4879	1			T1	393		T4	1		T7	1
valid_sources[0x7d]	4790	1			T1	381		T4	2		T7	2
valid_sources[0x7e]	4795	1			T1	376		T4	1		T9	6
valid_sources[0x7f]	4988	1			T1	397		T4	2		T9	2
valid_sources[0x80]	4979	1			T1	389		T9	7		T18	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

304640

1

T1

24785

T2

1

T3

27

values[0x0]

all_enables

biggest_size

452952

1

T1

36740

T13

9580

T14

119292

values[0x1]

all_enables

biggest_size

453189

1

T1

37321

T13

9748

T14

118613

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	92963	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

935308

1

T1

77320

T2

20

T3

46

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	259058	1			T1	20625		T2	32		T3	96
values[0x0]	356638	1			T1	29422		T8	5		T27	1
values[0x1]	412575	1			T1	34506		T8	4		T27	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42691	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

985580

1

T1

81466

T2

22

T3

59

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3449	1			T1	313		T3	1		T13	150
valid_sources[0x01]	4338	1			T1	373		T9	1		T13	126
valid_sources[0x02]	5160	1			T1	372		T13	70		T14	1059
valid_sources[0x03]	3734	1			T1	248		T9	1		T13	78
valid_sources[0x04]	3624	1			T1	338		T9	2		T28	1
valid_sources[0x05]	4402	1			T1	335		T3	4		T28	1
valid_sources[0x06]	3513	1			T1	256		T23	3		T13	55
valid_sources[0x07]	3959	1			T1	313		T13	89		T123	2
valid_sources[0x08]	4345	1			T1	343		T3	9		T9	1
valid_sources[0x09]	3638	1			T1	278		T13	160		T14	1018
valid_sources[0x0a]	3789	1			T1	351		T13	40		T14	1059
valid_sources[0x0b]	3656	1			T1	347		T27	1		T13	107
valid_sources[0x0c]	4434	1			T1	318		T13	62		T14	1029
valid_sources[0x0d]	4155	1			T1	397		T13	4		T14	1029
valid_sources[0x0e]	3546	1			T1	319		T3	2		T9	1
valid_sources[0x0f]	4507	1			T1	310		T13	79		T14	1010
valid_sources[0x10]	3708	1			T1	321		T13	57		T14	1029
valid_sources[0x11]	3693	1			T1	393		T6	1		T9	1
valid_sources[0x12]	4372	1			T1	317		T9	1		T13	69
valid_sources[0x13]	3798	1			T1	339		T2	4		T9	3
valid_sources[0x14]	4410	1			T1	283		T9	1		T42	21
valid_sources[0x15]	3866	1			T1	323		T27	1		T13	55
valid_sources[0x16]	4742	1			T1	361		T21	1		T13	172
valid_sources[0x17]	4551	1			T1	325		T13	50		T14	1025
valid_sources[0x18]	3307	1			T1	277		T13	129		T14	975
valid_sources[0x19]	3944	1			T1	379		T13	71		T14	978
valid_sources[0x1a]	4137	1			T1	348		T23	2		T13	67
valid_sources[0x1b]	3294	1			T1	296		T9	1		T13	8
valid_sources[0x1c]	4332	1			T1	279		T3	1		T21	1
valid_sources[0x1d]	3830	1			T1	335		T9	1		T41	3
valid_sources[0x1e]	4137	1			T1	225		T3	1		T9	1
valid_sources[0x1f]	4466	1			T1	308		T43	1		T13	55
valid_sources[0x20]	3598	1			T1	310		T13	31		T14	1009
valid_sources[0x21]	4292	1			T1	372		T13	72		T14	1065
valid_sources[0x22]	3520	1			T1	291		T13	39		T14	1012
valid_sources[0x23]	4123	1			T1	338		T13	186		T14	1051
valid_sources[0x24]	3953	1			T1	286		T13	80		T14	1043
valid_sources[0x25]	3692	1			T1	322		T9	1		T13	19
valid_sources[0x26]	3640	1			T1	316		T13	122		T14	993
valid_sources[0x27]	3841	1			T1	290		T13	95		T14	1015
valid_sources[0x28]	3947	1			T1	353		T13	75		T14	1047
valid_sources[0x29]	4300	1			T1	315		T9	2		T13	58
valid_sources[0x2a]	4586	1			T1	314		T3	3		T28	1
valid_sources[0x2b]	3815	1			T1	323		T13	107		T14	1017
valid_sources[0x2c]	4027	1			T1	289		T9	1		T23	1
valid_sources[0x2d]	4292	1			T1	301		T3	1		T13	188
valid_sources[0x2e]	3010	1			T1	243		T3	1		T81	1
valid_sources[0x2f]	3765	1			T1	317		T13	35		T14	1068
valid_sources[0x30]	4263	1			T1	379		T13	52		T14	1050
valid_sources[0x31]	3759	1			T1	347		T81	3		T13	17
valid_sources[0x32]	5067	1			T1	360		T3	2		T9	1
valid_sources[0x33]	4351	1			T1	324		T13	69		T14	995
valid_sources[0x34]	3901	1			T1	317		T2	3		T13	220
valid_sources[0x35]	4060	1			T1	326		T13	57		T14	1034
valid_sources[0x36]	3698	1			T1	357		T3	2		T13	140
valid_sources[0x37]	4475	1			T1	294		T9	3		T21	2
valid_sources[0x38]	4035	1			T1	313		T3	5		T9	1
valid_sources[0x39]	3816	1			T1	365		T13	229		T14	1054
valid_sources[0x3a]	4078	1			T1	321		T2	3		T13	51
valid_sources[0x3b]	3562	1			T1	282		T13	105		T14	1002
valid_sources[0x3c]	3549	1			T1	329		T3	1		T41	1
valid_sources[0x3d]	4381	1			T1	345		T13	96		T14	1039
valid_sources[0x3e]	3847	1			T1	310		T13	65		T14	984
valid_sources[0x3f]	4211	1			T1	345		T9	1		T23	2
valid_sources[0x40]	4620	1			T1	324		T13	15		T123	1
valid_sources[0x41]	4345	1			T1	314		T2	2		T43	4
valid_sources[0x42]	4008	1			T1	357		T43	1		T13	104
valid_sources[0x43]	3383	1			T1	324		T9	1		T17	8
valid_sources[0x44]	4095	1			T1	330		T43	1		T13	25
valid_sources[0x45]	3666	1			T1	326		T28	1		T13	158
valid_sources[0x46]	4009	1			T1	345		T3	5		T41	1
valid_sources[0x47]	3776	1			T1	371		T13	121		T14	1034
valid_sources[0x48]	3949	1			T1	343		T9	2		T13	175
valid_sources[0x49]	4310	1			T1	314		T8	1		T23	1
valid_sources[0x4a]	4437	1			T1	337		T9	1		T13	133
valid_sources[0x4b]	4771	1			T1	303		T13	54		T14	1069
valid_sources[0x4c]	4102	1			T1	333		T3	4		T9	1
valid_sources[0x4d]	4099	1			T1	306		T12	128		T13	151
valid_sources[0x4e]	4291	1			T1	343		T13	41		T14	1029
valid_sources[0x4f]	4185	1			T1	334		T3	2		T13	23
valid_sources[0x50]	3893	1			T1	305		T13	73		T14	1052
valid_sources[0x51]	3995	1			T1	295		T81	3		T13	212
valid_sources[0x52]	3649	1			T1	302		T3	3		T13	70
valid_sources[0x53]	4038	1			T1	315		T43	1		T13	126
valid_sources[0x54]	3449	1			T1	337		T9	3		T13	50
valid_sources[0x55]	4279	1			T1	338		T13	33		T14	1144
valid_sources[0x56]	3347	1			T1	297		T13	27		T14	1027
valid_sources[0x57]	5016	1			T1	296		T3	11		T22	5
valid_sources[0x58]	4894	1			T1	408		T43	1		T13	110
valid_sources[0x59]	4205	1			T1	347		T9	1		T13	90
valid_sources[0x5a]	3951	1			T1	362		T9	1		T23	1
valid_sources[0x5b]	4148	1			T1	323		T13	110		T14	1036
valid_sources[0x5c]	3316	1			T1	267		T9	1		T13	76
valid_sources[0x5d]	4481	1			T1	342		T13	70		T14	1077
valid_sources[0x5e]	4041	1			T1	347		T13	88		T14	1000
valid_sources[0x5f]	5242	1			T1	301		T9	1		T13	5
valid_sources[0x60]	3696	1			T1	298		T13	27		T14	1017
valid_sources[0x61]	3801	1			T1	314		T13	15		T14	1059
valid_sources[0x62]	4055	1			T1	418		T43	1		T13	136
valid_sources[0x63]	4236	1			T1	344		T13	31		T14	1057
valid_sources[0x64]	3454	1			T1	294		T13	31		T14	1028
valid_sources[0x65]	4529	1			T1	293		T9	1		T13	118
valid_sources[0x66]	4004	1			T1	354		T13	63		T123	3
valid_sources[0x67]	3694	1			T1	276		T23	1		T13	127
valid_sources[0x68]	4426	1			T1	388		T9	2		T13	67
valid_sources[0x69]	3712	1			T1	320		T13	111		T14	1029
valid_sources[0x6a]	5236	1			T1	425		T3	3		T13	49
valid_sources[0x6b]	4268	1			T1	322		T21	3		T13	39
valid_sources[0x6c]	3494	1			T1	351		T21	1		T13	26
valid_sources[0x6d]	4113	1			T1	320		T3	1		T13	96
valid_sources[0x6e]	3344	1			T1	331		T13	114		T14	1030
valid_sources[0x6f]	3184	1			T1	290		T13	36		T14	1043
valid_sources[0x70]	4052	1			T1	320		T21	1		T81	3
valid_sources[0x71]	3898	1			T1	347		T13	30		T14	1097
valid_sources[0x72]	3797	1			T1	359		T43	1		T13	97
valid_sources[0x73]	4410	1			T1	445		T13	152		T14	1007
valid_sources[0x74]	3811	1			T1	314		T9	1		T13	72
valid_sources[0x75]	3728	1			T1	338		T2	3		T13	110
valid_sources[0x76]	3221	1			T1	344		T9	2		T13	32
valid_sources[0x77]	4324	1			T1	367		T9	2		T13	60
valid_sources[0x78]	4111	1			T1	390		T23	1		T13	199
valid_sources[0x79]	4112	1			T1	364		T43	1		T13	129
valid_sources[0x7a]	3811	1			T1	332		T54	1		T13	107
valid_sources[0x7b]	3770	1			T1	369		T81	1		T13	28
valid_sources[0x7c]	3078	1			T1	341		T8	2		T9	1
valid_sources[0x7d]	3060	1			T1	295		T17	16		T13	109
valid_sources[0x7e]	3683	1			T1	333		T9	1		T13	33
valid_sources[0x7f]	4053	1			T1	283		T3	1		T13	33
valid_sources[0x80]	3732	1			T1	324		T22	3		T13	108

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

236731

1

T1

19410

T2

20

T3

46

values[0x0]

all_enables

biggest_size

349242

1

T1

28862

T27

1

T28

1

values[0x1]

all_enables

biggest_size

349335

1

T1

29048

T28

1

T69

1