Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	83122	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2230891

1

T1

12

T4

12

T5

5

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	598164	1			T1	12		T4	12		T5	79
values[0x0]	842278	1			T7	6764		T23	11850		T24	86817
values[0x1]	873571	1			T7	7094		T23	12550		T24	90048

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43749	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

2270264

1

T1

12

T4

12

T5

47

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8593	1			T7	68		T13	1		T11	3
valid_sources[0x01]	8741	1			T7	79		T8	5		T11	1
valid_sources[0x02]	8832	1			T7	72		T11	1		T66	2
valid_sources[0x03]	8691	1			T7	72		T11	1		T68	1
valid_sources[0x04]	7985	1			T7	73		T11	1		T66	1
valid_sources[0x05]	8490	1			T7	82		T66	1		T67	1
valid_sources[0x06]	8415	1			T5	3		T7	79		T11	1
valid_sources[0x07]	8436	1			T7	53		T8	3		T68	1
valid_sources[0x08]	9816	1			T5	1		T7	72		T8	1
valid_sources[0x09]	8899	1			T7	76		T11	4		T67	1
valid_sources[0x0a]	9105	1			T5	4		T7	67		T66	1
valid_sources[0x0b]	9527	1			T7	78		T8	1		T11	2
valid_sources[0x0c]	8192	1			T5	1		T7	70		T40	1
valid_sources[0x0d]	9152	1			T7	76		T8	1		T13	1
valid_sources[0x0e]	9934	1			T7	77		T11	1		T22	1
valid_sources[0x0f]	10223	1			T7	74		T11	1		T79	1
valid_sources[0x10]	8737	1			T5	1		T7	75		T11	3
valid_sources[0x11]	9349	1			T7	64		T8	1		T67	2
valid_sources[0x12]	9197	1			T7	74		T40	2		T23	118
valid_sources[0x13]	8807	1			T7	88		T66	1		T67	2
valid_sources[0x14]	9980	1			T7	69		T8	1		T14	5
valid_sources[0x15]	10184	1			T7	75		T8	1		T13	3
valid_sources[0x16]	9312	1			T7	91		T14	5		T79	3
valid_sources[0x17]	9120	1			T7	52		T8	1		T11	2
valid_sources[0x18]	10026	1			T7	60		T11	1		T14	6
valid_sources[0x19]	8789	1			T7	74		T8	4		T11	3
valid_sources[0x1a]	8671	1			T7	66		T8	5		T11	3
valid_sources[0x1b]	8567	1			T7	63		T22	5		T40	2
valid_sources[0x1c]	9294	1			T5	1		T7	89		T8	1
valid_sources[0x1d]	7894	1			T5	1		T7	54		T68	1
valid_sources[0x1e]	8388	1			T7	82		T67	1		T40	1
valid_sources[0x1f]	8389	1			T7	91		T11	1		T66	1
valid_sources[0x20]	8784	1			T7	83		T11	2		T14	1
valid_sources[0x21]	8046	1			T7	83		T11	1		T40	1
valid_sources[0x22]	8960	1			T7	72		T23	137		T24	907
valid_sources[0x23]	9374	1			T7	67		T11	5		T67	1
valid_sources[0x24]	8778	1			T7	72		T8	1		T11	2
valid_sources[0x25]	9563	1			T7	68		T11	1		T79	4
valid_sources[0x26]	8164	1			T7	74		T8	2		T13	3
valid_sources[0x27]	8758	1			T7	71		T8	1		T68	1
valid_sources[0x28]	8853	1			T7	77		T8	4		T11	1
valid_sources[0x29]	9013	1			T7	64		T13	3		T11	1
valid_sources[0x2a]	9986	1			T7	69		T8	2		T14	2
valid_sources[0x2b]	8456	1			T7	77		T8	1		T11	5
valid_sources[0x2c]	8010	1			T7	76		T8	3		T11	4
valid_sources[0x2d]	8210	1			T7	72		T66	1		T79	1
valid_sources[0x2e]	8958	1			T7	94		T11	2		T67	1
valid_sources[0x2f]	8218	1			T7	77		T8	1		T11	1
valid_sources[0x30]	8509	1			T7	76		T13	13		T11	1
valid_sources[0x31]	8504	1			T7	72		T11	4		T66	1
valid_sources[0x32]	10535	1			T7	57		T11	2		T14	2
valid_sources[0x33]	8594	1			T4	1		T7	81		T14	6
valid_sources[0x34]	8782	1			T5	1		T7	80		T8	3
valid_sources[0x35]	9111	1			T7	73		T11	3		T14	5
valid_sources[0x36]	8794	1			T7	89		T11	2		T67	2
valid_sources[0x37]	8664	1			T7	60		T11	1		T22	8
valid_sources[0x38]	9784	1			T7	77		T13	5		T11	1
valid_sources[0x39]	9704	1			T7	57		T8	1		T13	1
valid_sources[0x3a]	9224	1			T7	83		T8	1		T66	1
valid_sources[0x3b]	9073	1			T5	2		T7	67		T11	3
valid_sources[0x3c]	8258	1			T7	73		T11	1		T66	2
valid_sources[0x3d]	9928	1			T7	71		T23	109		T24	976
valid_sources[0x3e]	8012	1			T7	74		T23	133		T24	899
valid_sources[0x3f]	9806	1			T4	1		T7	70		T14	1
valid_sources[0x40]	9968	1			T7	74		T11	3		T66	1
valid_sources[0x41]	10099	1			T7	71		T11	1		T14	4
valid_sources[0x42]	9185	1			T5	2		T7	70		T22	13
valid_sources[0x43]	9714	1			T7	73		T11	1		T14	3
valid_sources[0x44]	9314	1			T4	1		T7	51		T11	4
valid_sources[0x45]	8521	1			T5	1		T7	72		T13	19
valid_sources[0x46]	8889	1			T7	67		T14	4		T23	144
valid_sources[0x47]	9168	1			T7	69		T11	1		T14	1
valid_sources[0x48]	8405	1			T7	64		T11	1		T14	1
valid_sources[0x49]	8760	1			T7	57		T8	1		T14	2
valid_sources[0x4a]	9422	1			T5	1		T7	69		T8	1
valid_sources[0x4b]	8807	1			T7	71		T13	11		T11	1
valid_sources[0x4c]	8216	1			T7	63		T11	3		T66	1
valid_sources[0x4d]	9144	1			T7	76		T67	1		T23	143
valid_sources[0x4e]	9213	1			T7	87		T66	1		T67	2
valid_sources[0x4f]	8886	1			T7	95		T11	1		T66	1
valid_sources[0x50]	9415	1			T7	70		T8	2		T67	1
valid_sources[0x51]	9796	1			T7	73		T14	1		T67	2
valid_sources[0x52]	10446	1			T7	80		T8	3		T14	4
valid_sources[0x53]	8227	1			T7	73		T8	1		T11	2
valid_sources[0x54]	9428	1			T7	78		T11	1		T40	1
valid_sources[0x55]	10262	1			T7	74		T11	1		T14	1
valid_sources[0x56]	8621	1			T7	84		T13	2		T66	1
valid_sources[0x57]	8287	1			T4	1		T7	67		T8	2
valid_sources[0x58]	8759	1			T7	66		T11	1		T15	2
valid_sources[0x59]	8685	1			T7	71		T11	1		T14	2
valid_sources[0x5a]	8652	1			T7	91		T22	4		T40	1
valid_sources[0x5b]	8612	1			T7	70		T8	2		T23	140
valid_sources[0x5c]	9175	1			T7	72		T13	6		T23	126
valid_sources[0x5d]	8438	1			T7	77		T14	3		T66	1
valid_sources[0x5e]	8151	1			T7	68		T11	1		T67	1
valid_sources[0x5f]	9068	1			T5	1		T7	87		T8	1
valid_sources[0x60]	8406	1			T7	56		T68	1		T36	1
valid_sources[0x61]	8725	1			T7	70		T11	6		T14	1
valid_sources[0x62]	9261	1			T7	76		T13	1		T11	1
valid_sources[0x63]	9961	1			T7	77		T8	6		T79	1
valid_sources[0x64]	9420	1			T7	69		T67	1		T79	1
valid_sources[0x65]	8179	1			T7	55		T8	2		T66	1
valid_sources[0x66]	8818	1			T7	73		T8	7		T66	1
valid_sources[0x67]	9518	1			T7	53		T8	1		T11	1
valid_sources[0x68]	8021	1			T7	65		T8	1		T23	124
valid_sources[0x69]	8767	1			T7	81		T11	2		T67	1
valid_sources[0x6a]	8567	1			T7	73		T8	1		T13	1
valid_sources[0x6b]	8795	1			T7	68		T8	1		T14	1
valid_sources[0x6c]	10213	1			T7	74		T11	5		T66	5
valid_sources[0x6d]	8732	1			T1	12		T5	2		T7	64
valid_sources[0x6e]	9477	1			T5	3		T7	84		T14	3
valid_sources[0x6f]	9666	1			T7	68		T8	5		T40	1
valid_sources[0x70]	8904	1			T5	2		T7	87		T11	1
valid_sources[0x71]	9865	1			T7	78		T67	1		T23	133
valid_sources[0x72]	8666	1			T7	60		T8	1		T14	3
valid_sources[0x73]	8603	1			T7	66		T8	6		T11	1
valid_sources[0x74]	8491	1			T7	75		T66	1		T23	135
valid_sources[0x75]	8714	1			T5	3		T7	93		T8	1
valid_sources[0x76]	8950	1			T7	60		T66	1		T67	1
valid_sources[0x77]	10003	1			T7	82		T8	3		T11	2
valid_sources[0x78]	8306	1			T5	1		T7	78		T11	4
valid_sources[0x79]	9158	1			T7	68		T11	1		T14	3
valid_sources[0x7a]	8472	1			T7	79		T11	4		T14	1
valid_sources[0x7b]	9813	1			T7	70		T11	3		T23	150
valid_sources[0x7c]	8643	1			T4	1		T5	2		T7	81
valid_sources[0x7d]	9138	1			T7	73		T11	3		T79	2
valid_sources[0x7e]	9475	1			T7	79		T8	1		T11	2
valid_sources[0x7f]	8587	1			T7	72		T8	4		T14	1
valid_sources[0x80]	8269	1			T7	66		T14	4		T67	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

560686

1

T1

12

T4

12

T5

5

values[0x0]

all_enables

biggest_size

834898

1

T7

6698

T23

11733

T24

86081

values[0x1]

all_enables

biggest_size

835307

1

T7

6771

T23

12030

T24

86160

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	164060	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1676909

1

T1

6

T2

3

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	457277	1			T1	19		T3	1		T4	17
values[0x0]	640812	1			T2	11		T7	5581		T19	6
values[0x1]	742880	1			T2	7		T7	6531		T19	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	72832	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1768137

1

T1

8

T2

4

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7480	1			T7	83		T8	5		T10	1
valid_sources[0x01]	7529	1			T11	9		T62	1		T23	120
valid_sources[0x02]	7376	1			T7	168		T20	1		T22	2
valid_sources[0x03]	6380	1			T7	2		T9	1		T49	1
valid_sources[0x04]	7258	1			T7	119		T10	1		T13	1
valid_sources[0x05]	6798	1			T7	4		T13	1		T23	111
valid_sources[0x06]	7335	1			T7	106		T22	2		T129	5
valid_sources[0x07]	7267	1			T7	446		T11	4		T23	96
valid_sources[0x08]	7350	1			T4	1		T7	6		T13	2
valid_sources[0x09]	7062	1			T7	4		T36	1		T23	118
valid_sources[0x0a]	6942	1			T7	8		T8	2		T19	1
valid_sources[0x0b]	7674	1			T7	178		T11	4		T23	129
valid_sources[0x0c]	7645	1			T7	253		T68	11		T23	94
valid_sources[0x0d]	7500	1			T7	81		T11	2		T36	2
valid_sources[0x0e]	6197	1			T21	1		T22	2		T23	93
valid_sources[0x0f]	7012	1			T7	114		T23	116		T24	716
valid_sources[0x10]	7725	1			T7	10		T8	1		T129	2
valid_sources[0x11]	7265	1			T7	48		T13	2		T23	110
valid_sources[0x12]	7107	1			T7	32		T23	130		T24	768
valid_sources[0x13]	7737	1			T7	8		T23	118		T130	5
valid_sources[0x14]	8521	1			T7	6		T22	7		T23	122
valid_sources[0x15]	7678	1			T7	5		T13	1		T23	92
valid_sources[0x16]	7402	1			T7	127		T23	116		T24	699
valid_sources[0x17]	6518	1			T7	7		T22	1		T23	106
valid_sources[0x18]	7400	1			T23	111		T80	1		T24	714
valid_sources[0x19]	7713	1			T7	93		T13	1		T68	4
valid_sources[0x1a]	7537	1			T7	117		T23	121		T80	1
valid_sources[0x1b]	6903	1			T7	153		T8	1		T10	1
valid_sources[0x1c]	6791	1			T7	35		T23	107		T24	776
valid_sources[0x1d]	6998	1			T7	107		T23	124		T24	696
valid_sources[0x1e]	7275	1			T7	2		T13	1		T23	97
valid_sources[0x1f]	6909	1			T7	206		T10	2		T23	115
valid_sources[0x20]	6960	1			T4	2		T7	116		T13	3
valid_sources[0x21]	8125	1			T7	15		T11	2		T68	2
valid_sources[0x22]	6930	1			T7	1		T10	1		T23	95
valid_sources[0x23]	7786	1			T7	25		T13	1		T62	2
valid_sources[0x24]	6873	1			T7	23		T36	2		T23	112
valid_sources[0x25]	8085	1			T7	6		T23	113		T24	728
valid_sources[0x26]	7427	1			T7	170		T79	1		T36	2
valid_sources[0x27]	6887	1			T4	1		T7	4		T68	4
valid_sources[0x28]	7227	1			T7	3		T15	1		T23	99
valid_sources[0x29]	6492	1			T7	13		T23	127		T80	2
valid_sources[0x2a]	7012	1			T7	3		T79	2		T22	8
valid_sources[0x2b]	6908	1			T7	3		T22	1		T23	125
valid_sources[0x2c]	6926	1			T7	4		T23	100		T24	723
valid_sources[0x2d]	6563	1			T4	3		T7	4		T10	1
valid_sources[0x2e]	7130	1			T7	12		T8	12		T13	2
valid_sources[0x2f]	7020	1			T7	1		T11	7		T36	1
valid_sources[0x30]	7300	1			T7	9		T12	26		T23	101
valid_sources[0x31]	7111	1			T7	67		T13	1		T23	92
valid_sources[0x32]	8125	1			T7	4		T22	1		T23	110
valid_sources[0x33]	7570	1			T7	80		T22	2		T23	118
valid_sources[0x34]	6716	1			T7	15		T23	106		T80	1
valid_sources[0x35]	7253	1			T7	73		T23	100		T24	735
valid_sources[0x36]	7596	1			T7	88		T22	3		T23	107
valid_sources[0x37]	6953	1			T7	2		T13	1		T23	102
valid_sources[0x38]	7372	1			T7	26		T68	1		T23	102
valid_sources[0x39]	7932	1			T23	99		T24	714		T29	656
valid_sources[0x3a]	6697	1			T7	2		T13	1		T79	1
valid_sources[0x3b]	6944	1			T7	103		T23	98		T24	676
valid_sources[0x3c]	7381	1			T7	213		T36	2		T23	104
valid_sources[0x3d]	6980	1			T7	3		T11	3		T23	99
valid_sources[0x3e]	7674	1			T7	198		T15	1		T67	64
valid_sources[0x3f]	7125	1			T7	197		T23	101		T24	685
valid_sources[0x40]	6912	1			T7	7		T68	1		T23	103
valid_sources[0x41]	7256	1			T7	213		T23	89		T24	778
valid_sources[0x42]	7723	1			T7	122		T22	3		T23	138
valid_sources[0x43]	7360	1			T7	19		T36	1		T23	105
valid_sources[0x44]	6583	1			T7	3		T19	1		T79	1
valid_sources[0x45]	6995	1			T7	3		T23	107		T80	2
valid_sources[0x46]	7290	1			T7	1		T79	1		T23	112
valid_sources[0x47]	6929	1			T7	8		T13	2		T23	111
valid_sources[0x48]	8022	1			T7	7		T8	3		T23	129
valid_sources[0x49]	7416	1			T7	253		T36	1		T22	6
valid_sources[0x4a]	7770	1			T7	4		T36	2		T23	103
valid_sources[0x4b]	7311	1			T7	30		T19	1		T79	1
valid_sources[0x4c]	7407	1			T1	19		T7	1		T11	4
valid_sources[0x4d]	8031	1			T7	159		T11	6		T68	2
valid_sources[0x4e]	6491	1			T7	2		T22	3		T23	105
valid_sources[0x4f]	7893	1			T7	3		T8	2		T23	85
valid_sources[0x50]	7225	1			T7	38		T23	87		T24	646
valid_sources[0x51]	7828	1			T7	159		T8	8		T11	11
valid_sources[0x52]	8488	1			T7	11		T19	1		T15	1
valid_sources[0x53]	7238	1			T7	183		T22	1		T49	1
valid_sources[0x54]	6904	1			T7	6		T13	1		T23	107
valid_sources[0x55]	7837	1			T7	184		T129	5		T23	112
valid_sources[0x56]	7772	1			T22	6		T23	110		T24	671
valid_sources[0x57]	6850	1			T22	6		T23	94		T37	1
valid_sources[0x58]	6921	1			T7	213		T63	1		T49	1
valid_sources[0x59]	7090	1			T7	5		T19	1		T22	2
valid_sources[0x5a]	6593	1			T7	183		T79	1		T23	93
valid_sources[0x5b]	7215	1			T7	159		T40	64		T23	106
valid_sources[0x5c]	7531	1			T7	108		T13	1		T23	122
valid_sources[0x5d]	7637	1			T7	4		T8	8		T23	97
valid_sources[0x5e]	6939	1			T7	171		T13	1		T14	96
valid_sources[0x5f]	7863	1			T7	6		T36	1		T23	96
valid_sources[0x60]	6917	1			T7	4		T23	121		T38	1
valid_sources[0x61]	7233	1			T7	202		T36	1		T23	111
valid_sources[0x62]	7683	1			T7	22		T79	1		T22	3
valid_sources[0x63]	6886	1			T7	37		T13	1		T23	99
valid_sources[0x64]	6917	1			T7	23		T13	2		T63	1
valid_sources[0x65]	6671	1			T7	66		T22	2		T23	96
valid_sources[0x66]	7105	1			T7	317		T23	110		T65	2
valid_sources[0x67]	7694	1			T7	9		T49	1		T23	107
valid_sources[0x68]	7282	1			T7	93		T8	1		T13	1
valid_sources[0x69]	6389	1			T7	6		T23	106		T24	706
valid_sources[0x6a]	7605	1			T7	4		T8	2		T79	1
valid_sources[0x6b]	7857	1			T7	6		T22	1		T23	109
valid_sources[0x6c]	7237	1			T7	1		T79	1		T22	3
valid_sources[0x6d]	6619	1			T7	1		T36	1		T23	123
valid_sources[0x6e]	6752	1			T7	7		T13	1		T79	3
valid_sources[0x6f]	6791	1			T10	1		T22	1		T23	91
valid_sources[0x70]	6786	1			T7	38		T23	109		T80	1
valid_sources[0x71]	6820	1			T7	4		T22	1		T23	89
valid_sources[0x72]	6356	1			T7	5		T23	109		T80	2
valid_sources[0x73]	7387	1			T7	223		T23	95		T37	1
valid_sources[0x74]	6808	1			T7	216		T79	2		T23	96
valid_sources[0x75]	7110	1			T7	118		T13	1		T22	3
valid_sources[0x76]	6704	1			T4	1		T7	8		T79	1
valid_sources[0x77]	6813	1			T7	14		T19	1		T23	115
valid_sources[0x78]	7778	1			T7	3		T13	1		T11	8
valid_sources[0x79]	7316	1			T7	151		T23	96		T80	1
valid_sources[0x7a]	7996	1			T7	6		T23	90		T37	1
valid_sources[0x7b]	6649	1			T7	129		T23	110		T24	720
valid_sources[0x7c]	7924	1			T7	249		T8	2		T13	2
valid_sources[0x7d]	6990	1			T7	8		T22	3		T23	114
valid_sources[0x7e]	7315	1			T7	19		T79	1		T22	1
valid_sources[0x7f]	6864	1			T7	15		T49	1		T23	98
valid_sources[0x80]	7230	1			T7	204		T13	1		T23	92

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

422650

1

T1

6

T3

1

T4

6

values[0x0]

all_enables

biggest_size

627539

1

T2

3

T7

5483

T19

2

values[0x1]

all_enables

biggest_size

626720

1

T7

5650

T20

1

T61

1