Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67567	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1660375

1

T1

3

T2

3

T3

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	451229	1			T1	3		T2	3		T3	3
values[0x0]	626938	1			T21	23769		T22	27120		T23	15227
values[0x1]	649775	1			T21	24704		T22	28279		T23	15789

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34847	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1693095

1

T1

3

T2

3

T3

3

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7022	1			T5	4		T8	2		T109	2
valid_sources[0x01]	6521	1			T11	5		T21	191		T61	2
valid_sources[0x02]	6492	1			T108	1		T21	238		T61	2
valid_sources[0x03]	6594	1			T8	2		T13	3		T20	2
valid_sources[0x04]	8522	1			T5	2		T8	2		T15	1
valid_sources[0x05]	7566	1			T108	1		T109	2		T21	241
valid_sources[0x06]	6840	1			T5	1		T8	1		T13	3
valid_sources[0x07]	6885	1			T21	259		T61	2		T125	2
valid_sources[0x08]	6321	1			T5	1		T15	1		T108	2
valid_sources[0x09]	7157	1			T8	1		T109	2		T81	2
valid_sources[0x0a]	5873	1			T108	1		T21	282		T61	1
valid_sources[0x0b]	7282	1			T109	1		T21	269		T126	2
valid_sources[0x0c]	6458	1			T51	1		T110	41		T21	261
valid_sources[0x0d]	7129	1			T13	1		T15	1		T108	4
valid_sources[0x0e]	7590	1			T5	1		T8	3		T13	1
valid_sources[0x0f]	6667	1			T5	3		T108	1		T109	2
valid_sources[0x10]	6510	1			T11	4		T108	2		T109	1
valid_sources[0x11]	6976	1			T15	1		T21	235		T59	1
valid_sources[0x12]	6034	1			T8	2		T13	1		T109	1
valid_sources[0x13]	7877	1			T13	1		T15	4		T109	2
valid_sources[0x14]	6645	1			T13	5		T14	21		T108	1
valid_sources[0x15]	8640	1			T13	4		T108	4		T81	1
valid_sources[0x16]	6778	1			T5	1		T109	2		T21	271
valid_sources[0x17]	6310	1			T108	1		T109	2		T81	1
valid_sources[0x18]	6946	1			T8	2		T15	1		T109	1
valid_sources[0x19]	6532	1			T13	2		T15	1		T21	249
valid_sources[0x1a]	7457	1			T8	1		T108	3		T21	246
valid_sources[0x1b]	6409	1			T12	9		T81	1		T21	262
valid_sources[0x1c]	6063	1			T8	1		T15	2		T21	309
valid_sources[0x1d]	6251	1			T5	1		T8	2		T11	2
valid_sources[0x1e]	6368	1			T8	1		T108	2		T21	215
valid_sources[0x1f]	7262	1			T12	2		T108	2		T21	290
valid_sources[0x20]	6450	1			T108	3		T81	1		T21	292
valid_sources[0x21]	6714	1			T12	13		T108	1		T21	267
valid_sources[0x22]	7121	1			T8	2		T81	2		T21	244
valid_sources[0x23]	5893	1			T109	1		T21	301		T61	3
valid_sources[0x24]	7291	1			T108	1		T109	1		T21	233
valid_sources[0x25]	7761	1			T5	2		T109	1		T21	250
valid_sources[0x26]	8006	1			T21	294		T61	2		T126	1
valid_sources[0x27]	6809	1			T8	1		T108	1		T21	287
valid_sources[0x28]	6060	1			T5	1		T15	1		T21	217
valid_sources[0x29]	6489	1			T21	170		T127	1		T128	5
valid_sources[0x2a]	6279	1			T5	2		T8	1		T109	3
valid_sources[0x2b]	5971	1			T5	2		T8	1		T21	207
valid_sources[0x2c]	7022	1			T5	2		T8	2		T109	1
valid_sources[0x2d]	7404	1			T8	1		T12	4		T109	2
valid_sources[0x2e]	6260	1			T8	1		T108	1		T21	359
valid_sources[0x2f]	6565	1			T8	1		T15	1		T12	6
valid_sources[0x30]	7393	1			T8	1		T108	3		T81	1
valid_sources[0x31]	7660	1			T109	2		T21	332		T61	1
valid_sources[0x32]	6792	1			T21	254		T61	2		T126	1
valid_sources[0x33]	7898	1			T8	2		T11	2		T13	2
valid_sources[0x34]	7372	1			T8	1		T14	13		T15	1
valid_sources[0x35]	6246	1			T108	1		T109	1		T21	204
valid_sources[0x36]	6871	1			T5	1		T8	1		T15	1
valid_sources[0x37]	7199	1			T5	2		T21	279		T61	1
valid_sources[0x38]	6646	1			T8	1		T51	1		T108	1
valid_sources[0x39]	6396	1			T8	1		T108	1		T109	1
valid_sources[0x3a]	6952	1			T108	1		T21	262		T126	3
valid_sources[0x3b]	6635	1			T15	2		T21	250		T125	3
valid_sources[0x3c]	7357	1			T4	33		T8	1		T15	1
valid_sources[0x3d]	6863	1			T8	2		T108	1		T109	1
valid_sources[0x3e]	6736	1			T5	1		T8	1		T13	4
valid_sources[0x3f]	6677	1			T109	1		T81	1		T21	262
valid_sources[0x40]	6545	1			T8	1		T21	246		T61	1
valid_sources[0x41]	7026	1			T8	1		T15	1		T81	1
valid_sources[0x42]	6185	1			T11	2		T108	5		T109	1
valid_sources[0x43]	6210	1			T21	269		T61	1		T126	4
valid_sources[0x44]	5867	1			T13	2		T15	1		T21	264
valid_sources[0x45]	7384	1			T13	1		T15	1		T108	3
valid_sources[0x46]	7377	1			T108	1		T81	1		T21	242
valid_sources[0x47]	6621	1			T5	1		T15	2		T21	274
valid_sources[0x48]	6690	1			T15	2		T108	3		T109	1
valid_sources[0x49]	7475	1			T8	1		T14	13		T109	2
valid_sources[0x4a]	6268	1			T12	1		T109	3		T21	190
valid_sources[0x4b]	6432	1			T8	1		T15	2		T21	217
valid_sources[0x4c]	7458	1			T109	1		T81	1		T21	248
valid_sources[0x4d]	8501	1			T8	3		T21	228		T61	2
valid_sources[0x4e]	7870	1			T11	2		T21	223		T61	2
valid_sources[0x4f]	6779	1			T5	2		T8	3		T108	1
valid_sources[0x50]	6859	1			T8	1		T13	1		T15	1
valid_sources[0x51]	6806	1			T12	10		T108	1		T109	1
valid_sources[0x52]	6292	1			T109	1		T21	288		T61	1
valid_sources[0x53]	8031	1			T109	1		T21	296		T61	2
valid_sources[0x54]	7645	1			T5	4		T109	2		T81	1
valid_sources[0x55]	5863	1			T15	2		T81	1		T21	228
valid_sources[0x56]	6582	1			T15	1		T81	1		T21	254
valid_sources[0x57]	8517	1			T8	3		T108	4		T109	2
valid_sources[0x58]	6149	1			T15	1		T108	2		T21	178
valid_sources[0x59]	6909	1			T108	3		T109	1		T21	209
valid_sources[0x5a]	7227	1			T8	2		T21	224		T126	1
valid_sources[0x5b]	7179	1			T108	4		T109	1		T21	267
valid_sources[0x5c]	6150	1			T13	2		T15	1		T37	3
valid_sources[0x5d]	6782	1			T5	5		T108	3		T21	219
valid_sources[0x5e]	7139	1			T8	1		T15	1		T108	2
valid_sources[0x5f]	7140	1			T8	1		T109	1		T21	279
valid_sources[0x60]	6833	1			T8	1		T108	1		T109	2
valid_sources[0x61]	6820	1			T2	3		T5	1		T8	2
valid_sources[0x62]	6148	1			T8	2		T15	1		T108	3
valid_sources[0x63]	6722	1			T8	1		T108	2		T21	230
valid_sources[0x64]	6738	1			T51	1		T109	2		T21	222
valid_sources[0x65]	6297	1			T8	1		T108	3		T21	286
valid_sources[0x66]	6537	1			T15	1		T21	222		T61	3
valid_sources[0x67]	6985	1			T8	1		T15	1		T81	1
valid_sources[0x68]	6030	1			T5	1		T15	1		T108	1
valid_sources[0x69]	6545	1			T5	1		T8	1		T15	1
valid_sources[0x6a]	6033	1			T5	2		T8	2		T15	1
valid_sources[0x6b]	6491	1			T108	5		T21	240		T61	4
valid_sources[0x6c]	6434	1			T15	2		T108	1		T21	212
valid_sources[0x6d]	7185	1			T5	1		T8	1		T108	1
valid_sources[0x6e]	7379	1			T14	10		T108	1		T81	1
valid_sources[0x6f]	6250	1			T11	3		T51	1		T108	1
valid_sources[0x70]	6385	1			T11	2		T109	1		T21	249
valid_sources[0x71]	6861	1			T5	1		T108	1		T21	304
valid_sources[0x72]	7220	1			T8	1		T108	8		T109	2
valid_sources[0x73]	8341	1			T8	1		T15	1		T108	2
valid_sources[0x74]	5952	1			T109	1		T21	245		T61	3
valid_sources[0x75]	6607	1			T8	1		T109	1		T21	259
valid_sources[0x76]	6273	1			T4	32		T8	2		T11	3
valid_sources[0x77]	7132	1			T81	2		T21	157		T59	5
valid_sources[0x78]	6338	1			T11	2		T109	1		T21	232
valid_sources[0x79]	6217	1			T15	2		T21	283		T126	3
valid_sources[0x7a]	6763	1			T108	1		T109	1		T21	311
valid_sources[0x7b]	6145	1			T5	2		T108	3		T109	1
valid_sources[0x7c]	6060	1			T13	2		T15	1		T109	3
valid_sources[0x7d]	7878	1			T109	3		T81	1		T21	250
valid_sources[0x7e]	6968	1			T108	2		T109	1		T21	255
valid_sources[0x7f]	5905	1			T4	46		T8	4		T15	1
valid_sources[0x80]	6686	1			T5	2		T15	1		T109	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

417448

1

T1

3

T2

3

T3

3

values[0x0]

all_enables

biggest_size

621498

1

T21

23585

T22

26880

T23

15121

values[0x1]

all_enables

biggest_size

621429

1

T21

23666

T22

27029

T23

15164

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	126596	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1279397

1

T1

5

T2

21

T3

16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	351055	1			T1	16		T2	35		T3	39
values[0x0]	488688	1			T6	5		T7	7		T19	3
values[0x1]	566250	1			T6	3		T7	9		T19	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	56839	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1349154

1

T1

6

T2

22

T3

20

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5639	1			T6	1		T15	1		T21	196
valid_sources[0x01]	5765	1			T21	208		T125	2		T22	274
valid_sources[0x02]	5464	1			T2	2		T21	198		T22	221
valid_sources[0x03]	5771	1			T15	1		T81	1		T21	224
valid_sources[0x04]	4963	1			T15	1		T21	222		T82	3
valid_sources[0x05]	5391	1			T21	214		T22	187		T23	164
valid_sources[0x06]	5834	1			T2	1		T21	207		T83	1
valid_sources[0x07]	6100	1			T21	233		T58	1		T22	245
valid_sources[0x08]	5517	1			T21	232		T62	1		T125	4
valid_sources[0x09]	5974	1			T81	1		T110	4		T21	235
valid_sources[0x0a]	5672	1			T3	2		T21	228		T82	1
valid_sources[0x0b]	5350	1			T6	1		T110	4		T21	219
valid_sources[0x0c]	5432	1			T21	209		T125	1		T22	249
valid_sources[0x0d]	5236	1			T81	1		T21	229		T22	208
valid_sources[0x0e]	5807	1			T15	1		T21	248		T125	1
valid_sources[0x0f]	6281	1			T2	1		T21	221		T82	3
valid_sources[0x10]	5700	1			T5	1		T15	1		T21	215
valid_sources[0x11]	5316	1			T47	10		T110	1		T21	225
valid_sources[0x12]	4993	1			T21	234		T125	1		T82	1
valid_sources[0x13]	5436	1			T21	211		T40	2		T22	219
valid_sources[0x14]	5394	1			T15	1		T21	189		T22	256
valid_sources[0x15]	4992	1			T5	3		T15	1		T21	212
valid_sources[0x16]	5368	1			T110	2		T21	228		T82	1
valid_sources[0x17]	6045	1			T21	205		T60	1		T125	1
valid_sources[0x18]	5503	1			T21	244		T22	261		T23	137
valid_sources[0x19]	6808	1			T15	1		T21	249		T40	1
valid_sources[0x1a]	5855	1			T3	2		T21	171		T22	259
valid_sources[0x1b]	5366	1			T21	218		T40	1		T22	237
valid_sources[0x1c]	5673	1			T15	1		T20	3		T21	236
valid_sources[0x1d]	5661	1			T81	2		T21	210		T82	2
valid_sources[0x1e]	6963	1			T11	11		T13	1		T21	243
valid_sources[0x1f]	5180	1			T15	1		T21	244		T22	254
valid_sources[0x20]	5535	1			T15	2		T21	197		T22	250
valid_sources[0x21]	5129	1			T81	1		T21	223		T125	3
valid_sources[0x22]	6267	1			T5	5		T81	2		T21	194
valid_sources[0x23]	6015	1			T15	1		T21	196		T22	270
valid_sources[0x24]	5211	1			T21	225		T39	2		T22	225
valid_sources[0x25]	5991	1			T110	1		T21	178		T60	1
valid_sources[0x26]	6277	1			T3	4		T21	207		T125	1
valid_sources[0x27]	5591	1			T21	220		T22	206		T23	152
valid_sources[0x28]	4803	1			T21	249		T22	223		T129	1
valid_sources[0x29]	5957	1			T1	16		T21	218		T125	6
valid_sources[0x2a]	5823	1			T21	219		T22	201		T129	1
valid_sources[0x2b]	6348	1			T21	221		T82	1		T40	1
valid_sources[0x2c]	5596	1			T21	212		T40	2		T22	256
valid_sources[0x2d]	5196	1			T12	12		T21	215		T83	1
valid_sources[0x2e]	5048	1			T15	1		T21	206		T50	1
valid_sources[0x2f]	5276	1			T10	1		T21	231		T38	2
valid_sources[0x30]	4891	1			T12	5		T21	196		T82	1
valid_sources[0x31]	4784	1			T12	2		T81	1		T21	193
valid_sources[0x32]	5107	1			T2	1		T21	212		T82	1
valid_sources[0x33]	5091	1			T15	2		T81	1		T21	207
valid_sources[0x34]	5110	1			T15	1		T19	1		T21	229
valid_sources[0x35]	4796	1			T2	1		T15	2		T110	4
valid_sources[0x36]	5467	1			T20	2		T21	227		T125	1
valid_sources[0x37]	6637	1			T2	1		T21	242		T22	259
valid_sources[0x38]	4743	1			T110	3		T21	203		T71	2
valid_sources[0x39]	5757	1			T110	7		T21	214		T83	1
valid_sources[0x3a]	6261	1			T110	1		T21	200		T62	2
valid_sources[0x3b]	5124	1			T2	1		T5	1		T15	1
valid_sources[0x3c]	5651	1			T21	218		T82	2		T22	210
valid_sources[0x3d]	5172	1			T15	1		T21	207		T124	1
valid_sources[0x3e]	4858	1			T37	20		T21	209		T22	220
valid_sources[0x3f]	5314	1			T21	213		T125	2		T22	231
valid_sources[0x40]	5060	1			T110	2		T21	235		T83	1
valid_sources[0x41]	4989	1			T21	230		T22	224		T23	146
valid_sources[0x42]	4745	1			T3	2		T110	2		T21	206
valid_sources[0x43]	5363	1			T13	1		T21	226		T22	199
valid_sources[0x44]	5171	1			T21	193		T22	224		T23	108
valid_sources[0x45]	4685	1			T2	1		T5	4		T21	214
valid_sources[0x46]	5419	1			T21	223		T60	1		T22	272
valid_sources[0x47]	5087	1			T20	3		T21	230		T40	2
valid_sources[0x48]	5388	1			T13	1		T21	189		T58	2
valid_sources[0x49]	5205	1			T110	5		T21	200		T62	2
valid_sources[0x4a]	5101	1			T15	1		T21	201		T82	1
valid_sources[0x4b]	5442	1			T81	2		T21	208		T22	207
valid_sources[0x4c]	4929	1			T21	230		T82	1		T22	256
valid_sources[0x4d]	5502	1			T15	1		T21	193		T22	254
valid_sources[0x4e]	4787	1			T15	2		T110	3		T21	232
valid_sources[0x4f]	5817	1			T13	1		T21	233		T83	1
valid_sources[0x50]	6108	1			T3	3		T21	226		T125	4
valid_sources[0x51]	5522	1			T2	1		T81	1		T21	249
valid_sources[0x52]	5516	1			T15	1		T21	240		T22	237
valid_sources[0x53]	5358	1			T7	16		T21	217		T41	1
valid_sources[0x54]	5553	1			T13	1		T21	224		T22	223
valid_sources[0x55]	5583	1			T110	1		T21	199		T62	2
valid_sources[0x56]	6002	1			T3	1		T21	190		T125	1
valid_sources[0x57]	4601	1			T13	1		T21	208		T82	4
valid_sources[0x58]	4381	1			T21	228		T22	240		T130	1
valid_sources[0x59]	5788	1			T15	1		T21	230		T22	233
valid_sources[0x5a]	5847	1			T21	207		T70	5		T124	2
valid_sources[0x5b]	5701	1			T2	1		T21	212		T22	272
valid_sources[0x5c]	5988	1			T21	195		T82	1		T22	274
valid_sources[0x5d]	6035	1			T47	3		T21	216		T58	1
valid_sources[0x5e]	4780	1			T81	1		T24	1		T21	206
valid_sources[0x5f]	5503	1			T13	1		T21	231		T22	228
valid_sources[0x60]	6045	1			T15	1		T21	215		T82	2
valid_sources[0x61]	5348	1			T21	217		T22	222		T23	165
valid_sources[0x62]	5143	1			T15	1		T21	205		T60	1
valid_sources[0x63]	5316	1			T2	1		T21	206		T125	1
valid_sources[0x64]	5202	1			T15	1		T21	220		T82	3
valid_sources[0x65]	4927	1			T21	255		T22	234		T23	152
valid_sources[0x66]	5320	1			T15	1		T19	2		T21	214
valid_sources[0x67]	5257	1			T2	2		T21	216		T39	2
valid_sources[0x68]	5195	1			T3	1		T81	1		T21	197
valid_sources[0x69]	6558	1			T20	2		T21	224		T125	1
valid_sources[0x6a]	4931	1			T15	1		T21	220		T62	2
valid_sources[0x6b]	5440	1			T6	3		T21	221		T22	276
valid_sources[0x6c]	5415	1			T15	1		T20	2		T81	1
valid_sources[0x6d]	4222	1			T2	1		T21	213		T58	1
valid_sources[0x6e]	5598	1			T15	1		T21	178		T22	236
valid_sources[0x6f]	5914	1			T21	244		T125	1		T22	250
valid_sources[0x70]	5797	1			T15	2		T21	201		T82	1
valid_sources[0x71]	5150	1			T5	1		T21	203		T22	237
valid_sources[0x72]	6741	1			T19	1		T81	1		T110	1
valid_sources[0x73]	6058	1			T3	7		T21	233		T22	236
valid_sources[0x74]	5274	1			T21	180		T22	242		T23	144
valid_sources[0x75]	6322	1			T13	1		T21	201		T82	2
valid_sources[0x76]	5744	1			T13	4		T21	239		T83	1
valid_sources[0x77]	4831	1			T110	1		T21	211		T83	1
valid_sources[0x78]	6459	1			T2	3		T81	1		T110	3
valid_sources[0x79]	6379	1			T21	213		T82	1		T22	252
valid_sources[0x7a]	5537	1			T2	1		T13	1		T15	1
valid_sources[0x7b]	5596	1			T21	241		T22	228		T129	2
valid_sources[0x7c]	5058	1			T11	1		T21	265		T57	32
valid_sources[0x7d]	4700	1			T6	2		T21	220		T62	1
valid_sources[0x7e]	6349	1			T2	1		T15	2		T21	215
valid_sources[0x7f]	5102	1			T21	169		T22	218		T23	143
valid_sources[0x80]	6034	1			T15	1		T21	237		T22	203

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

323048

1

T1

5

T2

21

T3

16

values[0x0]

all_enables

biggest_size

478411

1

T6

3

T7

3

T19

3

values[0x1]

all_enables

biggest_size

477938

1

T6

1

T7

3

T21

19265