Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 49768 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 938755 1 T2 10 T3 6 T4 6



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 268159 1 T2 150 T3 6 T4 67
values[0x0] 353664 1 T12 16262 T13 52741 T14 58168
values[0x1] 366700 1 T12 16704 T13 54644 T14 59904



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 24959 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 963564 1 T2 90 T3 6 T4 39



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 3651 1 T4 1 T6 1 T9 1
valid_sources[0x01] 3566 1 T6 1 T9 1 T17 5
valid_sources[0x02] 4753 1 T9 1 T17 1 T29 3
valid_sources[0x03] 3657 1 T2 1 T8 1 T17 1
valid_sources[0x04] 3679 1 T6 3 T16 1 T17 1
valid_sources[0x05] 3539 1 T4 1 T17 1 T12 145
valid_sources[0x06] 4595 1 T2 1 T4 3 T6 3
valid_sources[0x07] 3765 1 T9 2 T17 2 T26 6
valid_sources[0x08] 3453 1 T12 183 T52 1 T110 1
valid_sources[0x09] 3667 1 T2 1 T9 1 T17 3
valid_sources[0x0a] 3814 1 T10 6 T26 3 T11 1
valid_sources[0x0b] 3682 1 T2 1 T9 5 T17 1
valid_sources[0x0c] 3445 1 T12 168 T33 3 T76 1
valid_sources[0x0d] 3534 1 T2 1 T6 3 T17 2
valid_sources[0x0e] 4104 1 T17 1 T26 1 T12 191
valid_sources[0x0f] 3673 1 T2 1 T6 2 T9 1
valid_sources[0x10] 3775 1 T2 1 T6 1 T9 2
valid_sources[0x11] 4019 1 T6 1 T9 3 T16 1
valid_sources[0x12] 3712 1 T4 1 T6 1 T9 4
valid_sources[0x13] 3649 1 T16 1 T17 2 T26 1
valid_sources[0x14] 3753 1 T2 2 T4 2 T9 3
valid_sources[0x15] 3674 1 T4 1 T6 1 T9 5
valid_sources[0x16] 3847 1 T4 1 T17 1 T29 1
valid_sources[0x17] 3853 1 T17 1 T26 1 T12 163
valid_sources[0x18] 4318 1 T2 2 T4 1 T6 3
valid_sources[0x19] 3848 1 T9 1 T17 6 T26 3
valid_sources[0x1a] 3664 1 T6 1 T17 1 T12 168
valid_sources[0x1b] 3611 1 T6 3 T9 6 T17 3
valid_sources[0x1c] 3572 1 T2 1 T9 2 T26 2
valid_sources[0x1d] 3584 1 T2 2 T9 1 T17 1
valid_sources[0x1e] 3788 1 T2 1 T4 2 T6 3
valid_sources[0x1f] 4005 1 T17 2 T26 1 T29 7
valid_sources[0x20] 3541 1 T2 1 T6 1 T9 1
valid_sources[0x21] 3945 1 T2 1 T6 2 T9 1
valid_sources[0x22] 3676 1 T9 1 T17 1 T26 4
valid_sources[0x23] 4090 1 T2 1 T6 1 T9 5
valid_sources[0x24] 3875 1 T6 1 T9 1 T17 1
valid_sources[0x25] 3825 1 T2 1 T6 2 T9 3
valid_sources[0x26] 4302 1 T2 1 T4 1 T17 1
valid_sources[0x27] 3732 1 T2 1 T9 1 T17 2
valid_sources[0x28] 3587 1 T9 1 T10 7 T17 3
valid_sources[0x29] 3759 1 T9 1 T17 2 T26 1
valid_sources[0x2a] 3934 1 T2 1 T6 1 T9 2
valid_sources[0x2b] 3741 1 T2 1 T9 1 T10 2
valid_sources[0x2c] 5318 1 T6 1 T17 1 T26 2
valid_sources[0x2d] 3625 1 T2 1 T17 2 T26 1
valid_sources[0x2e] 4341 1 T16 1 T26 1 T11 4
valid_sources[0x2f] 4074 1 T2 2 T4 1 T6 1
valid_sources[0x30] 4211 1 T2 1 T6 3 T17 2
valid_sources[0x31] 3883 1 T9 7 T17 1 T26 1
valid_sources[0x32] 3781 1 T16 2 T17 2 T26 2
valid_sources[0x33] 3565 1 T2 2 T9 4 T17 1
valid_sources[0x34] 4118 1 T2 2 T6 1 T9 2
valid_sources[0x35] 3673 1 T2 1 T9 2 T17 1
valid_sources[0x36] 4015 1 T9 1 T16 1 T17 2
valid_sources[0x37] 3629 1 T16 4 T17 1 T29 5
valid_sources[0x38] 3900 1 T2 2 T6 1 T16 1
valid_sources[0x39] 3964 1 T2 1 T6 1 T26 1
valid_sources[0x3a] 4689 1 T2 1 T4 2 T9 1
valid_sources[0x3b] 3739 1 T3 1 T9 7 T17 1
valid_sources[0x3c] 3457 1 T6 1 T8 3 T26 2
valid_sources[0x3d] 3653 1 T3 1 T6 1 T16 3
valid_sources[0x3e] 3624 1 T2 1 T6 2 T10 4
valid_sources[0x3f] 3618 1 T4 2 T6 1 T12 189
valid_sources[0x40] 3583 1 T2 1 T6 1 T9 2
valid_sources[0x41] 3817 1 T2 4 T4 3 T9 6
valid_sources[0x42] 3788 1 T2 1 T9 2 T11 1
valid_sources[0x43] 4095 1 T2 2 T6 1 T29 1
valid_sources[0x44] 4370 1 T9 2 T17 1 T11 1
valid_sources[0x45] 3552 1 T16 1 T17 2 T26 1
valid_sources[0x46] 3590 1 T6 2 T17 5 T26 4
valid_sources[0x47] 3662 1 T11 4 T12 180 T32 2
valid_sources[0x48] 3736 1 T9 1 T17 1 T26 3
valid_sources[0x49] 3633 1 T9 1 T17 2 T12 176
valid_sources[0x4a] 3775 1 T2 2 T3 1 T4 1
valid_sources[0x4b] 3818 1 T8 3 T9 3 T17 3
valid_sources[0x4c] 3897 1 T9 1 T16 3 T17 2
valid_sources[0x4d] 3775 1 T4 1 T6 5 T9 1
valid_sources[0x4e] 5318 1 T9 2 T17 2 T26 3
valid_sources[0x4f] 4050 1 T17 1 T26 1 T29 8
valid_sources[0x50] 4302 1 T17 5 T26 1 T29 1
valid_sources[0x51] 3512 1 T6 1 T9 2 T17 1
valid_sources[0x52] 4146 1 T6 3 T17 1 T26 1
valid_sources[0x53] 3710 1 T4 1 T5 23 T17 2
valid_sources[0x54] 3617 1 T17 2 T26 1 T11 2
valid_sources[0x55] 3756 1 T2 2 T17 1 T26 2
valid_sources[0x56] 3959 1 T2 2 T6 3 T17 2
valid_sources[0x57] 4295 1 T9 3 T26 2 T12 154
valid_sources[0x58] 3734 1 T2 2 T9 1 T17 1
valid_sources[0x59] 3471 1 T17 1 T26 1 T29 2
valid_sources[0x5a] 3647 1 T9 4 T17 1 T29 3
valid_sources[0x5b] 3608 1 T6 1 T9 1 T10 6
valid_sources[0x5c] 3733 1 T2 1 T4 1 T9 1
valid_sources[0x5d] 3764 1 T2 1 T6 2 T17 1
valid_sources[0x5e] 3947 1 T4 2 T17 1 T12 155
valid_sources[0x5f] 4424 1 T17 2 T26 2 T29 2
valid_sources[0x60] 3524 1 T4 2 T9 1 T17 2
valid_sources[0x61] 3683 1 T2 1 T9 2 T17 1
valid_sources[0x62] 4190 1 T4 1 T9 2 T16 2
valid_sources[0x63] 3922 1 T2 3 T9 3 T17 2
valid_sources[0x64] 3939 1 T9 1 T10 9 T17 9
valid_sources[0x65] 4041 1 T10 12 T16 1 T17 4
valid_sources[0x66] 3644 1 T9 2 T12 180 T111 1
valid_sources[0x67] 3814 1 T9 1 T17 3 T26 1
valid_sources[0x68] 3808 1 T2 2 T9 2 T16 3
valid_sources[0x69] 3805 1 T2 2 T6 2 T17 3
valid_sources[0x6a] 4884 1 T2 1 T6 1 T9 6
valid_sources[0x6b] 3925 1 T2 4 T6 2 T9 3
valid_sources[0x6c] 5230 1 T12 172 T32 1 T75 1
valid_sources[0x6d] 4371 1 T9 2 T26 2 T29 2
valid_sources[0x6e] 3871 1 T2 2 T8 1 T9 1
valid_sources[0x6f] 3842 1 T2 1 T9 1 T17 1
valid_sources[0x70] 3719 1 T9 1 T10 13 T11 1
valid_sources[0x71] 4062 1 T4 1 T9 1 T17 1
valid_sources[0x72] 3816 1 T6 1 T9 2 T16 1
valid_sources[0x73] 3711 1 T6 1 T10 1 T17 4
valid_sources[0x74] 4029 1 T3 1 T6 1 T9 4
valid_sources[0x75] 4306 1 T9 1 T10 3 T26 2
valid_sources[0x76] 3711 1 T6 1 T9 2 T10 1
valid_sources[0x77] 3919 1 T2 2 T12 166 T76 3
valid_sources[0x78] 4338 1 T2 4 T6 1 T9 4
valid_sources[0x79] 3833 1 T5 23 T17 1 T26 2
valid_sources[0x7a] 3756 1 T2 1 T9 4 T17 1
valid_sources[0x7b] 3573 1 T16 1 T17 1 T29 1
valid_sources[0x7c] 3802 1 T17 5 T12 169 T110 1
valid_sources[0x7d] 4126 1 T2 2 T9 1 T17 4
valid_sources[0x7e] 3784 1 T2 1 T16 1 T17 1
valid_sources[0x7f] 3818 1 T9 2 T17 3 T26 1
valid_sources[0x80] 3590 1 T4 4 T9 1 T17 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 237291 1 T2 10 T3 6 T4 6
values[0x0] all_enables biggest_size 350505 1 T12 16110 T13 52247 T14 57654
values[0x1] all_enables biggest_size 350959 1 T12 16000 T13 52258 T14 57325


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 72638 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 725850 1 T1 1 T2 32 T3 9



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 202904 1 T1 1 T2 64 T3 18
values[0x0] 276896 1 T12 13645 T22 9 T23 6
values[0x1] 318688 1 T12 15274 T22 9 T23 4



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 33813 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 764675 1 T1 1 T2 38 T3 11



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2701 1 T12 103 T22 1 T13 456
valid_sources[0x01] 2939 1 T12 8 T78 2 T13 395
valid_sources[0x02] 3807 1 T12 52 T36 4 T13 418
valid_sources[0x03] 4040 1 T17 1 T12 319 T23 1
valid_sources[0x04] 2881 1 T2 3 T12 162 T112 2
valid_sources[0x05] 3127 1 T4 1 T12 94 T76 4
valid_sources[0x06] 3493 1 T6 3 T12 280 T79 1
valid_sources[0x07] 3600 1 T4 3 T19 1 T12 11
valid_sources[0x08] 3606 1 T12 579 T112 1 T41 2
valid_sources[0x09] 3815 1 T12 8 T52 3 T76 2
valid_sources[0x0a] 3721 1 T6 1 T17 1 T12 228
valid_sources[0x0b] 3205 1 T12 111 T79 1 T13 417
valid_sources[0x0c] 3645 1 T3 6 T12 37 T62 2
valid_sources[0x0d] 2216 1 T17 2 T12 2 T74 8
valid_sources[0x0e] 2709 1 T4 1 T10 1 T17 1
valid_sources[0x0f] 2949 1 T6 3 T12 311 T13 444
valid_sources[0x10] 3878 1 T12 184 T112 1 T13 423
valid_sources[0x11] 2544 1 T12 2 T13 398 T113 2
valid_sources[0x12] 3530 1 T17 1 T12 18 T13 403
valid_sources[0x13] 2695 1 T10 2 T112 1 T13 438
valid_sources[0x14] 4035 1 T12 434 T13 508 T114 3
valid_sources[0x15] 2426 1 T10 2 T12 120 T78 2
valid_sources[0x16] 3267 1 T19 1 T13 413 T115 1
valid_sources[0x17] 2453 1 T12 195 T74 24 T79 1
valid_sources[0x18] 2545 1 T12 202 T13 450 T116 2
valid_sources[0x19] 3592 1 T17 2 T12 239 T22 1
valid_sources[0x1a] 3054 1 T12 426 T117 1 T13 436
valid_sources[0x1b] 2568 1 T10 1 T17 5 T19 4
valid_sources[0x1c] 2769 1 T12 155 T74 1 T20 1
valid_sources[0x1d] 3480 1 T12 298 T13 534 T118 1
valid_sources[0x1e] 2995 1 T6 2 T10 4 T23 3
valid_sources[0x1f] 3086 1 T2 1 T4 1 T17 3
valid_sources[0x20] 2304 1 T12 335 T112 1 T13 412
valid_sources[0x21] 3751 1 T17 1 T19 3 T13 430
valid_sources[0x22] 2495 1 T75 1 T79 1 T13 378
valid_sources[0x23] 3057 1 T6 1 T12 174 T76 1
valid_sources[0x24] 2619 1 T20 1 T13 408 T119 1
valid_sources[0x25] 3022 1 T2 11 T7 1 T12 71
valid_sources[0x26] 2538 1 T12 187 T74 1 T76 3
valid_sources[0x27] 2321 1 T13 459 T42 2 T14 152
valid_sources[0x28] 3338 1 T4 1 T12 72 T13 458
valid_sources[0x29] 3006 1 T18 32 T12 8 T112 1
valid_sources[0x2a] 2710 1 T12 318 T13 404 T120 1
valid_sources[0x2b] 2953 1 T12 337 T75 1 T121 1
valid_sources[0x2c] 2974 1 T10 2 T12 1 T79 1
valid_sources[0x2d] 3399 1 T17 11 T12 163 T122 11
valid_sources[0x2e] 2729 1 T17 2 T12 227 T34 1
valid_sources[0x2f] 3553 1 T13 415 T123 1 T124 2
valid_sources[0x30] 2799 1 T10 1 T12 239 T22 1
valid_sources[0x31] 2904 1 T10 1 T12 1 T52 9
valid_sources[0x32] 3686 1 T12 2 T125 1 T13 412
valid_sources[0x33] 3345 1 T12 409 T13 445 T14 903
valid_sources[0x34] 3265 1 T10 1 T17 1 T22 1
valid_sources[0x35] 2505 1 T17 1 T12 53 T126 3
valid_sources[0x36] 2733 1 T78 3 T13 468 T116 1
valid_sources[0x37] 3891 1 T12 772 T78 2 T13 377
valid_sources[0x38] 4049 1 T2 4 T12 165 T20 1
valid_sources[0x39] 2782 1 T17 4 T12 157 T13 448
valid_sources[0x3a] 2718 1 T1 1 T4 1 T17 2
valid_sources[0x3b] 3408 1 T10 2 T12 79 T41 1
valid_sources[0x3c] 3388 1 T17 10 T12 488 T41 1
valid_sources[0x3d] 3180 1 T12 341 T13 430 T114 1
valid_sources[0x3e] 3302 1 T12 353 T112 1 T13 461
valid_sources[0x3f] 3737 1 T2 4 T17 7 T12 189
valid_sources[0x40] 3489 1 T4 1 T13 446 T120 1
valid_sources[0x41] 3797 1 T4 1 T12 134 T76 16
valid_sources[0x42] 3247 1 T12 22 T33 11 T20 1
valid_sources[0x43] 2866 1 T6 2 T12 140 T78 2
valid_sources[0x44] 3398 1 T12 361 T112 1 T13 400
valid_sources[0x45] 4204 1 T6 1 T22 1 T20 1
valid_sources[0x46] 3116 1 T17 1 T12 73 T13 381
valid_sources[0x47] 3688 1 T6 2 T17 3 T12 63
valid_sources[0x48] 4616 1 T6 5 T12 372 T13 490
valid_sources[0x49] 3100 1 T12 111 T76 1 T13 411
valid_sources[0x4a] 3824 1 T4 1 T19 1 T12 56
valid_sources[0x4b] 3366 1 T13 434 T127 3 T14 897
valid_sources[0x4c] 2404 1 T17 1 T13 446 T115 1
valid_sources[0x4d] 3153 1 T13 366 T119 2 T114 1
valid_sources[0x4e] 2822 1 T4 4 T12 664 T13 500
valid_sources[0x4f] 2536 1 T10 1 T17 4 T12 3
valid_sources[0x50] 3420 1 T12 1 T128 32 T13 451
valid_sources[0x51] 2580 1 T112 1 T121 1 T13 401
valid_sources[0x52] 2939 1 T6 2 T12 181 T79 1
valid_sources[0x53] 2709 1 T12 319 T20 1 T36 7
valid_sources[0x54] 2645 1 T75 1 T13 453 T129 1
valid_sources[0x55] 3489 1 T10 2 T12 157 T76 6
valid_sources[0x56] 2568 1 T12 115 T34 11 T41 1
valid_sources[0x57] 2150 1 T2 1 T12 3 T76 3
valid_sources[0x58] 3340 1 T12 6 T76 2 T59 2
valid_sources[0x59] 2834 1 T12 121 T78 1 T13 460
valid_sources[0x5a] 3410 1 T10 8 T12 327 T13 439
valid_sources[0x5b] 3013 1 T17 1 T12 160 T75 1
valid_sources[0x5c] 2333 1 T10 2 T75 1 T13 409
valid_sources[0x5d] 3223 1 T6 2 T36 2 T13 463
valid_sources[0x5e] 3476 1 T17 2 T12 9 T13 453
valid_sources[0x5f] 3646 1 T12 540 T13 396 T130 1
valid_sources[0x60] 3823 1 T17 2 T12 220 T112 1
valid_sources[0x61] 2387 1 T6 1 T12 8 T62 1
valid_sources[0x62] 3106 1 T4 4 T12 225 T13 411
valid_sources[0x63] 1720 1 T17 3 T13 326 T131 1
valid_sources[0x64] 3864 1 T12 166 T13 478 T119 2
valid_sources[0x65] 4190 1 T17 3 T12 256 T76 6
valid_sources[0x66] 2158 1 T10 3 T12 17 T20 1
valid_sources[0x67] 2723 1 T17 1 T12 20 T13 464
valid_sources[0x68] 3314 1 T2 5 T12 4 T59 2
valid_sources[0x69] 4068 1 T12 133 T76 4 T41 1
valid_sources[0x6a] 2737 1 T19 1 T12 9 T13 434
valid_sources[0x6b] 2788 1 T12 95 T126 5 T79 1
valid_sources[0x6c] 2405 1 T12 3 T74 1 T20 1
valid_sources[0x6d] 3068 1 T12 112 T24 5 T74 4
valid_sources[0x6e] 3007 1 T10 3 T126 12 T13 435
valid_sources[0x6f] 2297 1 T12 1 T74 24 T13 480
valid_sources[0x70] 2782 1 T22 1 T74 6 T75 1
valid_sources[0x71] 4173 1 T12 666 T13 379 T129 1
valid_sources[0x72] 2018 1 T13 486 T114 1 T14 109
valid_sources[0x73] 3366 1 T12 98 T59 3 T112 1
valid_sources[0x74] 3409 1 T17 2 T12 398 T13 380
valid_sources[0x75] 3208 1 T12 124 T63 1 T13 447
valid_sources[0x76] 3339 1 T6 8 T12 101 T13 437
valid_sources[0x77] 3412 1 T3 7 T10 1 T12 457
valid_sources[0x78] 3519 1 T17 1 T12 3 T62 1
valid_sources[0x79] 2528 1 T12 195 T36 7 T13 423
valid_sources[0x7a] 3817 1 T3 5 T17 1 T12 1
valid_sources[0x7b] 2481 1 T6 3 T10 2 T13 453
valid_sources[0x7c] 3015 1 T12 221 T36 1 T13 472
valid_sources[0x7d] 2764 1 T26 128 T12 199 T76 3
valid_sources[0x7e] 2684 1 T10 1 T12 109 T13 487
valid_sources[0x7f] 4604 1 T12 559 T13 411 T114 1
valid_sources[0x80] 2843 1 T12 130 T76 2 T112 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 184292 1 T1 1 T2 32 T3 9
values[0x0] all_enables biggest_size 271078 1 T12 13391 T22 2 T23 1
values[0x1] all_enables biggest_size 270480 1 T12 12948 T22 1 T23 1

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