Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 63244 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1498630 1 T1 9 T2 3 T3 6



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 410488 1 T1 9 T2 3 T3 6
values[0x0] 565543 1 T7 28996 T15 45343 T16 113245
values[0x1] 585843 1 T7 30322 T15 47277 T16 117492



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 32510 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1529364 1 T1 9 T2 3 T3 6



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 7296 1 T7 283 T17 1 T21 3
valid_sources[0x01] 5961 1 T5 6 T7 310 T21 2
valid_sources[0x02] 6684 1 T5 8 T6 6 T7 330
valid_sources[0x03] 6376 1 T7 326 T69 2 T119 2
valid_sources[0x04] 6428 1 T7 319 T21 2 T120 1
valid_sources[0x05] 5652 1 T7 285 T21 2 T103 5
valid_sources[0x06] 6289 1 T7 300 T21 1 T56 1
valid_sources[0x07] 6308 1 T7 286 T14 1 T120 2
valid_sources[0x08] 5970 1 T7 282 T17 2 T21 1
valid_sources[0x09] 5329 1 T5 1 T7 333 T13 28
valid_sources[0x0a] 5615 1 T7 319 T21 1 T56 4
valid_sources[0x0b] 5852 1 T5 7 T7 309 T21 2
valid_sources[0x0c] 6013 1 T7 303 T21 2 T80 1
valid_sources[0x0d] 7538 1 T7 330 T21 4 T46 4
valid_sources[0x0e] 6485 1 T7 311 T14 2 T121 2
valid_sources[0x0f] 5715 1 T7 275 T69 1 T119 1
valid_sources[0x10] 5180 1 T7 344 T21 1 T14 2
valid_sources[0x11] 7069 1 T5 4 T7 286 T21 1
valid_sources[0x12] 5990 1 T7 311 T21 4 T69 5
valid_sources[0x13] 6460 1 T7 301 T17 1 T14 1
valid_sources[0x14] 6283 1 T7 296 T17 1 T21 7
valid_sources[0x15] 5844 1 T7 316 T14 1 T69 5
valid_sources[0x16] 6986 1 T7 326 T21 2 T56 5
valid_sources[0x17] 5754 1 T7 345 T11 41 T14 1
valid_sources[0x18] 5578 1 T7 281 T21 6 T14 1
valid_sources[0x19] 6098 1 T7 295 T17 7 T14 1
valid_sources[0x1a] 6198 1 T7 303 T21 2 T14 1
valid_sources[0x1b] 6384 1 T7 311 T17 1 T69 3
valid_sources[0x1c] 6537 1 T7 314 T56 2 T69 5
valid_sources[0x1d] 6574 1 T7 297 T21 7 T119 1
valid_sources[0x1e] 6090 1 T7 319 T11 35 T21 2
valid_sources[0x1f] 5570 1 T7 321 T11 13 T14 1
valid_sources[0x20] 6330 1 T5 12 T7 324 T14 1
valid_sources[0x21] 6203 1 T7 296 T17 1 T14 1
valid_sources[0x22] 6882 1 T7 290 T17 1 T69 5
valid_sources[0x23] 5921 1 T7 302 T121 8 T19 1
valid_sources[0x24] 6470 1 T7 314 T21 2 T82 1
valid_sources[0x25] 5623 1 T5 14 T7 319 T14 2
valid_sources[0x26] 5198 1 T7 301 T17 2 T21 3
valid_sources[0x27] 5604 1 T7 320 T17 1 T121 3
valid_sources[0x28] 6291 1 T3 1 T7 318 T21 1
valid_sources[0x29] 5939 1 T7 312 T21 2 T119 1
valid_sources[0x2a] 6013 1 T7 307 T17 1 T21 7
valid_sources[0x2b] 6058 1 T5 1 T7 313 T122 1
valid_sources[0x2c] 7631 1 T7 291 T21 1 T123 1
valid_sources[0x2d] 5830 1 T7 300 T17 10 T56 3
valid_sources[0x2e] 6100 1 T7 312 T21 3 T80 1
valid_sources[0x2f] 6166 1 T7 318 T69 1 T123 3
valid_sources[0x30] 5942 1 T7 289 T122 1 T119 2
valid_sources[0x31] 7163 1 T5 4 T7 311 T69 1
valid_sources[0x32] 5648 1 T7 315 T14 2 T69 2
valid_sources[0x33] 6418 1 T5 2 T7 295 T123 1
valid_sources[0x34] 5619 1 T7 306 T69 4 T123 1
valid_sources[0x35] 6082 1 T7 308 T17 2 T21 2
valid_sources[0x36] 5405 1 T5 2 T7 304 T21 2
valid_sources[0x37] 6808 1 T5 2 T7 297 T121 9
valid_sources[0x38] 6643 1 T7 311 T119 1 T80 1
valid_sources[0x39] 6316 1 T7 295 T119 1 T19 1
valid_sources[0x3a] 6148 1 T7 318 T21 5 T69 3
valid_sources[0x3b] 5710 1 T7 290 T17 2 T14 1
valid_sources[0x3c] 5954 1 T7 305 T17 2 T21 2
valid_sources[0x3d] 5715 1 T7 314 T17 2 T21 1
valid_sources[0x3e] 6064 1 T7 306 T122 1 T120 8
valid_sources[0x3f] 5790 1 T7 292 T14 3 T69 1
valid_sources[0x40] 5564 1 T7 306 T21 7 T14 1
valid_sources[0x41] 6632 1 T1 9 T5 6 T7 300
valid_sources[0x42] 6884 1 T7 307 T17 1 T119 3
valid_sources[0x43] 6157 1 T7 312 T17 1 T21 1
valid_sources[0x44] 5997 1 T7 311 T124 1 T34 1
valid_sources[0x45] 7060 1 T5 1 T7 308 T56 2
valid_sources[0x46] 5410 1 T7 296 T56 3 T122 1
valid_sources[0x47] 6779 1 T7 272 T17 1 T123 1
valid_sources[0x48] 5549 1 T7 307 T25 32 T122 1
valid_sources[0x49] 6653 1 T7 334 T17 1 T21 2
valid_sources[0x4a] 5586 1 T5 2 T7 313 T124 1
valid_sources[0x4b] 7446 1 T5 8 T7 334 T21 2
valid_sources[0x4c] 5545 1 T5 15 T7 312 T17 1
valid_sources[0x4d] 6331 1 T3 1 T7 299 T14 2
valid_sources[0x4e] 6605 1 T7 307 T21 4 T69 1
valid_sources[0x4f] 5728 1 T7 311 T69 4 T122 1
valid_sources[0x50] 5776 1 T7 342 T17 2 T21 3
valid_sources[0x51] 5510 1 T7 318 T17 1 T21 1
valid_sources[0x52] 5937 1 T7 298 T21 4 T69 2
valid_sources[0x53] 6405 1 T7 261 T21 12 T14 1
valid_sources[0x54] 5724 1 T7 286 T14 2 T119 1
valid_sources[0x55] 6833 1 T7 290 T21 1 T18 1
valid_sources[0x56] 5981 1 T5 5 T7 327 T56 3
valid_sources[0x57] 5634 1 T7 283 T17 1 T25 31
valid_sources[0x58] 5857 1 T7 330 T21 2 T18 1
valid_sources[0x59] 5739 1 T7 331 T14 1 T123 2
valid_sources[0x5a] 7083 1 T7 324 T17 1 T119 1
valid_sources[0x5b] 5822 1 T5 1 T7 312 T119 2
valid_sources[0x5c] 6305 1 T5 3 T7 297 T14 1
valid_sources[0x5d] 6436 1 T7 320 T25 29 T69 2
valid_sources[0x5e] 5911 1 T7 270 T17 2 T21 1
valid_sources[0x5f] 5707 1 T5 4 T7 285 T56 1
valid_sources[0x60] 5360 1 T5 4 T7 318 T17 2
valid_sources[0x61] 5780 1 T7 290 T56 3 T69 1
valid_sources[0x62] 6011 1 T7 313 T124 1 T125 22
valid_sources[0x63] 5692 1 T5 7 T7 324 T14 2
valid_sources[0x64] 5678 1 T7 326 T21 2 T122 1
valid_sources[0x65] 5786 1 T5 1 T7 329 T21 4
valid_sources[0x66] 5592 1 T7 331 T17 2 T21 1
valid_sources[0x67] 6317 1 T7 324 T69 1 T121 2
valid_sources[0x68] 5448 1 T7 339 T21 1 T19 1
valid_sources[0x69] 5636 1 T7 307 T56 1 T14 3
valid_sources[0x6a] 6347 1 T7 319 T21 2 T119 1
valid_sources[0x6b] 5678 1 T3 2 T7 288 T17 1
valid_sources[0x6c] 5818 1 T7 305 T17 1 T14 1
valid_sources[0x6d] 7224 1 T7 347 T11 20 T14 2
valid_sources[0x6e] 6132 1 T7 300 T21 2 T14 1
valid_sources[0x6f] 5902 1 T5 2 T7 339 T21 1
valid_sources[0x70] 5922 1 T5 6 T7 313 T14 2
valid_sources[0x71] 6299 1 T7 357 T69 1 T80 2
valid_sources[0x72] 6135 1 T7 289 T17 3 T14 1
valid_sources[0x73] 6133 1 T7 324 T119 1 T34 1
valid_sources[0x74] 6374 1 T7 280 T21 3 T14 1
valid_sources[0x75] 5604 1 T7 292 T123 1 T121 2
valid_sources[0x76] 5830 1 T7 304 T69 2 T121 7
valid_sources[0x77] 5768 1 T7 299 T56 1 T69 1
valid_sources[0x78] 5813 1 T7 321 T56 2 T69 7
valid_sources[0x79] 6275 1 T7 300 T17 2 T14 2
valid_sources[0x7a] 5542 1 T7 362 T21 5 T56 3
valid_sources[0x7b] 6468 1 T7 324 T21 6 T124 1
valid_sources[0x7c] 6179 1 T7 326 T14 1 T69 4
valid_sources[0x7d] 5321 1 T7 316 T21 3 T56 3
valid_sources[0x7e] 5959 1 T7 328 T56 1 T14 2
valid_sources[0x7f] 5815 1 T7 338 T103 1 T119 1
valid_sources[0x80] 5865 1 T7 317 T21 5 T69 6



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 377536 1 T1 9 T2 3 T3 6
values[0x0] all_enables biggest_size 560618 1 T7 28749 T15 44954 T16 112214
values[0x1] all_enables biggest_size 560476 1 T7 28913 T15 45193 T16 112405


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 109327 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1119160 1 T1 12 T2 10 T3 21



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 308662 1 T1 27 T2 25 T3 40
values[0x0] 427040 1 T7 22377 T8 10 T9 3
values[0x1] 492785 1 T7 26249 T8 11 T10 6



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 49505 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1178982 1 T1 17 T2 12 T3 24



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 4830 1 T5 1 T7 264 T80 2
valid_sources[0x01] 4731 1 T7 244 T19 3 T126 2
valid_sources[0x02] 5117 1 T1 1 T7 200 T56 2
valid_sources[0x03] 5105 1 T7 246 T14 2 T80 2
valid_sources[0x04] 5165 1 T1 2 T7 239 T10 1
valid_sources[0x05] 4564 1 T7 221 T14 1 T47 1
valid_sources[0x06] 4996 1 T5 1 T7 275 T17 1
valid_sources[0x07] 4638 1 T7 323 T127 1 T128 1
valid_sources[0x08] 4919 1 T6 1 T7 250 T80 2
valid_sources[0x09] 5271 1 T5 1 T7 296 T17 1
valid_sources[0x0a] 4973 1 T7 259 T14 1 T129 1
valid_sources[0x0b] 4639 1 T7 311 T130 1 T18 1
valid_sources[0x0c] 5321 1 T1 1 T5 1 T7 269
valid_sources[0x0d] 4453 1 T7 309 T17 1 T39 5
valid_sources[0x0e] 4980 1 T7 214 T56 1 T80 1
valid_sources[0x0f] 4834 1 T7 281 T13 1 T131 1
valid_sources[0x10] 5306 1 T7 285 T80 1 T66 1
valid_sources[0x11] 4062 1 T7 217 T14 1 T47 1
valid_sources[0x12] 6255 1 T7 253 T123 7 T82 1
valid_sources[0x13] 5201 1 T1 1 T7 249 T17 1
valid_sources[0x14] 5347 1 T3 2 T7 250 T18 3
valid_sources[0x15] 4819 1 T7 239 T13 4 T82 1
valid_sources[0x16] 4576 1 T7 191 T80 1 T132 1
valid_sources[0x17] 4352 1 T5 1 T7 209 T56 1
valid_sources[0x18] 4905 1 T5 1 T7 305 T14 2
valid_sources[0x19] 4450 1 T5 1 T7 319 T81 2
valid_sources[0x1a] 5288 1 T1 1 T7 251 T18 1
valid_sources[0x1b] 5201 1 T6 1 T7 240 T19 1
valid_sources[0x1c] 4925 1 T7 314 T13 1 T14 2
valid_sources[0x1d] 4699 1 T7 237 T124 1 T19 1
valid_sources[0x1e] 5153 1 T7 231 T133 3 T134 2
valid_sources[0x1f] 5049 1 T5 1 T7 260 T47 2
valid_sources[0x20] 4831 1 T7 196 T13 1 T47 1
valid_sources[0x21] 4183 1 T7 241 T17 1 T18 1
valid_sources[0x22] 5818 1 T6 1 T7 247 T17 1
valid_sources[0x23] 4926 1 T7 279 T17 1 T13 2
valid_sources[0x24] 5033 1 T7 271 T39 5 T66 1
valid_sources[0x25] 4799 1 T7 254 T13 2 T14 1
valid_sources[0x26] 4520 1 T7 246 T14 1 T135 1
valid_sources[0x27] 5337 1 T7 259 T14 1 T47 1
valid_sources[0x28] 4326 1 T7 248 T14 1 T19 2
valid_sources[0x29] 4657 1 T6 1 T7 305 T19 1
valid_sources[0x2a] 4022 1 T7 257 T60 4 T136 6
valid_sources[0x2b] 4657 1 T7 262 T133 1 T137 1
valid_sources[0x2c] 4458 1 T5 1 T7 282 T17 2
valid_sources[0x2d] 4721 1 T7 256 T56 2 T14 1
valid_sources[0x2e] 4775 1 T5 1 T6 1 T7 181
valid_sources[0x2f] 5900 1 T5 1 T7 289 T17 1
valid_sources[0x30] 5100 1 T5 2 T7 281 T14 1
valid_sources[0x31] 4293 1 T7 224 T17 1 T82 2
valid_sources[0x32] 4654 1 T5 1 T7 257 T13 1
valid_sources[0x33] 4927 1 T5 1 T7 241 T8 1
valid_sources[0x34] 4558 1 T7 238 T13 1 T38 1
valid_sources[0x35] 5128 1 T7 257 T13 2 T47 1
valid_sources[0x36] 4818 1 T5 1 T7 217 T138 1
valid_sources[0x37] 4904 1 T1 3 T6 1 T7 228
valid_sources[0x38] 4479 1 T5 1 T7 219 T14 1
valid_sources[0x39] 4473 1 T5 1 T7 328 T80 1
valid_sources[0x3a] 5641 1 T7 259 T13 3 T137 1
valid_sources[0x3b] 5526 1 T7 284 T139 3 T15 352
valid_sources[0x3c] 4617 1 T3 8 T7 246 T38 2
valid_sources[0x3d] 4528 1 T7 247 T17 1 T124 2
valid_sources[0x3e] 4556 1 T5 2 T7 279 T17 1
valid_sources[0x3f] 4757 1 T5 1 T7 239 T13 1
valid_sources[0x40] 4944 1 T7 212 T10 1 T123 3
valid_sources[0x41] 4133 1 T7 219 T14 1 T139 1
valid_sources[0x42] 4840 1 T7 230 T124 1 T81 1
valid_sources[0x43] 4285 1 T7 289 T56 2 T13 1
valid_sources[0x44] 4466 1 T1 1 T7 225 T13 1
valid_sources[0x45] 4844 1 T5 1 T7 246 T14 2
valid_sources[0x46] 4478 1 T7 190 T13 3 T124 1
valid_sources[0x47] 4741 1 T7 282 T82 2 T137 3
valid_sources[0x48] 4867 1 T1 1 T7 265 T39 1
valid_sources[0x49] 6054 1 T5 1 T7 191 T13 2
valid_sources[0x4a] 5056 1 T7 271 T14 1 T47 1
valid_sources[0x4b] 4763 1 T7 241 T64 3 T80 1
valid_sources[0x4c] 4771 1 T7 274 T17 1 T13 2
valid_sources[0x4d] 5256 1 T7 224 T13 4 T14 1
valid_sources[0x4e] 5096 1 T1 1 T5 1 T7 230
valid_sources[0x4f] 4136 1 T5 1 T7 241 T18 2
valid_sources[0x50] 5337 1 T7 222 T10 1 T13 1
valid_sources[0x51] 5752 1 T7 256 T17 4 T38 1
valid_sources[0x52] 4345 1 T5 1 T7 269 T41 3
valid_sources[0x53] 3980 1 T2 2 T5 2 T7 243
valid_sources[0x54] 4147 1 T7 370 T17 1 T80 1
valid_sources[0x55] 4540 1 T7 273 T34 4 T138 1
valid_sources[0x56] 4226 1 T5 1 T7 254 T81 1
valid_sources[0x57] 4687 1 T7 193 T18 4 T140 1
valid_sources[0x58] 4150 1 T1 1 T7 218 T13 1
valid_sources[0x59] 5389 1 T6 1 T7 216 T19 1
valid_sources[0x5a] 5280 1 T7 227 T13 1 T40 2
valid_sources[0x5b] 4690 1 T7 224 T13 3 T80 1
valid_sources[0x5c] 5189 1 T1 2 T7 255 T123 7
valid_sources[0x5d] 4296 1 T7 223 T17 1 T13 2
valid_sources[0x5e] 4386 1 T7 271 T17 1 T14 1
valid_sources[0x5f] 4514 1 T6 2 T7 207 T64 1
valid_sources[0x60] 5309 1 T5 3 T7 220 T18 1
valid_sources[0x61] 5488 1 T6 1 T7 276 T44 1
valid_sources[0x62] 4170 1 T7 250 T56 2 T13 1
valid_sources[0x63] 4792 1 T7 272 T79 160 T19 1
valid_sources[0x64] 5230 1 T7 278 T13 1 T82 3
valid_sources[0x65] 4531 1 T7 242 T13 1 T80 1
valid_sources[0x66] 5294 1 T5 1 T6 1 T7 224
valid_sources[0x67] 4447 1 T6 2 T7 235 T13 2
valid_sources[0x68] 5216 1 T7 264 T13 2 T80 1
valid_sources[0x69] 5141 1 T3 2 T5 1 T7 279
valid_sources[0x6a] 5552 1 T7 316 T56 1 T13 2
valid_sources[0x6b] 5017 1 T7 225 T141 2 T118 3
valid_sources[0x6c] 5548 1 T5 2 T7 272 T13 1
valid_sources[0x6d] 4155 1 T5 1 T7 303 T8 1
valid_sources[0x6e] 4468 1 T5 1 T7 234 T13 1
valid_sources[0x6f] 4050 1 T5 1 T7 209 T13 2
valid_sources[0x70] 5313 1 T5 1 T7 249 T17 2
valid_sources[0x71] 5561 1 T7 217 T26 1 T47 1
valid_sources[0x72] 5213 1 T6 1 T7 200 T13 2
valid_sources[0x73] 4626 1 T5 1 T7 184 T142 1
valid_sources[0x74] 4668 1 T7 263 T17 1 T14 1
valid_sources[0x75] 4585 1 T7 270 T13 1 T19 1
valid_sources[0x76] 5344 1 T7 258 T60 2 T143 14
valid_sources[0x77] 4714 1 T7 223 T13 1 T14 1
valid_sources[0x78] 4628 1 T7 251 T40 1 T80 1
valid_sources[0x79] 3904 1 T5 1 T7 199 T56 1
valid_sources[0x7a] 4729 1 T7 276 T17 1 T18 1
valid_sources[0x7b] 4484 1 T5 1 T7 240 T82 2
valid_sources[0x7c] 4646 1 T7 274 T13 1 T14 1
valid_sources[0x7d] 5435 1 T5 1 T7 235 T17 3
valid_sources[0x7e] 4005 1 T2 23 T7 219 T142 1
valid_sources[0x7f] 4460 1 T7 253 T124 2 T60 2
valid_sources[0x80] 5357 1 T3 3 T7 214 T13 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 283570 1 T1 12 T2 10 T3 21
values[0x0] all_enables biggest_size 418184 1 T7 21977 T8 3 T10 2
values[0x1] all_enables biggest_size 417406 1 T7 22246 T8 4 T10 2

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