Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 81441 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 2102139 1 T2 5 T4 3 T6 8



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 565600 1 T2 63 T4 3 T6 77
values[0x0] 793490 1 T11 23987 T12 30904 T13 13801
values[0x1] 824490 1 T11 25022 T12 32079 T13 14294



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 42567 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 2141013 1 T2 37 T4 3 T6 50



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 8093 1 T16 1 T17 2 T11 242
valid_sources[0x01] 7864 1 T17 2 T11 266 T30 5
valid_sources[0x02] 9520 1 T8 2 T16 1 T11 260
valid_sources[0x03] 7573 1 T6 2 T11 284 T52 1
valid_sources[0x04] 8822 1 T11 235 T34 2 T116 1
valid_sources[0x05] 8334 1 T6 1 T16 1 T17 5
valid_sources[0x06] 8554 1 T15 4 T16 1 T17 2
valid_sources[0x07] 8280 1 T15 1 T11 230 T30 1
valid_sources[0x08] 8679 1 T2 32 T17 1 T11 242
valid_sources[0x09] 7142 1 T16 1 T11 269 T52 2
valid_sources[0x0a] 9659 1 T6 2 T11 236 T52 3
valid_sources[0x0b] 8195 1 T6 1 T16 1 T17 6
valid_sources[0x0c] 9158 1 T6 1 T9 26 T11 243
valid_sources[0x0d] 8049 1 T10 1 T15 1 T18 1
valid_sources[0x0e] 10026 1 T6 2 T10 1 T11 247
valid_sources[0x0f] 8424 1 T6 4 T17 2 T11 250
valid_sources[0x10] 9240 1 T17 2 T11 235 T30 3
valid_sources[0x11] 9367 1 T17 5 T11 279 T30 2
valid_sources[0x12] 7422 1 T16 1 T17 4 T18 1
valid_sources[0x13] 8380 1 T11 244 T53 2 T31 5
valid_sources[0x14] 7376 1 T6 1 T15 1 T17 3
valid_sources[0x15] 9793 1 T6 1 T11 241 T32 4
valid_sources[0x16] 7273 1 T8 1 T11 275 T53 4
valid_sources[0x17] 8196 1 T9 9 T16 1 T17 1
valid_sources[0x18] 9060 1 T6 1 T16 1 T17 3
valid_sources[0x19] 7542 1 T9 8 T15 1 T16 1
valid_sources[0x1a] 8075 1 T8 1 T15 4 T17 7
valid_sources[0x1b] 9475 1 T6 1 T16 2 T11 268
valid_sources[0x1c] 7468 1 T6 1 T8 2 T16 1
valid_sources[0x1d] 9838 1 T6 1 T8 1 T15 1
valid_sources[0x1e] 7610 1 T17 1 T11 276 T32 1
valid_sources[0x1f] 8122 1 T17 2 T11 268 T34 1
valid_sources[0x20] 9467 1 T11 280 T53 1 T30 2
valid_sources[0x21] 8223 1 T16 1 T17 2 T99 20
valid_sources[0x22] 8483 1 T11 279 T34 2 T103 3
valid_sources[0x23] 9979 1 T17 2 T11 244 T30 1
valid_sources[0x24] 7989 1 T9 7 T11 305 T30 2
valid_sources[0x25] 8527 1 T6 1 T10 3 T15 1
valid_sources[0x26] 9052 1 T10 1 T17 6 T11 254
valid_sources[0x27] 9636 1 T6 1 T10 1 T11 258
valid_sources[0x28] 8788 1 T8 1 T11 249 T30 3
valid_sources[0x29] 8725 1 T17 3 T99 17 T11 266
valid_sources[0x2a] 8839 1 T8 2 T17 1 T11 266
valid_sources[0x2b] 7800 1 T15 2 T11 254 T52 1
valid_sources[0x2c] 10646 1 T16 1 T17 4 T11 280
valid_sources[0x2d] 8643 1 T6 3 T17 2 T11 273
valid_sources[0x2e] 7476 1 T8 1 T16 1 T11 245
valid_sources[0x2f] 8247 1 T15 1 T11 269 T53 5
valid_sources[0x30] 8031 1 T8 1 T16 2 T11 235
valid_sources[0x31] 7317 1 T9 7 T16 1 T17 1
valid_sources[0x32] 9170 1 T16 1 T11 242 T52 2
valid_sources[0x33] 7941 1 T11 270 T30 4 T34 1
valid_sources[0x34] 10071 1 T11 218 T30 2 T32 3
valid_sources[0x35] 7908 1 T8 1 T11 251 T52 1
valid_sources[0x36] 8543 1 T10 1 T17 2 T11 229
valid_sources[0x37] 7306 1 T10 1 T16 1 T18 1
valid_sources[0x38] 8390 1 T16 1 T18 1 T11 259
valid_sources[0x39] 9251 1 T15 3 T18 1 T11 267
valid_sources[0x3a] 7828 1 T17 3 T11 271 T32 1
valid_sources[0x3b] 8850 1 T17 8 T11 245 T52 1
valid_sources[0x3c] 9486 1 T8 1 T9 2 T16 2
valid_sources[0x3d] 8086 1 T8 2 T10 2 T16 1
valid_sources[0x3e] 8384 1 T15 4 T17 2 T11 231
valid_sources[0x3f] 8257 1 T15 8 T16 1 T17 3
valid_sources[0x40] 7787 1 T8 1 T17 3 T11 278
valid_sources[0x41] 8092 1 T8 1 T16 1 T11 220
valid_sources[0x42] 7827 1 T11 255 T30 2 T32 1
valid_sources[0x43] 9938 1 T8 1 T11 276 T52 1
valid_sources[0x44] 8413 1 T6 1 T17 2 T18 1
valid_sources[0x45] 7235 1 T16 1 T17 2 T11 254
valid_sources[0x46] 8304 1 T8 1 T11 260 T52 1
valid_sources[0x47] 8837 1 T6 2 T17 2 T11 270
valid_sources[0x48] 7664 1 T9 1 T16 1 T11 229
valid_sources[0x49] 8531 1 T6 3 T17 3 T11 264
valid_sources[0x4a] 7500 1 T17 2 T11 235 T53 1
valid_sources[0x4b] 7718 1 T10 2 T17 2 T11 256
valid_sources[0x4c] 9434 1 T8 1 T11 225 T52 1
valid_sources[0x4d] 9247 1 T15 1 T11 257 T53 5
valid_sources[0x4e] 8112 1 T15 10 T16 1 T17 3
valid_sources[0x4f] 10201 1 T6 2 T10 1 T17 1
valid_sources[0x50] 9651 1 T11 255 T53 1 T30 4
valid_sources[0x51] 8298 1 T17 2 T11 256 T30 2
valid_sources[0x52] 7536 1 T17 1 T11 256 T53 1
valid_sources[0x53] 8088 1 T11 283 T31 1 T117 1
valid_sources[0x54] 9148 1 T16 1 T17 1 T11 200
valid_sources[0x55] 8700 1 T6 2 T10 1 T11 277
valid_sources[0x56] 9566 1 T8 1 T11 300 T52 4
valid_sources[0x57] 8562 1 T15 1 T16 2 T11 252
valid_sources[0x58] 9454 1 T6 1 T10 1 T18 1
valid_sources[0x59] 9069 1 T6 2 T16 2 T18 2
valid_sources[0x5a] 9828 1 T11 270 T12 329 T118 2
valid_sources[0x5b] 8499 1 T17 1 T11 268 T32 1
valid_sources[0x5c] 9743 1 T17 2 T11 244 T52 3
valid_sources[0x5d] 8173 1 T11 248 T53 2 T32 3
valid_sources[0x5e] 9191 1 T8 1 T17 4 T11 239
valid_sources[0x5f] 10316 1 T8 3 T11 269 T34 1
valid_sources[0x60] 7732 1 T11 278 T30 1 T32 1
valid_sources[0x61] 10218 1 T10 2 T16 1 T11 266
valid_sources[0x62] 7795 1 T4 3 T8 1 T9 7
valid_sources[0x63] 7581 1 T17 3 T11 246 T52 3
valid_sources[0x64] 8272 1 T15 2 T17 3 T11 260
valid_sources[0x65] 7384 1 T16 1 T17 1 T11 268
valid_sources[0x66] 9009 1 T8 1 T16 1 T11 272
valid_sources[0x67] 7940 1 T8 2 T17 3 T11 256
valid_sources[0x68] 7360 1 T17 8 T11 283 T31 1
valid_sources[0x69] 7946 1 T17 1 T11 262 T53 1
valid_sources[0x6a] 7335 1 T6 2 T16 1 T17 2
valid_sources[0x6b] 10245 1 T15 2 T17 2 T11 245
valid_sources[0x6c] 7300 1 T8 2 T15 1 T11 281
valid_sources[0x6d] 7984 1 T6 1 T16 1 T11 253
valid_sources[0x6e] 7352 1 T17 1 T11 264 T30 3
valid_sources[0x6f] 8299 1 T16 1 T11 237 T53 2
valid_sources[0x70] 8486 1 T11 247 T30 2 T32 1
valid_sources[0x71] 8837 1 T10 1 T15 2 T17 2
valid_sources[0x72] 9285 1 T10 1 T11 315 T52 1
valid_sources[0x73] 6944 1 T8 1 T17 4 T18 2
valid_sources[0x74] 7513 1 T8 2 T10 1 T11 271
valid_sources[0x75] 8442 1 T8 1 T10 1 T17 2
valid_sources[0x76] 7411 1 T11 281 T32 1 T103 2
valid_sources[0x77] 8101 1 T10 1 T15 1 T17 6
valid_sources[0x78] 7973 1 T2 10 T17 1 T11 255
valid_sources[0x79] 10541 1 T8 3 T10 2 T17 2
valid_sources[0x7a] 7819 1 T15 2 T16 2 T17 2
valid_sources[0x7b] 6888 1 T6 1 T18 5 T11 219
valid_sources[0x7c] 7385 1 T8 1 T16 1 T17 7
valid_sources[0x7d] 8287 1 T11 253 T34 1 T117 1
valid_sources[0x7e] 9052 1 T6 2 T17 1 T11 247
valid_sources[0x7f] 8471 1 T16 1 T17 1 T11 253
valid_sources[0x80] 8091 1 T8 2 T11 285 T53 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 527364 1 T2 5 T4 3 T6 8
values[0x0] all_enables biggest_size 786540 1 T11 23793 T12 30609 T13 13679
values[0x1] all_enables biggest_size 788235 1 T11 24006 T12 30554 T13 13657


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 156441 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1594556 1 T2 15 T3 2 T4 13



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 436505 1 T2 32 T4 22 T5 32
values[0x0] 608167 1 T1 2 T3 6 T7 7
values[0x1] 706325 1 T1 1 T3 4 T7 12



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 69226 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1681771 1 T2 19 T3 2 T4 14



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 5947 1 T11 168 T53 2 T12 19
valid_sources[0x01] 5774 1 T6 6 T11 207 T53 2
valid_sources[0x02] 7926 1 T2 3 T11 173 T53 1
valid_sources[0x03] 5676 1 T3 10 T11 173 T53 1
valid_sources[0x04] 6312 1 T17 2 T11 194 T36 1
valid_sources[0x05] 6812 1 T11 195 T12 552 T119 1
valid_sources[0x06] 6638 1 T2 2 T7 1 T17 2
valid_sources[0x07] 7515 1 T11 215 T70 2 T12 239
valid_sources[0x08] 7203 1 T6 4 T17 2 T11 201
valid_sources[0x09] 7237 1 T17 2 T11 254 T12 31
valid_sources[0x0a] 5968 1 T17 4 T11 161 T70 5
valid_sources[0x0b] 8278 1 T11 225 T19 3 T12 264
valid_sources[0x0c] 6680 1 T11 175 T12 29 T13 110
valid_sources[0x0d] 6858 1 T10 1 T17 1 T59 1
valid_sources[0x0e] 6642 1 T2 1 T11 185 T120 1
valid_sources[0x0f] 8188 1 T17 1 T11 203 T121 1
valid_sources[0x10] 7134 1 T10 1 T17 2 T11 174
valid_sources[0x11] 5875 1 T17 1 T11 218 T53 1
valid_sources[0x12] 5412 1 T11 190 T53 1 T12 71
valid_sources[0x13] 6397 1 T2 2 T16 2 T11 241
valid_sources[0x14] 5005 1 T17 1 T11 183 T70 1
valid_sources[0x15] 6251 1 T7 2 T17 1 T59 1
valid_sources[0x16] 6544 1 T11 223 T53 1 T70 1
valid_sources[0x17] 7453 1 T11 205 T53 1 T70 1
valid_sources[0x18] 6986 1 T11 219 T12 320 T13 103
valid_sources[0x19] 7014 1 T11 207 T70 1 T12 584
valid_sources[0x1a] 5751 1 T17 1 T11 203 T122 15
valid_sources[0x1b] 8322 1 T2 1 T17 2 T11 197
valid_sources[0x1c] 5522 1 T17 1 T11 164 T53 1
valid_sources[0x1d] 8811 1 T17 3 T11 213 T121 1
valid_sources[0x1e] 5938 1 T11 220 T123 1 T12 11
valid_sources[0x1f] 6280 1 T11 207 T12 208 T13 124
valid_sources[0x20] 6635 1 T11 233 T33 1 T123 1
valid_sources[0x21] 8087 1 T4 2 T11 169 T117 3
valid_sources[0x22] 5820 1 T2 1 T17 1 T11 200
valid_sources[0x23] 6837 1 T6 1 T17 3 T11 161
valid_sources[0x24] 7555 1 T10 1 T17 2 T11 175
valid_sources[0x25] 6187 1 T17 2 T11 203 T124 2
valid_sources[0x26] 8282 1 T11 158 T36 1 T123 1
valid_sources[0x27] 6884 1 T7 1 T11 166 T38 1
valid_sources[0x28] 6657 1 T17 1 T11 204 T121 1
valid_sources[0x29] 6491 1 T11 180 T53 1 T12 119
valid_sources[0x2a] 7432 1 T11 184 T37 5 T12 115
valid_sources[0x2b] 6003 1 T17 2 T11 215 T38 1
valid_sources[0x2c] 6038 1 T10 1 T11 208 T12 13
valid_sources[0x2d] 7225 1 T11 182 T12 190 T13 109
valid_sources[0x2e] 6269 1 T17 1 T11 220 T70 1
valid_sources[0x2f] 6300 1 T11 215 T12 14 T125 3
valid_sources[0x30] 6381 1 T7 1 T24 3 T11 173
valid_sources[0x31] 7094 1 T11 231 T12 156 T13 123
valid_sources[0x32] 6575 1 T17 1 T11 209 T12 410
valid_sources[0x33] 6934 1 T11 213 T70 1 T12 198
valid_sources[0x34] 6560 1 T17 1 T11 180 T121 1
valid_sources[0x35] 7786 1 T7 1 T16 1 T17 1
valid_sources[0x36] 8260 1 T17 1 T23 1 T11 190
valid_sources[0x37] 5729 1 T11 159 T126 1 T12 603
valid_sources[0x38] 8252 1 T17 2 T11 210 T70 1
valid_sources[0x39] 7273 1 T11 151 T53 2 T70 1
valid_sources[0x3a] 6500 1 T11 195 T124 1 T38 1
valid_sources[0x3b] 7251 1 T11 224 T126 1 T12 442
valid_sources[0x3c] 5737 1 T16 1 T11 209 T70 1
valid_sources[0x3d] 5805 1 T17 1 T11 212 T121 1
valid_sources[0x3e] 6770 1 T11 181 T37 1 T12 31
valid_sources[0x3f] 6763 1 T11 174 T12 242 T13 86
valid_sources[0x40] 6013 1 T17 1 T11 212 T38 1
valid_sources[0x41] 5021 1 T11 199 T31 3 T12 6
valid_sources[0x42] 7451 1 T10 2 T17 1 T11 179
valid_sources[0x43] 8089 1 T11 228 T19 1 T126 1
valid_sources[0x44] 7848 1 T7 1 T17 1 T11 200
valid_sources[0x45] 7623 1 T17 1 T24 1 T11 172
valid_sources[0x46] 7078 1 T10 1 T17 2 T11 187
valid_sources[0x47] 6240 1 T17 1 T11 225 T44 1
valid_sources[0x48] 6697 1 T17 1 T11 158 T12 317
valid_sources[0x49] 7445 1 T16 1 T17 1 T11 175
valid_sources[0x4a] 6604 1 T5 13 T11 201 T21 1
valid_sources[0x4b] 7220 1 T10 2 T11 175 T121 1
valid_sources[0x4c] 7710 1 T6 1 T11 146 T53 2
valid_sources[0x4d] 7399 1 T11 222 T121 1 T12 13
valid_sources[0x4e] 6439 1 T17 1 T11 219 T31 2
valid_sources[0x4f] 6513 1 T17 1 T11 220 T117 2
valid_sources[0x50] 6493 1 T2 5 T17 3 T11 160
valid_sources[0x51] 7110 1 T17 1 T11 177 T70 3
valid_sources[0x52] 6512 1 T7 1 T16 1 T17 1
valid_sources[0x53] 6954 1 T11 215 T36 2 T12 133
valid_sources[0x54] 7086 1 T17 1 T11 183 T12 208
valid_sources[0x55] 6857 1 T11 220 T53 1 T35 2
valid_sources[0x56] 7457 1 T11 184 T53 1 T124 2
valid_sources[0x57] 6903 1 T17 1 T11 226 T53 1
valid_sources[0x58] 6273 1 T5 7 T10 1 T11 269
valid_sources[0x59] 6259 1 T16 1 T11 149 T53 3
valid_sources[0x5a] 6070 1 T11 239 T53 1 T31 2
valid_sources[0x5b] 5513 1 T4 9 T11 197 T126 1
valid_sources[0x5c] 6281 1 T17 2 T11 227 T53 1
valid_sources[0x5d] 5499 1 T11 201 T38 1 T12 180
valid_sources[0x5e] 5694 1 T17 1 T11 237 T12 409
valid_sources[0x5f] 5684 1 T11 183 T12 122 T13 136
valid_sources[0x60] 7373 1 T11 208 T117 1 T126 2
valid_sources[0x61] 6204 1 T2 3 T17 2 T11 150
valid_sources[0x62] 7280 1 T6 4 T11 206 T121 1
valid_sources[0x63] 6940 1 T17 1 T11 233 T53 1
valid_sources[0x64] 6992 1 T17 2 T11 198 T12 211
valid_sources[0x65] 6881 1 T7 1 T17 1 T11 189
valid_sources[0x66] 5993 1 T17 1 T11 181 T53 1
valid_sources[0x67] 6999 1 T17 1 T11 167 T31 2
valid_sources[0x68] 5619 1 T2 1 T4 5 T11 220
valid_sources[0x69] 6625 1 T17 1 T11 222 T70 2
valid_sources[0x6a] 6631 1 T17 1 T11 198 T19 1
valid_sources[0x6b] 6115 1 T1 3 T10 1 T11 223
valid_sources[0x6c] 5815 1 T4 2 T17 1 T11 187
valid_sources[0x6d] 6994 1 T17 1 T11 209 T36 1
valid_sources[0x6e] 6412 1 T11 191 T53 1 T21 1
valid_sources[0x6f] 6188 1 T16 1 T11 220 T53 1
valid_sources[0x70] 7613 1 T7 1 T17 2 T11 167
valid_sources[0x71] 7385 1 T17 1 T11 227 T12 65
valid_sources[0x72] 8013 1 T10 2 T16 3 T17 1
valid_sources[0x73] 5747 1 T10 4 T17 1 T11 156
valid_sources[0x74] 7053 1 T17 1 T11 163 T117 5
valid_sources[0x75] 6683 1 T2 2 T17 3 T11 181
valid_sources[0x76] 6193 1 T11 219 T37 1 T12 701
valid_sources[0x77] 5979 1 T11 194 T31 1 T123 1
valid_sources[0x78] 7624 1 T7 1 T17 1 T24 3
valid_sources[0x79] 6575 1 T11 237 T53 1 T117 2
valid_sources[0x7a] 6632 1 T17 1 T11 224 T12 459
valid_sources[0x7b] 7141 1 T11 187 T53 1 T31 1
valid_sources[0x7c] 6167 1 T11 201 T123 1 T38 1
valid_sources[0x7d] 7388 1 T17 1 T11 243 T53 1
valid_sources[0x7e] 6744 1 T17 1 T11 206 T53 2
valid_sources[0x7f] 7321 1 T17 1 T11 216 T117 1
valid_sources[0x80] 7349 1 T17 1 T11 204 T127 4



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 403051 1 T2 15 T4 13 T5 11
values[0x0] all_enables biggest_size 595533 1 T3 1 T7 2 T24 2
values[0x1] all_enables biggest_size 595972 1 T3 1 T7 4 T11 17204

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