Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	90549	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2365907

1

T3

24

T4

6

T7

48951

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	637807	1			T3	202		T4	6		T7	13095
values[0x0]	893130	1			T7	18424		T12	4738		T14	18635
values[0x1]	925519	1			T7	19197		T12	4871		T14	19218

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47249	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

2409207

1

T3

119

T4

6

T7

49740

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	8840	1			T7	112		T18	3		T12	37
valid_sources[0x01]	10268	1			T7	306		T12	58		T14	237
valid_sources[0x02]	8528	1			T12	66		T14	192		T107	8
valid_sources[0x03]	9297	1			T7	145		T12	48		T14	213
valid_sources[0x04]	9241	1			T7	224		T18	6		T12	65
valid_sources[0x05]	8463	1			T3	1		T7	126		T12	49
valid_sources[0x06]	9203	1			T10	1		T12	47		T14	210
valid_sources[0x07]	9038	1			T7	3		T10	1		T12	46
valid_sources[0x08]	9279	1			T7	92		T12	48		T14	168
valid_sources[0x09]	9736	1			T7	253		T12	60		T14	175
valid_sources[0x0a]	9610	1			T7	215		T10	1		T12	54
valid_sources[0x0b]	9306	1			T3	1		T7	8		T10	1
valid_sources[0x0c]	9562	1			T3	1		T7	110		T10	2
valid_sources[0x0d]	10747	1			T3	3		T7	1091		T12	54
valid_sources[0x0e]	9052	1			T18	2		T12	48		T14	181
valid_sources[0x0f]	8622	1			T18	3		T12	61		T14	198
valid_sources[0x10]	9544	1			T7	424		T10	1		T12	70
valid_sources[0x11]	8913	1			T7	104		T10	1		T12	72
valid_sources[0x12]	8916	1			T7	11		T10	2		T12	65
valid_sources[0x13]	9373	1			T7	148		T10	1		T12	61
valid_sources[0x14]	10153	1			T18	1		T12	49		T14	196
valid_sources[0x15]	9093	1			T7	340		T12	55		T14	186
valid_sources[0x16]	9001	1			T7	398		T13	19		T12	46
valid_sources[0x17]	11237	1			T7	345		T10	1		T12	64
valid_sources[0x18]	8977	1			T7	231		T12	43		T14	186
valid_sources[0x19]	9680	1			T7	325		T10	1		T12	43
valid_sources[0x1a]	9724	1			T10	3		T12	40		T14	196
valid_sources[0x1b]	9523	1			T7	222		T12	58		T14	190
valid_sources[0x1c]	9361	1			T12	56		T14	232		T57	1
valid_sources[0x1d]	8859	1			T3	1		T7	3		T10	1
valid_sources[0x1e]	9612	1			T7	897		T10	4		T12	51
valid_sources[0x1f]	10169	1			T7	1387		T10	2		T12	58
valid_sources[0x20]	10039	1			T7	193		T12	68		T14	157
valid_sources[0x21]	8907	1			T7	142		T9	2		T12	53
valid_sources[0x22]	9505	1			T7	412		T9	1		T12	76
valid_sources[0x23]	8510	1			T10	3		T12	45		T14	188
valid_sources[0x24]	9341	1			T7	5		T18	1		T12	54
valid_sources[0x25]	9550	1			T7	30		T10	1		T18	2
valid_sources[0x26]	9724	1			T10	2		T12	56		T14	206
valid_sources[0x27]	10672	1			T3	5		T9	3		T18	1
valid_sources[0x28]	8791	1			T7	196		T18	3		T12	61
valid_sources[0x29]	9914	1			T7	543		T12	59		T14	157
valid_sources[0x2a]	9200	1			T8	2		T10	1		T12	52
valid_sources[0x2b]	8435	1			T3	1		T7	127		T10	1
valid_sources[0x2c]	11236	1			T10	1		T12	44		T14	213
valid_sources[0x2d]	9189	1			T7	140		T9	1		T12	44
valid_sources[0x2e]	8853	1			T7	1		T9	1		T10	1
valid_sources[0x2f]	9987	1			T3	2		T7	357		T18	1
valid_sources[0x30]	9843	1			T3	1		T7	519		T9	2
valid_sources[0x31]	8831	1			T7	437		T10	1		T12	34
valid_sources[0x32]	8644	1			T7	370		T18	6		T12	49
valid_sources[0x33]	9479	1			T3	5		T12	49		T14	199
valid_sources[0x34]	11097	1			T7	316		T9	1		T18	2
valid_sources[0x35]	11516	1			T7	411		T10	1		T13	1
valid_sources[0x36]	10128	1			T7	708		T10	1		T12	69
valid_sources[0x37]	9039	1			T3	7		T7	66		T12	49
valid_sources[0x38]	9220	1			T18	1		T12	52		T14	192
valid_sources[0x39]	9594	1			T7	842		T9	2		T18	2
valid_sources[0x3a]	8637	1			T3	2		T10	2		T18	2
valid_sources[0x3b]	9202	1			T7	252		T12	52		T14	213
valid_sources[0x3c]	8801	1			T3	6		T7	308		T18	2
valid_sources[0x3d]	11146	1			T3	2		T7	294		T12	50
valid_sources[0x3e]	9316	1			T10	1		T18	2		T12	48
valid_sources[0x3f]	9156	1			T7	123		T18	5		T12	48
valid_sources[0x40]	9070	1			T3	1		T7	245		T12	51
valid_sources[0x41]	10375	1			T10	2		T12	46		T14	205
valid_sources[0x42]	10936	1			T7	447		T12	50		T43	1
valid_sources[0x43]	11492	1			T10	2		T12	40		T14	212
valid_sources[0x44]	10659	1			T7	315		T9	2		T12	62
valid_sources[0x45]	9684	1			T7	15		T10	1		T12	42
valid_sources[0x46]	8642	1			T7	13		T12	42		T14	196
valid_sources[0x47]	9669	1			T7	4		T9	1		T10	1
valid_sources[0x48]	12094	1			T3	2		T7	231		T9	2
valid_sources[0x49]	8884	1			T10	1		T18	1		T12	50
valid_sources[0x4a]	8793	1			T7	2		T18	1		T13	3
valid_sources[0x4b]	8713	1			T7	291		T12	66		T14	213
valid_sources[0x4c]	9617	1			T10	3		T12	51		T14	201
valid_sources[0x4d]	8293	1			T7	1		T18	1		T12	69
valid_sources[0x4e]	9083	1			T10	1		T12	46		T14	193
valid_sources[0x4f]	10725	1			T7	360		T18	1		T12	37
valid_sources[0x50]	10448	1			T7	436		T10	1		T12	33
valid_sources[0x51]	8844	1			T7	2		T12	55		T14	219
valid_sources[0x52]	10644	1			T3	5		T7	4		T12	42
valid_sources[0x53]	9619	1			T10	1		T12	59		T43	1
valid_sources[0x54]	8845	1			T10	1		T12	42		T14	220
valid_sources[0x55]	9604	1			T7	265		T10	1		T18	5
valid_sources[0x56]	9859	1			T7	156		T18	5		T13	4
valid_sources[0x57]	9672	1			T3	4		T7	82		T12	47
valid_sources[0x58]	10948	1			T12	48		T14	179		T44	242
valid_sources[0x59]	8815	1			T18	3		T12	42		T14	227
valid_sources[0x5a]	10366	1			T3	1		T7	220		T10	1
valid_sources[0x5b]	10159	1			T7	251		T9	3		T12	78
valid_sources[0x5c]	10711	1			T7	671		T10	1		T12	69
valid_sources[0x5d]	10390	1			T7	323		T12	53		T14	196
valid_sources[0x5e]	10167	1			T3	1		T7	323		T9	1
valid_sources[0x5f]	10223	1			T7	180		T12	53		T14	177
valid_sources[0x60]	9686	1			T7	1242		T12	44		T14	185
valid_sources[0x61]	9027	1			T3	3		T7	476		T10	1
valid_sources[0x62]	11040	1			T3	1		T7	63		T12	57
valid_sources[0x63]	9470	1			T7	235		T10	2		T18	1
valid_sources[0x64]	9012	1			T10	1		T18	4		T12	57
valid_sources[0x65]	9747	1			T9	2		T10	1		T18	5
valid_sources[0x66]	9635	1			T3	2		T7	578		T10	3
valid_sources[0x67]	9715	1			T12	40		T14	215		T44	1017
valid_sources[0x68]	10144	1			T12	37		T19	6		T14	211
valid_sources[0x69]	8470	1			T7	356		T18	1		T12	46
valid_sources[0x6a]	9415	1			T9	2		T10	1		T12	59
valid_sources[0x6b]	10461	1			T7	155		T12	37		T14	199
valid_sources[0x6c]	9535	1			T7	142		T12	57		T14	186
valid_sources[0x6d]	9971	1			T10	2		T12	41		T14	187
valid_sources[0x6e]	10064	1			T7	668		T10	1		T18	7
valid_sources[0x6f]	9335	1			T7	154		T9	1		T12	55
valid_sources[0x70]	9674	1			T7	144		T9	2		T12	40
valid_sources[0x71]	8774	1			T3	1		T7	248		T10	1
valid_sources[0x72]	10429	1			T7	842		T13	22		T12	56
valid_sources[0x73]	9221	1			T7	135		T18	4		T12	43
valid_sources[0x74]	9799	1			T7	607		T12	52		T14	192
valid_sources[0x75]	9360	1			T7	211		T18	3		T12	54
valid_sources[0x76]	8498	1			T7	10		T12	45		T14	221
valid_sources[0x77]	8776	1			T7	289		T18	1		T12	59
valid_sources[0x78]	8950	1			T3	2		T7	72		T9	1
valid_sources[0x79]	9457	1			T3	1		T7	71		T12	61
valid_sources[0x7a]	9266	1			T3	3		T7	95		T10	1
valid_sources[0x7b]	11315	1			T7	467		T12	56		T14	215
valid_sources[0x7c]	9509	1			T7	23		T13	11		T12	54
valid_sources[0x7d]	9951	1			T3	11		T7	316		T12	63
valid_sources[0x7e]	10217	1			T7	222		T9	1		T10	1
valid_sources[0x7f]	8841	1			T12	52		T14	173		T44	151
valid_sources[0x80]	9293	1			T12	62		T14	172		T44	43

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

595103

1

T3

24

T4

6

T7

12416

values[0x0]

all_enables

biggest_size

885362

1

T7

18233

T12

4693

T14

18472

values[0x1]

all_enables

biggest_size

885442

1

T7

18302

T12

4706

T14

18347

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	173260	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1799520

1

T1

1

T2

1

T4

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	491834	1			T4	27		T7	10460		T8	21
values[0x0]	685813	1			T1	10		T2	4		T5	4
values[0x1]	795133	1			T1	7		T2	5		T5	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	76950	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1895830

1

T1

3

T2

1

T4

17

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	7357	1			T7	136		T10	1		T12	42
valid_sources[0x01]	7284	1			T7	167		T8	4		T9	1
valid_sources[0x02]	7147	1			T7	194		T12	32		T14	153
valid_sources[0x03]	7803	1			T7	116		T12	46		T14	61
valid_sources[0x04]	8897	1			T4	1		T7	113		T12	49
valid_sources[0x05]	8651	1			T7	141		T12	45		T14	33
valid_sources[0x06]	7841	1			T7	142		T12	29		T14	252
valid_sources[0x07]	7735	1			T7	169		T10	1		T12	31
valid_sources[0x08]	7628	1			T7	144		T12	41		T14	61
valid_sources[0x09]	8114	1			T7	164		T12	46		T14	59
valid_sources[0x0a]	7408	1			T7	128		T12	30		T14	153
valid_sources[0x0b]	6822	1			T7	137		T12	39		T14	2
valid_sources[0x0c]	7574	1			T7	152		T12	29		T43	1
valid_sources[0x0d]	7611	1			T7	192		T12	45		T43	1
valid_sources[0x0e]	7337	1			T7	140		T12	39		T14	258
valid_sources[0x0f]	6545	1			T7	191		T10	2		T12	43
valid_sources[0x10]	7147	1			T7	149		T12	42		T55	1
valid_sources[0x11]	7377	1			T7	174		T12	43		T14	40
valid_sources[0x12]	7299	1			T7	184		T8	2		T10	2
valid_sources[0x13]	7276	1			T7	155		T12	45		T54	1
valid_sources[0x14]	7592	1			T7	167		T12	42		T14	257
valid_sources[0x15]	8373	1			T7	159		T12	51		T14	127
valid_sources[0x16]	7939	1			T6	1		T7	210		T12	36
valid_sources[0x17]	7781	1			T7	171		T10	2		T12	35
valid_sources[0x18]	7789	1			T7	164		T12	34		T14	409
valid_sources[0x19]	8257	1			T7	161		T12	40		T19	2
valid_sources[0x1a]	6923	1			T7	146		T12	38		T14	7
valid_sources[0x1b]	8506	1			T7	176		T12	35		T25	1
valid_sources[0x1c]	8952	1			T7	119		T12	35		T14	263
valid_sources[0x1d]	7393	1			T7	173		T8	1		T12	34
valid_sources[0x1e]	8491	1			T7	178		T28	1		T12	42
valid_sources[0x1f]	7705	1			T7	162		T12	37		T14	175
valid_sources[0x20]	8261	1			T7	149		T12	32		T14	446
valid_sources[0x21]	7630	1			T1	17		T7	162		T12	41
valid_sources[0x22]	7628	1			T7	158		T12	37		T14	279
valid_sources[0x23]	7404	1			T7	184		T12	43		T14	260
valid_sources[0x24]	8131	1			T7	145		T12	34		T14	117
valid_sources[0x25]	6853	1			T7	164		T12	35		T14	143
valid_sources[0x26]	7011	1			T4	3		T7	173		T12	43
valid_sources[0x27]	7088	1			T7	140		T12	31		T14	15
valid_sources[0x28]	7955	1			T7	227		T10	2		T12	43
valid_sources[0x29]	8479	1			T7	142		T12	44		T14	9
valid_sources[0x2a]	7750	1			T7	159		T12	41		T14	141
valid_sources[0x2b]	7774	1			T7	171		T12	39		T14	7
valid_sources[0x2c]	7504	1			T7	175		T12	29		T14	146
valid_sources[0x2d]	6770	1			T7	192		T12	41		T43	1
valid_sources[0x2e]	8039	1			T7	146		T12	34		T14	216
valid_sources[0x2f]	8414	1			T7	140		T12	38		T130	1
valid_sources[0x30]	7969	1			T7	167		T12	38		T14	9
valid_sources[0x31]	7380	1			T7	145		T12	34		T14	116
valid_sources[0x32]	7906	1			T7	164		T9	1		T12	36
valid_sources[0x33]	7129	1			T7	161		T12	50		T14	25
valid_sources[0x34]	7270	1			T7	153		T12	29		T14	109
valid_sources[0x35]	7005	1			T7	124		T12	32		T14	234
valid_sources[0x36]	6799	1			T7	217		T12	38		T14	55
valid_sources[0x37]	7023	1			T7	148		T28	1		T12	36
valid_sources[0x38]	7747	1			T7	141		T12	43		T14	160
valid_sources[0x39]	7658	1			T7	145		T10	2		T12	35
valid_sources[0x3a]	7700	1			T7	148		T12	40		T14	275
valid_sources[0x3b]	8030	1			T7	178		T12	35		T14	228
valid_sources[0x3c]	7858	1			T7	146		T12	42		T14	106
valid_sources[0x3d]	7308	1			T7	137		T12	37		T14	146
valid_sources[0x3e]	8451	1			T7	151		T12	51		T14	207
valid_sources[0x3f]	6621	1			T4	1		T7	129		T12	33
valid_sources[0x40]	7369	1			T7	188		T28	1		T12	44
valid_sources[0x41]	7439	1			T4	1		T7	150		T12	33
valid_sources[0x42]	8105	1			T7	161		T10	1		T12	34
valid_sources[0x43]	7234	1			T7	150		T8	2		T12	36
valid_sources[0x44]	7211	1			T7	148		T10	1		T12	35
valid_sources[0x45]	7515	1			T7	197		T9	2		T12	42
valid_sources[0x46]	7963	1			T7	180		T10	1		T12	39
valid_sources[0x47]	7329	1			T7	211		T12	37		T14	11
valid_sources[0x48]	7684	1			T7	171		T12	36		T14	182
valid_sources[0x49]	8113	1			T7	157		T12	40		T14	429
valid_sources[0x4a]	8134	1			T7	157		T12	39		T14	334
valid_sources[0x4b]	7476	1			T7	141		T28	2		T12	42
valid_sources[0x4c]	7621	1			T7	139		T12	34		T14	147
valid_sources[0x4d]	7926	1			T7	157		T10	1		T12	50
valid_sources[0x4e]	7636	1			T2	4		T7	192		T12	32
valid_sources[0x4f]	7810	1			T7	172		T12	35		T14	253
valid_sources[0x50]	8465	1			T7	151		T12	37		T43	1
valid_sources[0x51]	8683	1			T7	145		T12	44		T43	1
valid_sources[0x52]	7902	1			T6	1		T7	169		T12	44
valid_sources[0x53]	7669	1			T7	178		T10	4		T12	49
valid_sources[0x54]	7950	1			T7	155		T9	1		T10	1
valid_sources[0x55]	7939	1			T7	223		T12	48		T14	191
valid_sources[0x56]	7338	1			T7	134		T12	36		T14	110
valid_sources[0x57]	7110	1			T7	130		T12	31		T14	2
valid_sources[0x58]	7389	1			T7	147		T12	36		T14	397
valid_sources[0x59]	8833	1			T7	195		T12	39		T14	427
valid_sources[0x5a]	7848	1			T7	161		T9	1		T12	37
valid_sources[0x5b]	7466	1			T7	175		T9	1		T12	34
valid_sources[0x5c]	7449	1			T7	177		T12	38		T14	212
valid_sources[0x5d]	7127	1			T7	178		T12	40		T14	244
valid_sources[0x5e]	7214	1			T7	188		T8	1		T12	34
valid_sources[0x5f]	7560	1			T7	201		T12	45		T14	8
valid_sources[0x60]	7933	1			T7	152		T12	33		T14	82
valid_sources[0x61]	8506	1			T7	163		T10	3		T12	40
valid_sources[0x62]	6362	1			T7	173		T12	37		T14	8
valid_sources[0x63]	7561	1			T7	152		T10	1		T12	48
valid_sources[0x64]	7664	1			T7	153		T12	45		T14	110
valid_sources[0x65]	6594	1			T7	176		T12	38		T14	4
valid_sources[0x66]	7157	1			T7	160		T9	1		T12	41
valid_sources[0x67]	7216	1			T7	156		T10	1		T12	40
valid_sources[0x68]	7500	1			T7	152		T12	27		T14	38
valid_sources[0x69]	8195	1			T7	150		T12	33		T14	194
valid_sources[0x6a]	8035	1			T7	148		T10	1		T12	29
valid_sources[0x6b]	6747	1			T7	159		T12	29		T14	223
valid_sources[0x6c]	9187	1			T7	187		T12	34		T14	216
valid_sources[0x6d]	6645	1			T7	156		T12	41		T14	35
valid_sources[0x6e]	7380	1			T7	148		T8	1		T9	1
valid_sources[0x6f]	8501	1			T7	151		T12	47		T14	155
valid_sources[0x70]	7962	1			T7	155		T10	1		T12	40
valid_sources[0x71]	7249	1			T7	155		T9	1		T12	37
valid_sources[0x72]	7473	1			T7	151		T12	27		T14	326
valid_sources[0x73]	7807	1			T7	143		T12	37		T14	149
valid_sources[0x74]	7828	1			T7	174		T12	52		T14	163
valid_sources[0x75]	7689	1			T7	171		T12	34		T14	310
valid_sources[0x76]	8221	1			T4	3		T7	149		T12	30
valid_sources[0x77]	7200	1			T7	167		T12	33		T14	493
valid_sources[0x78]	7614	1			T7	146		T12	39		T14	111
valid_sources[0x79]	8140	1			T7	149		T12	30		T14	148
valid_sources[0x7a]	7935	1			T7	177		T9	1		T12	32
valid_sources[0x7b]	8059	1			T7	141		T9	1		T12	49
valid_sources[0x7c]	7721	1			T7	144		T9	2		T12	43
valid_sources[0x7d]	7701	1			T4	1		T7	198		T28	1
valid_sources[0x7e]	7761	1			T4	2		T7	158		T8	2
valid_sources[0x7f]	8386	1			T2	2		T7	171		T12	42
valid_sources[0x80]	8131	1			T7	142		T12	48		T14	27

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

454608

1

T4

15

T7

9708

T8

11

values[0x0]

all_enables

biggest_size

672085

1

T1

1

T2

1

T5

2

values[0x1]

all_enables

biggest_size

672827

1

T5

1

T7

14002

T12

3282