Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	119998	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

3586470

1

T2

10

T3

4

T6

6

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	946395	1			T2	97		T3	57		T6	6
values[0x0]	1354177	1			T13	23959		T14	106399		T15	38449
values[0x1]	1405896	1			T13	25066		T14	110390		T15	40081

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64093	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

3642375

1

T2

55

T3

32

T6

6

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	14417	1			T13	261		T14	1108		T33	80
valid_sources[0x01]	14144	1			T2	1		T3	1		T13	267
valid_sources[0x02]	16223	1			T13	254		T14	1175		T60	12
valid_sources[0x03]	15499	1			T20	2		T13	267		T14	1199
valid_sources[0x04]	13774	1			T8	4		T13	265		T14	1190
valid_sources[0x05]	16670	1			T2	1		T11	1		T13	243
valid_sources[0x06]	13648	1			T2	1		T13	259		T14	1309
valid_sources[0x07]	14111	1			T8	12		T13	230		T14	1192
valid_sources[0x08]	13241	1			T11	3		T13	270		T14	1118
valid_sources[0x09]	14957	1			T2	2		T8	6		T11	1
valid_sources[0x0a]	15381	1			T8	6		T11	1		T13	263
valid_sources[0x0b]	14463	1			T2	1		T3	1		T11	1
valid_sources[0x0c]	15294	1			T11	1		T20	1		T13	248
valid_sources[0x0d]	13602	1			T8	2		T13	251		T14	1211
valid_sources[0x0e]	13822	1			T8	1		T12	1		T20	2
valid_sources[0x0f]	12843	1			T8	6		T11	1		T12	1
valid_sources[0x10]	16155	1			T2	1		T3	2		T11	1
valid_sources[0x11]	14087	1			T11	1		T12	3		T20	1
valid_sources[0x12]	13066	1			T11	2		T13	250		T14	1117
valid_sources[0x13]	12438	1			T13	240		T14	1115		T103	1
valid_sources[0x14]	14101	1			T13	242		T14	1157		T31	1
valid_sources[0x15]	14900	1			T11	1		T12	2		T13	237
valid_sources[0x16]	15755	1			T3	1		T11	1		T13	255
valid_sources[0x17]	13477	1			T19	72		T13	248		T14	1109
valid_sources[0x18]	14634	1			T2	1		T20	1		T13	292
valid_sources[0x19]	15549	1			T2	1		T3	2		T11	1
valid_sources[0x1a]	12753	1			T11	1		T13	248		T14	1047
valid_sources[0x1b]	16877	1			T11	1		T20	1		T13	228
valid_sources[0x1c]	12384	1			T2	1		T12	1		T13	260
valid_sources[0x1d]	13771	1			T13	256		T14	1049		T55	36
valid_sources[0x1e]	14149	1			T11	2		T13	249		T14	1234
valid_sources[0x1f]	14859	1			T11	2		T12	1		T20	1
valid_sources[0x20]	16321	1			T3	3		T13	257		T14	1228
valid_sources[0x21]	16764	1			T3	2		T11	1		T20	1
valid_sources[0x22]	15032	1			T2	1		T9	18		T20	1
valid_sources[0x23]	18782	1			T2	1		T8	6		T11	2
valid_sources[0x24]	12843	1			T13	254		T14	1226		T31	1
valid_sources[0x25]	16527	1			T2	1		T20	3		T13	271
valid_sources[0x26]	13023	1			T2	1		T12	1		T20	6
valid_sources[0x27]	14245	1			T3	2		T8	1		T11	1
valid_sources[0x28]	14020	1			T8	3		T13	242		T14	1159
valid_sources[0x29]	13886	1			T11	1		T18	22		T13	240
valid_sources[0x2a]	13634	1			T13	256		T14	1051		T15	394
valid_sources[0x2b]	14473	1			T2	1		T8	24		T11	2
valid_sources[0x2c]	16638	1			T11	2		T12	1		T20	1
valid_sources[0x2d]	15216	1			T2	1		T11	2		T13	263
valid_sources[0x2e]	15513	1			T6	1		T12	1		T13	242
valid_sources[0x2f]	17732	1			T2	1		T11	1		T12	1
valid_sources[0x30]	13944	1			T13	289		T14	1194		T15	412
valid_sources[0x31]	14288	1			T2	1		T19	18		T20	1
valid_sources[0x32]	15742	1			T3	1		T12	1		T20	2
valid_sources[0x33]	13176	1			T8	2		T11	1		T12	1
valid_sources[0x34]	14216	1			T11	3		T12	2		T13	278
valid_sources[0x35]	14690	1			T3	1		T11	1		T13	244
valid_sources[0x36]	14008	1			T20	1		T13	241		T14	1299
valid_sources[0x37]	12571	1			T2	2		T13	260		T14	1044
valid_sources[0x38]	15602	1			T13	283		T14	1112		T30	2
valid_sources[0x39]	18033	1			T11	1		T13	245		T14	994
valid_sources[0x3a]	16416	1			T13	243		T14	1091		T15	419
valid_sources[0x3b]	13427	1			T8	6		T12	2		T20	1
valid_sources[0x3c]	13240	1			T13	263		T14	1202		T59	2
valid_sources[0x3d]	14377	1			T12	1		T13	248		T14	1208
valid_sources[0x3e]	13620	1			T3	1		T11	3		T12	1
valid_sources[0x3f]	15138	1			T12	2		T13	242		T14	1019
valid_sources[0x40]	17387	1			T2	1		T3	1		T13	279
valid_sources[0x41]	13410	1			T13	275		T14	1159		T31	1
valid_sources[0x42]	14437	1			T12	2		T13	277		T14	1293
valid_sources[0x43]	13386	1			T3	1		T13	239		T14	1044
valid_sources[0x44]	13495	1			T3	2		T13	259		T14	955
valid_sources[0x45]	13079	1			T3	2		T9	19		T18	49
valid_sources[0x46]	13509	1			T2	1		T3	1		T8	1
valid_sources[0x47]	14858	1			T2	1		T12	1		T13	257
valid_sources[0x48]	15180	1			T20	2		T13	266		T14	1218
valid_sources[0x49]	14179	1			T3	1		T11	2		T13	270
valid_sources[0x4a]	13728	1			T11	1		T20	7		T13	242
valid_sources[0x4b]	14405	1			T20	3		T13	244		T14	1089
valid_sources[0x4c]	13882	1			T2	1		T3	1		T19	20
valid_sources[0x4d]	14580	1			T2	1		T8	5		T11	2
valid_sources[0x4e]	14919	1			T2	1		T11	1		T13	234
valid_sources[0x4f]	13437	1			T11	3		T12	1		T13	235
valid_sources[0x50]	13720	1			T3	1		T13	240		T14	1070
valid_sources[0x51]	13411	1			T12	1		T13	247		T14	1177
valid_sources[0x52]	14115	1			T8	5		T19	54		T13	271
valid_sources[0x53]	14157	1			T11	2		T13	264		T14	1206
valid_sources[0x54]	14792	1			T2	1		T8	1		T11	1
valid_sources[0x55]	13771	1			T2	1		T8	6		T18	27
valid_sources[0x56]	13498	1			T2	2		T11	1		T12	2
valid_sources[0x57]	16457	1			T2	2		T13	265		T14	1037
valid_sources[0x58]	15262	1			T2	1		T3	2		T12	3
valid_sources[0x59]	14821	1			T11	1		T13	250		T14	1058
valid_sources[0x5a]	13823	1			T8	1		T11	3		T13	257
valid_sources[0x5b]	13198	1			T2	1		T11	1		T18	13
valid_sources[0x5c]	13934	1			T11	2		T12	2		T13	248
valid_sources[0x5d]	12874	1			T6	1		T11	1		T20	1
valid_sources[0x5e]	14842	1			T12	2		T13	258		T14	1011
valid_sources[0x5f]	13928	1			T13	218		T14	1177		T120	4
valid_sources[0x60]	14301	1			T8	4		T20	1		T13	233
valid_sources[0x61]	13337	1			T2	1		T12	1		T13	244
valid_sources[0x62]	13604	1			T20	4		T13	246		T14	1137
valid_sources[0x63]	12984	1			T12	1		T20	2		T13	238
valid_sources[0x64]	12685	1			T13	269		T14	1189		T59	1
valid_sources[0x65]	14918	1			T2	1		T12	2		T13	247
valid_sources[0x66]	14423	1			T2	1		T11	1		T12	1
valid_sources[0x67]	14678	1			T12	2		T13	249		T14	1101
valid_sources[0x68]	15167	1			T13	250		T17	2		T14	1094
valid_sources[0x69]	15888	1			T2	1		T11	1		T13	262
valid_sources[0x6a]	14450	1			T20	4		T13	258		T14	1125
valid_sources[0x6b]	14873	1			T11	1		T12	1		T13	249
valid_sources[0x6c]	13725	1			T19	13		T12	1		T13	236
valid_sources[0x6d]	14198	1			T3	1		T12	1		T13	225
valid_sources[0x6e]	14727	1			T2	1		T12	1		T13	278
valid_sources[0x6f]	13758	1			T2	1		T12	2		T13	258
valid_sources[0x70]	15470	1			T2	1		T3	2		T20	2
valid_sources[0x71]	13948	1			T2	2		T8	1		T11	1
valid_sources[0x72]	15303	1			T3	1		T13	246		T14	1094
valid_sources[0x73]	15401	1			T8	10		T11	1		T13	233
valid_sources[0x74]	14227	1			T3	3		T12	2		T13	249
valid_sources[0x75]	14301	1			T20	1		T13	266		T17	8
valid_sources[0x76]	13445	1			T2	1		T13	270		T14	1325
valid_sources[0x77]	13373	1			T8	1		T13	248		T14	1043
valid_sources[0x78]	14652	1			T13	272		T17	11		T14	1116
valid_sources[0x79]	14519	1			T13	263		T17	2		T14	1271
valid_sources[0x7a]	14598	1			T8	3		T12	1		T13	263
valid_sources[0x7b]	14008	1			T11	6		T12	4		T20	4
valid_sources[0x7c]	15108	1			T8	1		T11	2		T12	2
valid_sources[0x7d]	15556	1			T13	241		T14	1048		T59	1
valid_sources[0x7e]	15423	1			T11	1		T13	260		T14	1194
valid_sources[0x7f]	14911	1			T2	1		T11	1		T20	1
valid_sources[0x80]	18331	1			T2	1		T3	2		T11	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

899696

1

T2

10

T3

4

T6

6

values[0x0]

all_enables

biggest_size

1342283

1

T13

23750

T14

105473

T15

38117

values[0x1]

all_enables

biggest_size

1344491

1

T13

24024

T14

105340

T15

38344

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	263678	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

2713003

1

T2

16

T3

17

T4

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	735256	1			T2	32		T3	32		T4	1
values[0x0]	1035864	1			T5	11		T10	4		T25	16
values[0x1]	1205561	1			T1	1		T5	9		T10	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	114622	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

2862059

1

T2

18

T3

23

T4

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	11867	1			T18	4		T13	245		T14	797
valid_sources[0x01]	11486	1			T6	3		T13	415		T14	857
valid_sources[0x02]	11536	1			T12	1		T13	88		T14	870
valid_sources[0x03]	12547	1			T18	2		T13	126		T14	897
valid_sources[0x04]	11824	1			T25	1		T13	49		T14	971
valid_sources[0x05]	12455	1			T13	291		T14	903		T15	478
valid_sources[0x06]	10659	1			T13	7		T14	1025		T61	1
valid_sources[0x07]	11842	1			T13	32		T14	944		T21	1
valid_sources[0x08]	11609	1			T13	94		T14	882		T21	1
valid_sources[0x09]	12236	1			T9	1		T13	376		T14	811
valid_sources[0x0a]	12041	1			T12	1		T13	217		T14	967
valid_sources[0x0b]	11053	1			T13	203		T14	875		T15	275
valid_sources[0x0c]	12248	1			T9	1		T12	2		T13	20
valid_sources[0x0d]	12059	1			T12	1		T13	633		T14	827
valid_sources[0x0e]	11849	1			T13	128		T14	915		T15	309
valid_sources[0x0f]	12090	1			T13	407		T14	860		T15	318
valid_sources[0x10]	10791	1			T12	1		T13	11		T14	903
valid_sources[0x11]	11350	1			T13	220		T14	940		T15	302
valid_sources[0x12]	12963	1			T13	18		T14	985		T31	1
valid_sources[0x13]	11464	1			T13	429		T14	913		T55	3
valid_sources[0x14]	12008	1			T13	84		T14	843		T15	280
valid_sources[0x15]	11396	1			T13	14		T14	882		T67	1
valid_sources[0x16]	11862	1			T13	336		T14	964		T61	2
valid_sources[0x17]	12181	1			T13	159		T14	1066		T15	317
valid_sources[0x18]	11065	1			T12	1		T13	120		T14	926
valid_sources[0x19]	11714	1			T9	1		T13	138		T14	875
valid_sources[0x1a]	11640	1			T2	1		T18	3		T13	227
valid_sources[0x1b]	12634	1			T12	1		T13	365		T14	937
valid_sources[0x1c]	12338	1			T18	5		T12	1		T13	519
valid_sources[0x1d]	11790	1			T12	1		T13	10		T14	897
valid_sources[0x1e]	11545	1			T25	1		T18	3		T13	41
valid_sources[0x1f]	11744	1			T6	3		T13	200		T14	859
valid_sources[0x20]	11450	1			T9	1		T18	2		T13	106
valid_sources[0x21]	12034	1			T12	1		T13	490		T14	864
valid_sources[0x22]	12406	1			T2	2		T13	355		T14	863
valid_sources[0x23]	12556	1			T19	96		T12	2		T13	176
valid_sources[0x24]	11141	1			T6	1		T13	106		T14	871
valid_sources[0x25]	11471	1			T13	225		T14	824		T120	1
valid_sources[0x26]	11408	1			T25	1		T13	27		T14	835
valid_sources[0x27]	11266	1			T13	170		T14	857		T15	333
valid_sources[0x28]	11878	1			T13	338		T14	892		T15	348
valid_sources[0x29]	11281	1			T6	2		T12	2		T13	104
valid_sources[0x2a]	11442	1			T25	1		T13	514		T14	806
valid_sources[0x2b]	12288	1			T13	159		T14	851		T120	1
valid_sources[0x2c]	11657	1			T9	1		T12	1		T13	284
valid_sources[0x2d]	11774	1			T25	1		T13	16		T14	956
valid_sources[0x2e]	11398	1			T13	199		T14	800		T15	379
valid_sources[0x2f]	11726	1			T18	1		T13	278		T17	2
valid_sources[0x30]	11252	1			T13	10		T17	1		T14	900
valid_sources[0x31]	10334	1			T13	126		T14	801		T15	306
valid_sources[0x32]	11115	1			T25	1		T13	70		T14	909
valid_sources[0x33]	12197	1			T25	1		T18	3		T13	128
valid_sources[0x34]	11084	1			T13	174		T14	993		T15	236
valid_sources[0x35]	11123	1			T4	1		T13	181		T14	851
valid_sources[0x36]	11275	1			T13	92		T14	947		T15	372
valid_sources[0x37]	12253	1			T25	1		T12	1		T13	16
valid_sources[0x38]	12283	1			T13	316		T14	903		T67	1
valid_sources[0x39]	11566	1			T6	2		T25	1		T13	39
valid_sources[0x3a]	12594	1			T13	14		T14	1003		T57	1
valid_sources[0x3b]	10875	1			T2	2		T13	408		T14	832
valid_sources[0x3c]	11190	1			T13	24		T14	931		T15	343
valid_sources[0x3d]	11061	1			T12	2		T13	258		T14	941
valid_sources[0x3e]	11916	1			T1	1		T2	2		T12	1
valid_sources[0x3f]	10769	1			T13	39		T17	1		T14	838
valid_sources[0x40]	11623	1			T13	224		T14	1054		T15	253
valid_sources[0x41]	11816	1			T13	228		T14	873		T120	2
valid_sources[0x42]	12732	1			T13	281		T14	984		T103	15
valid_sources[0x43]	11694	1			T13	157		T14	831		T55	4
valid_sources[0x44]	11522	1			T2	1		T12	1		T13	113
valid_sources[0x45]	10827	1			T9	1		T13	438		T14	791
valid_sources[0x46]	11378	1			T7	32		T13	523		T14	828
valid_sources[0x47]	12105	1			T2	1		T13	225		T14	842
valid_sources[0x48]	12232	1			T2	1		T13	290		T14	1060
valid_sources[0x49]	11055	1			T18	1		T13	7		T14	846
valid_sources[0x4a]	11711	1			T9	2		T13	117		T14	787
valid_sources[0x4b]	12298	1			T13	740		T14	929		T15	417
valid_sources[0x4c]	11693	1			T13	47		T14	937		T15	331
valid_sources[0x4d]	10948	1			T12	1		T13	177		T14	763
valid_sources[0x4e]	11079	1			T13	479		T14	878		T15	339
valid_sources[0x4f]	11366	1			T2	1		T13	7		T14	1021
valid_sources[0x50]	12556	1			T9	1		T12	1		T13	459
valid_sources[0x51]	11136	1			T18	1		T13	176		T14	905
valid_sources[0x52]	12058	1			T18	5		T13	275		T14	1022
valid_sources[0x53]	11538	1			T18	2		T13	479		T17	2
valid_sources[0x54]	12069	1			T9	1		T18	1		T13	274
valid_sources[0x55]	11941	1			T13	171		T14	849		T15	420
valid_sources[0x56]	11658	1			T13	478		T14	1014		T15	362
valid_sources[0x57]	11167	1			T12	1		T13	212		T14	845
valid_sources[0x58]	11973	1			T13	119		T14	791		T15	349
valid_sources[0x59]	12044	1			T5	20		T13	266		T14	932
valid_sources[0x5a]	11137	1			T12	1		T13	244		T14	872
valid_sources[0x5b]	11577	1			T18	2		T12	1		T13	224
valid_sources[0x5c]	11440	1			T2	2		T9	1		T25	1
valid_sources[0x5d]	11232	1			T13	174		T14	904		T15	296
valid_sources[0x5e]	11220	1			T2	1		T25	1		T13	206
valid_sources[0x5f]	11119	1			T13	373		T14	1086		T15	257
valid_sources[0x60]	11456	1			T13	82		T14	942		T15	363
valid_sources[0x61]	11372	1			T13	134		T14	903		T15	299
valid_sources[0x62]	11755	1			T25	1		T18	3		T12	1
valid_sources[0x63]	11206	1			T18	6		T13	86		T14	748
valid_sources[0x64]	11939	1			T2	1		T6	3		T9	1
valid_sources[0x65]	11431	1			T13	259		T14	848		T34	7
valid_sources[0x66]	11545	1			T13	144		T14	993		T15	334
valid_sources[0x67]	11191	1			T13	313		T14	965		T15	404
valid_sources[0x68]	11212	1			T2	1		T13	19		T14	896
valid_sources[0x69]	11294	1			T6	1		T12	1		T13	191
valid_sources[0x6a]	11593	1			T2	1		T13	272		T14	986
valid_sources[0x6b]	11266	1			T18	3		T13	23		T14	907
valid_sources[0x6c]	11280	1			T6	2		T13	165		T14	971
valid_sources[0x6d]	12170	1			T13	496		T14	931		T15	353
valid_sources[0x6e]	11229	1			T13	325		T14	818		T15	326
valid_sources[0x6f]	11441	1			T6	1		T9	1		T18	8
valid_sources[0x70]	11434	1			T18	3		T13	340		T14	831
valid_sources[0x71]	10949	1			T13	400		T17	2		T14	899
valid_sources[0x72]	12246	1			T6	3		T13	258		T17	1
valid_sources[0x73]	12167	1			T2	1		T18	4		T27	1
valid_sources[0x74]	11779	1			T9	1		T18	1		T13	22
valid_sources[0x75]	12106	1			T13	233		T14	845		T61	1
valid_sources[0x76]	11553	1			T25	2		T13	227		T14	906
valid_sources[0x77]	11105	1			T9	1		T13	155		T14	981
valid_sources[0x78]	11887	1			T2	4		T13	234		T14	908
valid_sources[0x79]	11091	1			T13	15		T14	901		T15	346
valid_sources[0x7a]	11998	1			T6	1		T13	196		T14	869
valid_sources[0x7b]	12069	1			T9	1		T13	275		T14	939
valid_sources[0x7c]	11794	1			T2	1		T12	1		T13	193
valid_sources[0x7d]	11188	1			T13	183		T14	883		T55	6
valid_sources[0x7e]	10741	1			T12	1		T13	75		T14	787
valid_sources[0x7f]	11971	1			T13	80		T14	939		T55	2
valid_sources[0x80]	12515	1			T12	1		T13	316		T14	880

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

682972

1

T2

16

T3

17

T4

1

values[0x0]

all_enables

biggest_size

1014738

1

T25

5

T13

18403

T14

78513

values[0x1]

all_enables

biggest_size

1015293

1

T5

3

T10

1

T13

18160