Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36514	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

325100

1

T1

6

T2

6

T3

16

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	113286	1			T1	6		T2	6		T3	200
values[0x0]	121648	1			T7	1976		T11	2210		T16	3122
values[0x1]	126680	1			T7	2070		T11	2443		T16	3299

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	17173	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

344441

1

T1

6

T2

6

T3

131

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1970	1			T3	1		T7	21		T11	28
valid_sources[0x01]	1332	1			T3	1		T7	22		T11	21
valid_sources[0x02]	1478	1			T3	1		T7	30		T11	24
valid_sources[0x03]	1202	1			T7	21		T9	2		T11	23
valid_sources[0x04]	1451	1			T7	40		T9	3		T11	29
valid_sources[0x05]	1393	1			T3	1		T7	32		T11	25
valid_sources[0x06]	2040	1			T3	1		T7	16		T11	28
valid_sources[0x07]	1348	1			T7	17		T11	28		T55	1
valid_sources[0x08]	1329	1			T7	25		T9	1		T11	24
valid_sources[0x09]	1276	1			T3	1		T7	31		T11	21
valid_sources[0x0a]	1335	1			T7	22		T11	22		T15	18
valid_sources[0x0b]	2041	1			T7	14		T11	14		T55	1
valid_sources[0x0c]	1327	1			T3	1		T7	15		T11	23
valid_sources[0x0d]	1381	1			T3	2		T7	18		T11	23
valid_sources[0x0e]	1488	1			T7	19		T11	26		T55	1
valid_sources[0x0f]	1339	1			T7	25		T9	2		T11	18
valid_sources[0x10]	1447	1			T3	1		T7	19		T9	1
valid_sources[0x11]	1311	1			T7	25		T11	20		T58	35
valid_sources[0x12]	1300	1			T7	22		T9	1		T11	23
valid_sources[0x13]	1432	1			T3	1		T7	22		T11	27
valid_sources[0x14]	1633	1			T7	21		T9	3		T11	16
valid_sources[0x15]	1510	1			T7	11		T9	1		T11	28
valid_sources[0x16]	1342	1			T3	1		T4	30		T7	28
valid_sources[0x17]	1308	1			T3	2		T7	15		T11	32
valid_sources[0x18]	1234	1			T3	2		T7	23		T9	1
valid_sources[0x19]	1350	1			T7	20		T9	3		T11	26
valid_sources[0x1a]	1452	1			T3	1		T7	32		T11	27
valid_sources[0x1b]	1349	1			T3	1		T7	10		T9	2
valid_sources[0x1c]	1392	1			T5	13		T7	20		T11	21
valid_sources[0x1d]	1674	1			T3	1		T7	21		T11	30
valid_sources[0x1e]	1347	1			T3	1		T7	19		T9	3
valid_sources[0x1f]	1394	1			T3	2		T4	36		T7	12
valid_sources[0x20]	1500	1			T7	25		T9	1		T11	23
valid_sources[0x21]	1326	1			T7	24		T9	3		T11	22
valid_sources[0x22]	1330	1			T7	23		T11	32		T16	29
valid_sources[0x23]	1284	1			T7	23		T9	1		T11	31
valid_sources[0x24]	1483	1			T7	22		T9	2		T11	23
valid_sources[0x25]	1438	1			T3	4		T7	23		T11	28
valid_sources[0x26]	1287	1			T7	22		T11	23		T31	6
valid_sources[0x27]	1400	1			T3	1		T7	22		T9	1
valid_sources[0x28]	1312	1			T3	1		T7	14		T9	4
valid_sources[0x29]	1218	1			T7	34		T11	19		T16	31
valid_sources[0x2a]	1270	1			T7	35		T11	28		T55	1
valid_sources[0x2b]	1301	1			T7	20		T11	24		T60	1
valid_sources[0x2c]	1317	1			T7	11		T11	23		T60	1
valid_sources[0x2d]	1280	1			T3	3		T7	21		T9	2
valid_sources[0x2e]	1435	1			T3	1		T7	22		T11	35
valid_sources[0x2f]	1407	1			T7	36		T11	23		T55	2
valid_sources[0x30]	1349	1			T3	1		T7	23		T11	36
valid_sources[0x31]	1569	1			T7	20		T9	1		T11	24
valid_sources[0x32]	1256	1			T3	1		T7	18		T11	17
valid_sources[0x33]	1319	1			T7	22		T11	23		T60	2
valid_sources[0x34]	1598	1			T3	2		T7	18		T11	27
valid_sources[0x35]	1678	1			T7	26		T11	32		T31	3
valid_sources[0x36]	1288	1			T3	2		T7	17		T9	1
valid_sources[0x37]	1417	1			T3	2		T7	10		T9	1
valid_sources[0x38]	1855	1			T3	2		T7	16		T9	3
valid_sources[0x39]	1400	1			T7	14		T9	1		T11	24
valid_sources[0x3a]	1326	1			T3	1		T7	22		T11	21
valid_sources[0x3b]	1345	1			T3	2		T7	28		T9	3
valid_sources[0x3c]	1257	1			T7	20		T11	21		T60	2
valid_sources[0x3d]	1471	1			T3	1		T7	21		T9	2
valid_sources[0x3e]	1343	1			T7	17		T9	1		T11	26
valid_sources[0x3f]	1307	1			T7	31		T11	28		T55	1
valid_sources[0x40]	1349	1			T3	1		T7	12		T11	31
valid_sources[0x41]	1536	1			T3	1		T7	27		T11	24
valid_sources[0x42]	1393	1			T3	1		T4	24		T7	17
valid_sources[0x43]	1330	1			T7	26		T11	29		T59	21
valid_sources[0x44]	1407	1			T7	40		T9	1		T11	28
valid_sources[0x45]	1675	1			T4	37		T7	17		T11	15
valid_sources[0x46]	1290	1			T3	1		T7	32		T11	25
valid_sources[0x47]	1395	1			T3	1		T7	23		T9	3
valid_sources[0x48]	1337	1			T3	1		T7	22		T11	25
valid_sources[0x49]	1320	1			T3	2		T7	19		T9	1
valid_sources[0x4a]	1578	1			T3	1		T7	20		T11	31
valid_sources[0x4b]	1225	1			T7	24		T11	29		T60	4
valid_sources[0x4c]	1356	1			T7	21		T9	1		T11	29
valid_sources[0x4d]	1335	1			T7	25		T9	5		T11	26
valid_sources[0x4e]	1446	1			T3	2		T7	18		T9	2
valid_sources[0x4f]	1721	1			T7	20		T11	20		T16	42
valid_sources[0x50]	1285	1			T3	2		T7	25		T11	32
valid_sources[0x51]	1413	1			T3	2		T7	33		T11	29
valid_sources[0x52]	1430	1			T3	2		T7	20		T9	1
valid_sources[0x53]	1402	1			T7	23		T11	29		T55	1
valid_sources[0x54]	1555	1			T3	1		T7	8		T9	1
valid_sources[0x55]	1312	1			T3	3		T7	26		T9	2
valid_sources[0x56]	1333	1			T1	6		T7	25		T11	23
valid_sources[0x57]	1823	1			T3	2		T7	15		T9	6
valid_sources[0x58]	1795	1			T3	1		T7	28		T11	26
valid_sources[0x59]	1616	1			T7	21		T11	27		T16	34
valid_sources[0x5a]	1559	1			T2	6		T7	24		T11	21
valid_sources[0x5b]	1408	1			T7	19		T9	1		T11	22
valid_sources[0x5c]	1358	1			T7	24		T11	30		T60	1
valid_sources[0x5d]	1254	1			T7	26		T11	30		T60	3
valid_sources[0x5e]	1337	1			T7	23		T9	2		T11	27
valid_sources[0x5f]	1269	1			T3	1		T7	30		T9	2
valid_sources[0x60]	1323	1			T3	1		T7	22		T11	20
valid_sources[0x61]	1210	1			T7	15		T11	30		T16	26
valid_sources[0x62]	1304	1			T3	3		T7	28		T9	2
valid_sources[0x63]	1267	1			T7	24		T11	29		T60	2
valid_sources[0x64]	1362	1			T3	2		T7	36		T11	24
valid_sources[0x65]	1372	1			T3	1		T7	29		T11	33
valid_sources[0x66]	1337	1			T3	1		T7	26		T11	24
valid_sources[0x67]	1302	1			T7	19		T9	3		T11	35
valid_sources[0x68]	1285	1			T7	29		T9	2		T11	33
valid_sources[0x69]	1263	1			T3	2		T7	27		T11	17
valid_sources[0x6a]	1422	1			T7	12		T9	1		T11	21
valid_sources[0x6b]	1344	1			T7	10		T11	25		T55	1
valid_sources[0x6c]	1451	1			T3	1		T7	14		T11	27
valid_sources[0x6d]	1340	1			T3	3		T7	38		T9	1
valid_sources[0x6e]	1622	1			T7	15		T9	3		T11	22
valid_sources[0x6f]	1509	1			T7	21		T11	22		T32	4
valid_sources[0x70]	1427	1			T3	3		T7	14		T9	1
valid_sources[0x71]	1382	1			T7	19		T11	33		T55	1
valid_sources[0x72]	1814	1			T3	1		T7	18		T9	1
valid_sources[0x73]	1576	1			T3	1		T7	17		T9	4
valid_sources[0x74]	1382	1			T7	26		T11	26		T60	1
valid_sources[0x75]	1614	1			T3	1		T7	19		T9	2
valid_sources[0x76]	1341	1			T3	1		T7	25		T9	4
valid_sources[0x77]	1341	1			T3	1		T7	28		T11	27
valid_sources[0x78]	1490	1			T7	22		T11	18		T60	3
valid_sources[0x79]	1344	1			T3	3		T7	23		T11	28
valid_sources[0x7a]	1369	1			T3	1		T7	32		T11	23
valid_sources[0x7b]	1389	1			T3	2		T7	37		T11	18
valid_sources[0x7c]	1399	1			T3	4		T7	28		T9	2
valid_sources[0x7d]	1184	1			T3	3		T7	11		T9	2
valid_sources[0x7e]	1232	1			T7	21		T11	31		T60	2
valid_sources[0x7f]	1485	1			T7	22		T11	31		T55	1
valid_sources[0x80]	1272	1			T7	12		T9	1		T11	28

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

83345

1

T1

6

T2

6

T3

16

values[0x0]

all_enables

biggest_size

120542

1

T7

1959

T11

2193

T16

3099

values[0x1]

all_enables

biggest_size

121213

1

T7

1964

T11

2344

T16

3165

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	32977	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

272536

1

T1

8

T2

18

T5

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	82301	1			T1	19		T2	26		T5	16
values[0x0]	103493	1			T7	1750		T10	2		T23	6
values[0x1]	119719	1			T7	1973		T10	3		T23	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	17328	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

288185

1

T1

9

T2

18

T5

10

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1423	1			T7	16		T11	32		T16	28
valid_sources[0x01]	1375	1			T7	28		T11	32		T16	20
valid_sources[0x02]	1220	1			T7	26		T11	10		T16	35
valid_sources[0x03]	1302	1			T7	28		T11	21		T24	3
valid_sources[0x04]	1413	1			T7	31		T11	5		T16	26
valid_sources[0x05]	1134	1			T7	18		T11	19		T16	37
valid_sources[0x06]	1121	1			T7	18		T11	19		T38	2
valid_sources[0x07]	1285	1			T7	22		T11	42		T16	17
valid_sources[0x08]	1373	1			T7	25		T11	20		T16	32
valid_sources[0x09]	803	1			T7	9		T11	32		T16	35
valid_sources[0x0a]	1252	1			T7	5		T11	25		T20	1
valid_sources[0x0b]	1374	1			T2	1		T7	15		T11	20
valid_sources[0x0c]	953	1			T7	61		T11	18		T16	31
valid_sources[0x0d]	1015	1			T7	32		T11	21		T59	1
valid_sources[0x0e]	1308	1			T7	2		T11	24		T30	1
valid_sources[0x0f]	1426	1			T7	28		T11	6		T59	1
valid_sources[0x10]	1418	1			T7	2		T11	15		T16	31
valid_sources[0x11]	956	1			T2	1		T7	39		T11	12
valid_sources[0x12]	907	1			T7	4		T11	17		T16	26
valid_sources[0x13]	1475	1			T7	11		T11	35		T16	38
valid_sources[0x14]	962	1			T7	41		T11	23		T16	29
valid_sources[0x15]	1107	1			T7	15		T11	35		T12	2
valid_sources[0x16]	964	1			T7	23		T11	15		T16	35
valid_sources[0x17]	978	1			T7	38		T11	31		T16	23
valid_sources[0x18]	1193	1			T7	10		T11	24		T15	1
valid_sources[0x19]	2049	1			T7	24		T11	15		T16	22
valid_sources[0x1a]	1455	1			T7	4		T11	10		T30	1
valid_sources[0x1b]	1028	1			T7	20		T11	5		T16	18
valid_sources[0x1c]	1203	1			T7	7		T11	28		T16	27
valid_sources[0x1d]	961	1			T7	11		T11	5		T16	32
valid_sources[0x1e]	1190	1			T7	7		T11	41		T16	26
valid_sources[0x1f]	1166	1			T7	3		T11	26		T16	24
valid_sources[0x20]	1443	1			T7	18		T23	1		T11	39
valid_sources[0x21]	1141	1			T7	29		T11	20		T16	35
valid_sources[0x22]	1060	1			T7	14		T11	19		T12	4
valid_sources[0x23]	1176	1			T7	40		T11	26		T15	1
valid_sources[0x24]	943	1			T7	18		T11	14		T16	21
valid_sources[0x25]	1140	1			T1	4		T7	26		T11	38
valid_sources[0x26]	931	1			T6	1		T7	28		T11	11
valid_sources[0x27]	1243	1			T6	2		T7	8		T11	53
valid_sources[0x28]	1268	1			T7	37		T11	30		T30	2
valid_sources[0x29]	1146	1			T7	35		T11	9		T16	33
valid_sources[0x2a]	1025	1			T2	2		T7	33		T11	19
valid_sources[0x2b]	859	1			T7	19		T11	22		T25	1
valid_sources[0x2c]	1096	1			T7	8		T11	22		T16	35
valid_sources[0x2d]	1249	1			T7	13		T11	38		T16	23
valid_sources[0x2e]	1169	1			T7	6		T11	12		T24	3
valid_sources[0x2f]	1175	1			T7	39		T11	19		T16	38
valid_sources[0x30]	1006	1			T7	13		T11	17		T16	28
valid_sources[0x31]	1454	1			T7	26		T11	9		T16	24
valid_sources[0x32]	1529	1			T7	15		T11	42		T16	35
valid_sources[0x33]	1039	1			T7	24		T11	46		T38	2
valid_sources[0x34]	1158	1			T2	1		T7	38		T11	24
valid_sources[0x35]	986	1			T6	2		T7	5		T11	18
valid_sources[0x36]	1234	1			T7	21		T11	30		T15	1
valid_sources[0x37]	1434	1			T7	14		T11	5		T16	35
valid_sources[0x38]	1320	1			T7	26		T11	28		T15	1
valid_sources[0x39]	981	1			T7	7		T11	27		T16	34
valid_sources[0x3a]	1046	1			T2	1		T7	8		T11	24
valid_sources[0x3b]	840	1			T7	11		T11	24		T16	35
valid_sources[0x3c]	960	1			T7	23		T11	19		T16	30
valid_sources[0x3d]	1190	1			T7	7		T11	18		T33	3
valid_sources[0x3e]	989	1			T7	22		T11	23		T38	1
valid_sources[0x3f]	1313	1			T7	23		T11	17		T38	1
valid_sources[0x40]	1409	1			T7	20		T11	27		T12	1
valid_sources[0x41]	1241	1			T7	10		T11	23		T16	23
valid_sources[0x42]	914	1			T7	41		T23	1		T11	21
valid_sources[0x43]	1432	1			T2	1		T7	37		T11	24
valid_sources[0x44]	1211	1			T6	1		T7	4		T11	37
valid_sources[0x45]	1292	1			T6	1		T7	7		T11	19
valid_sources[0x46]	1043	1			T7	16		T11	20		T16	33
valid_sources[0x47]	1063	1			T7	24		T11	21		T16	26
valid_sources[0x48]	966	1			T7	16		T11	16		T16	28
valid_sources[0x49]	1565	1			T7	13		T11	25		T38	1
valid_sources[0x4a]	996	1			T7	16		T11	24		T15	1
valid_sources[0x4b]	1312	1			T7	33		T37	40		T23	1
valid_sources[0x4c]	1503	1			T7	23		T11	24		T20	1
valid_sources[0x4d]	1257	1			T7	49		T11	17		T16	32
valid_sources[0x4e]	1310	1			T7	26		T11	16		T16	21
valid_sources[0x4f]	1406	1			T7	4		T11	26		T16	31
valid_sources[0x50]	1167	1			T7	39		T11	38		T16	25
valid_sources[0x51]	1447	1			T7	29		T11	12		T16	34
valid_sources[0x52]	1302	1			T7	35		T11	36		T16	23
valid_sources[0x53]	1457	1			T7	8		T11	22		T16	30
valid_sources[0x54]	1077	1			T7	33		T11	43		T57	1
valid_sources[0x55]	1074	1			T7	48		T23	1		T11	28
valid_sources[0x56]	1132	1			T7	24		T11	32		T16	27
valid_sources[0x57]	1181	1			T2	1		T7	14		T11	42
valid_sources[0x58]	1119	1			T1	3		T7	1		T11	20
valid_sources[0x59]	1481	1			T7	28		T11	18		T16	24
valid_sources[0x5a]	1013	1			T7	21		T11	21		T20	2
valid_sources[0x5b]	1504	1			T7	31		T11	24		T30	1
valid_sources[0x5c]	1195	1			T7	2		T11	39		T33	7
valid_sources[0x5d]	1155	1			T7	12		T11	8		T16	39
valid_sources[0x5e]	1734	1			T7	21		T11	24		T12	2
valid_sources[0x5f]	1122	1			T7	38		T11	16		T59	1
valid_sources[0x60]	1428	1			T7	26		T11	31		T16	34
valid_sources[0x61]	1091	1			T7	9		T10	5		T11	20
valid_sources[0x62]	959	1			T7	22		T23	1		T11	25
valid_sources[0x63]	1165	1			T7	12		T11	46		T16	26
valid_sources[0x64]	1442	1			T7	34		T11	39		T30	1
valid_sources[0x65]	1129	1			T2	2		T7	45		T11	11
valid_sources[0x66]	959	1			T7	12		T11	20		T38	1
valid_sources[0x67]	1399	1			T7	21		T11	32		T16	23
valid_sources[0x68]	1441	1			T7	5		T11	6		T12	1
valid_sources[0x69]	1292	1			T7	28		T11	17		T16	28
valid_sources[0x6a]	1250	1			T7	18		T11	12		T30	1
valid_sources[0x6b]	1165	1			T7	15		T11	20		T16	23
valid_sources[0x6c]	1133	1			T2	2		T7	22		T11	18
valid_sources[0x6d]	1533	1			T7	31		T11	35		T16	28
valid_sources[0x6e]	941	1			T7	22		T11	39		T16	30
valid_sources[0x6f]	1192	1			T2	2		T7	28		T23	1
valid_sources[0x70]	1059	1			T7	23		T11	19		T59	1
valid_sources[0x71]	1328	1			T7	6		T11	10		T16	30
valid_sources[0x72]	1347	1			T7	15		T11	9		T59	1
valid_sources[0x73]	1707	1			T7	12		T11	10		T15	1
valid_sources[0x74]	962	1			T7	74		T11	17		T30	1
valid_sources[0x75]	1054	1			T7	23		T11	12		T26	1
valid_sources[0x76]	1304	1			T2	1		T6	2		T7	23
valid_sources[0x77]	1489	1			T7	13		T11	20		T15	1
valid_sources[0x78]	958	1			T7	3		T11	61		T16	35
valid_sources[0x79]	933	1			T7	17		T11	10		T16	31
valid_sources[0x7a]	923	1			T5	16		T7	8		T11	13
valid_sources[0x7b]	885	1			T1	2		T6	1		T7	17
valid_sources[0x7c]	902	1			T7	6		T11	18		T16	36
valid_sources[0x7d]	1006	1			T7	30		T11	24		T38	1
valid_sources[0x7e]	1125	1			T7	8		T11	8		T16	22
valid_sources[0x7f]	1010	1			T7	8		T11	1		T59	1
valid_sources[0x80]	1144	1			T7	19		T11	31		T59	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70216

1

T1

8

T2

18

T5

8

values[0x0]

all_enables

biggest_size

100952

1

T7

1720

T23

3

T11

1920

values[0x1]

all_enables

biggest_size

101368

1

T7

1704

T23

1

T11

1910