Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.53 96.89 92.56 97.67 100.00 98.62 97.90 99.06


Total tests in report: 457
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
63.05 63.05 92.34 92.34 71.07 71.07 42.45 42.45 40.00 40.00 90.00 90.00 93.55 93.55 11.94 11.94 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_smoke.79801040
77.11 14.06 92.70 0.36 77.67 6.60 66.08 23.62 40.00 0.00 91.72 1.72 95.05 1.50 76.58 64.64 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all_with_rand_reset.469489652
83.39 6.28 93.30 0.60 82.58 4.92 79.33 13.25 60.00 20.00 94.83 3.10 95.50 0.45 78.22 1.64 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_kmac_err_chk.386633632
87.92 4.52 93.30 0.00 84.97 2.39 80.97 1.65 86.67 26.67 95.17 0.34 95.65 0.15 78.69 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_corrupt_sig_fatal_chk.2254779609
90.39 2.47 93.42 0.12 87.36 2.39 92.10 11.12 86.67 0.00 95.17 0.00 95.80 0.15 82.20 3.51 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all.1714307375
91.57 1.19 93.66 0.24 88.06 0.70 92.10 0.00 86.67 0.00 96.21 1.03 95.80 0.00 88.52 6.32 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_tl_intg_err.2060973460
92.72 1.15 96.77 3.11 90.31 2.25 92.40 0.30 86.67 0.00 97.59 1.38 96.10 0.30 89.23 0.70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_alert_test.2667394109
93.83 1.11 96.89 0.12 90.45 0.14 92.40 0.00 93.33 6.67 97.93 0.34 96.10 0.00 89.70 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/25.rom_ctrl_corrupt_sig_fatal_chk.3560886128
94.87 1.05 96.89 0.00 90.87 0.42 92.40 0.00 100.00 6.67 97.93 0.00 96.10 0.00 89.93 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_corrupt_sig_fatal_chk.627799882
95.61 0.74 96.89 0.00 90.87 0.00 92.40 0.00 100.00 0.00 97.93 0.00 96.10 0.00 95.08 5.15 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_max_throughput_chk.3813899446
96.06 0.45 96.89 0.00 91.01 0.14 95.38 2.98 100.00 0.00 97.93 0.00 96.10 0.00 95.08 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all.3059191118
96.28 0.23 96.89 0.00 91.57 0.56 95.62 0.25 100.00 0.00 97.93 0.00 96.40 0.30 95.55 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_sec_cm.3474695657
96.48 0.20 96.89 0.00 91.57 0.00 96.55 0.93 100.00 0.00 97.93 0.00 96.40 0.00 96.02 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all.1471759886
96.67 0.19 96.89 0.00 91.71 0.14 96.55 0.00 100.00 0.00 97.93 0.00 97.60 1.20 96.02 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_aliasing.3462944296
96.80 0.13 96.89 0.00 91.85 0.14 96.95 0.40 100.00 0.00 98.28 0.34 97.60 0.00 96.02 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_kmac_err_chk.3321473956
96.92 0.12 96.89 0.00 91.85 0.00 96.95 0.00 100.00 0.00 98.28 0.00 97.75 0.15 96.72 0.70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_max_throughput_chk.2813807824
97.03 0.11 96.89 0.00 92.28 0.42 96.95 0.00 100.00 0.00 98.62 0.34 97.75 0.00 96.72 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_stress_all_with_rand_reset.1814689181
97.13 0.10 96.89 0.00 92.28 0.00 96.95 0.00 100.00 0.00 98.62 0.00 97.75 0.00 97.42 0.70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_tl_intg_err.1687685372
97.21 0.08 96.89 0.00 92.28 0.00 97.25 0.30 100.00 0.00 98.62 0.00 97.75 0.00 97.66 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_stress_all_with_rand_reset.2990177294
97.27 0.07 96.89 0.00 92.28 0.00 97.25 0.00 100.00 0.00 98.62 0.00 97.75 0.00 98.13 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/7.rom_ctrl_tl_intg_err.3182286986
97.34 0.07 96.89 0.00 92.28 0.00 97.25 0.00 100.00 0.00 98.62 0.00 97.75 0.00 98.59 0.47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_stress_all_with_rand_reset.3354792178
97.39 0.05 96.89 0.00 92.42 0.14 97.25 0.00 100.00 0.00 98.62 0.00 97.75 0.00 98.83 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all.1848852011
97.43 0.03 96.89 0.00 92.42 0.00 97.25 0.00 100.00 0.00 98.62 0.00 97.75 0.00 99.06 0.23 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_tl_intg_err.1088927212
97.46 0.03 96.89 0.00 92.42 0.00 97.47 0.23 100.00 0.00 98.62 0.00 97.75 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_stress_all.1956761304
97.48 0.02 96.89 0.00 92.42 0.00 97.47 0.00 100.00 0.00 98.62 0.00 97.90 0.15 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_same_csr_outstanding.600687338
97.50 0.02 96.89 0.00 92.56 0.14 97.47 0.00 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all_with_rand_reset.2637300122
97.52 0.02 96.89 0.00 92.56 0.00 97.60 0.12 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_stress_all.3004856175
97.53 0.01 96.89 0.00 92.56 0.00 97.67 0.07 100.00 0.00 98.62 0.00 97.90 0.00 99.06 0.00 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all.1615944715

Tests that do not contribute to grading

Name
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_bit_bash.3280097746
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_hw_reset.3209570559
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_mem_rw_with_rand_reset.4106820781
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_csr_rw.1844436989
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_mem_partial_access.160177161
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_mem_walk.2891589551
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_passthru_mem_tl_intg_err.1292461059
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/0.rom_ctrl_tl_errors.2115637418
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_aliasing.4279778004
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_bit_bash.3861884760
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_hw_reset.2702435414
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_mem_rw_with_rand_reset.1190023310
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_csr_rw.51313757
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_mem_partial_access.958997338
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_mem_walk.176965291
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_passthru_mem_tl_intg_err.85783923
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_same_csr_outstanding.2211474136
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/1.rom_ctrl_tl_errors.4129760631
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_csr_mem_rw_with_rand_reset.208537731
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_csr_rw.128361496
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_passthru_mem_tl_intg_err.886677340
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_same_csr_outstanding.1304366426
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_tl_errors.3339358808
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/10.rom_ctrl_tl_intg_err.2240749952
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_csr_mem_rw_with_rand_reset.3236429622
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_csr_rw.1763806161
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_passthru_mem_tl_intg_err.3240512217
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_same_csr_outstanding.2607843924
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/11.rom_ctrl_tl_errors.1585701894
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_csr_mem_rw_with_rand_reset.798734529
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_csr_rw.4196585924
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_passthru_mem_tl_intg_err.2460238899
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_same_csr_outstanding.1356307134
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_tl_errors.860487866
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/12.rom_ctrl_tl_intg_err.3307625061
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_csr_mem_rw_with_rand_reset.2831719507
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_csr_rw.365040293
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_passthru_mem_tl_intg_err.2164401196
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_same_csr_outstanding.1842102629
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_tl_errors.1482114134
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/13.rom_ctrl_tl_intg_err.865210847
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_csr_mem_rw_with_rand_reset.427847937
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_csr_rw.1806102359
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_passthru_mem_tl_intg_err.1954765895
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_same_csr_outstanding.2777717621
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_tl_errors.3539185961
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/14.rom_ctrl_tl_intg_err.3909794506
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_csr_mem_rw_with_rand_reset.762253420
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_csr_rw.3381912463
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_passthru_mem_tl_intg_err.4266268059
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_same_csr_outstanding.1032869698
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_tl_errors.2849028924
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/15.rom_ctrl_tl_intg_err.2113719032
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_csr_mem_rw_with_rand_reset.1375011654
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_csr_rw.2599956904
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_passthru_mem_tl_intg_err.3103454743
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_same_csr_outstanding.1037803791
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_tl_errors.3921743911
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/cover_reg_top/16.rom_ctrl_tl_intg_err.3412905219
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/49.rom_ctrl_max_throughput_chk.3142565523
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/49.rom_ctrl_stress_all.3696166469
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_alert_test.1170909810
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_smoke.806759212
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_stress_all.2705151757
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_alert_test.2967811712
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_corrupt_sig_fatal_chk.3143209061
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_kmac_err_chk.1017374717
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_max_throughput_chk.2531534283
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_smoke.3215074473
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_alert_test.1017221250
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.580695131
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_smoke.95338915
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_alert_test.2937307624
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.1299037912
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_kmac_err_chk.2075700425
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_smoke.4129562758
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all.1056162375
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/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_alert_test.1185387095
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_corrupt_sig_fatal_chk.2790001717
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_kmac_err_chk.4226875862
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_max_throughput_chk.1858067569
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_smoke.2422914566
/workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all_with_rand_reset.961236919



Total test records in report: 457
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_max_throughput_chk.215776817 Aug 21 08:16:01 AM UTC 24 Aug 21 08:16:09 AM UTC 24 830538929 ps
T2 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_smoke.79801040 Aug 21 08:16:00 AM UTC 24 Aug 21 08:16:11 AM UTC 24 276768533 ps
T3 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_alert_test.287906116 Aug 21 08:16:10 AM UTC 24 Aug 21 08:16:19 AM UTC 24 127850897 ps
T4 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_max_throughput_chk.277400822 Aug 21 08:16:10 AM UTC 24 Aug 21 08:16:19 AM UTC 24 95422784 ps
T5 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_stress_all.1851305493 Aug 21 08:16:10 AM UTC 24 Aug 21 08:16:19 AM UTC 24 410040038 ps
T6 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_smoke.736075228 Aug 21 08:16:10 AM UTC 24 Aug 21 08:16:20 AM UTC 24 378965079 ps
T7 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_kmac_err_chk.2881277405 Aug 21 08:16:05 AM UTC 24 Aug 21 08:16:22 AM UTC 24 1006153754 ps
T8 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_alert_test.2667394109 Aug 21 08:16:14 AM UTC 24 Aug 21 08:16:23 AM UTC 24 1554959499 ps
T9 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_smoke.1561601888 Aug 21 08:16:14 AM UTC 24 Aug 21 08:16:24 AM UTC 24 266039703 ps
T10 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_kmac_err_chk.386633632 Aug 21 08:16:11 AM UTC 24 Aug 21 08:16:28 AM UTC 24 1042372852 ps
T14 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_max_throughput_chk.3748738292 Aug 21 08:16:18 AM UTC 24 Aug 21 08:16:29 AM UTC 24 905231316 ps
T34 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_alert_test.3806719170 Aug 21 08:16:22 AM UTC 24 Aug 21 08:16:29 AM UTC 24 378098298 ps
T15 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_smoke.3284413471 Aug 21 08:16:23 AM UTC 24 Aug 21 08:16:30 AM UTC 24 185144183 ps
T11 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_stress_all.2895923909 Aug 21 08:16:16 AM UTC 24 Aug 21 08:16:34 AM UTC 24 386782317 ps
T13 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all.1714307375 Aug 21 08:16:01 AM UTC 24 Aug 21 08:16:34 AM UTC 24 1790324569 ps
T54 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_max_throughput_chk.3381437100 Aug 21 08:16:25 AM UTC 24 Aug 21 08:16:35 AM UTC 24 97676084 ps
T33 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_kmac_err_chk.3321473956 Aug 21 08:16:20 AM UTC 24 Aug 21 08:16:35 AM UTC 24 362445880 ps
T83 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_alert_test.764345070 Aug 21 08:16:29 AM UTC 24 Aug 21 08:16:36 AM UTC 24 101130319 ps
T63 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_smoke.2118075108 Aug 21 08:16:30 AM UTC 24 Aug 21 08:16:40 AM UTC 24 192024551 ps
T12 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all.1848852011 Aug 21 08:16:24 AM UTC 24 Aug 21 08:16:43 AM UTC 24 367798849 ps
T84 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_alert_test.2618838379 Aug 21 08:16:36 AM UTC 24 Aug 21 08:16:44 AM UTC 24 126508905 ps
T119 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_max_throughput_chk.2813807824 Aug 21 08:16:30 AM UTC 24 Aug 21 08:16:44 AM UTC 24 997297278 ps
T19 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_kmac_err_chk.3225233502 Aug 21 08:16:27 AM UTC 24 Aug 21 08:16:45 AM UTC 24 1560210071 ps
T35 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_smoke.806759212 Aug 21 08:16:36 AM UTC 24 Aug 21 08:16:45 AM UTC 24 523461269 ps
T20 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_max_throughput_chk.694586232 Aug 21 08:16:38 AM UTC 24 Aug 21 08:16:46 AM UTC 24 197013336 ps
T38 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_kmac_err_chk.115094933 Aug 21 08:16:34 AM UTC 24 Aug 21 08:16:49 AM UTC 24 251289288 ps
T37 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_stress_all.1956761304 Aug 21 08:16:30 AM UTC 24 Aug 21 08:16:50 AM UTC 24 308256807 ps
T36 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_kmac_err_chk.1378869024 Aug 21 08:16:40 AM UTC 24 Aug 21 08:16:51 AM UTC 24 699939543 ps
T29 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/2.rom_ctrl_sec_cm.1891402124 Aug 21 08:16:21 AM UTC 24 Aug 21 08:18:12 AM UTC 24 399124281 ps
T43 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_alert_test.1170909810 Aug 21 08:16:44 AM UTC 24 Aug 21 08:16:51 AM UTC 24 89297464 ps
T22 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_smoke.3215074473 Aug 21 08:16:45 AM UTC 24 Aug 21 08:16:54 AM UTC 24 383279120 ps
T44 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_alert_test.2967811712 Aug 21 08:16:48 AM UTC 24 Aug 21 08:16:54 AM UTC 24 260422956 ps
T45 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_max_throughput_chk.2531534283 Aug 21 08:16:45 AM UTC 24 Aug 21 08:16:55 AM UTC 24 336840455 ps
T21 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_smoke.95338915 Aug 21 08:16:50 AM UTC 24 Aug 21 08:16:57 AM UTC 24 384355199 ps
T46 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_max_throughput_chk.1908899618 Aug 21 08:16:51 AM UTC 24 Aug 21 08:16:58 AM UTC 24 193714213 ps
T47 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_stress_all.4273135496 Aug 21 08:16:50 AM UTC 24 Aug 21 08:17:00 AM UTC 24 151196001 ps
T48 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_smoke.4129562758 Aug 21 08:16:53 AM UTC 24 Aug 21 08:17:00 AM UTC 24 263576296 ps
T49 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/5.rom_ctrl_stress_all.2705151757 Aug 21 08:16:37 AM UTC 24 Aug 21 08:17:01 AM UTC 24 315556686 ps
T85 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_alert_test.1017221250 Aug 21 08:16:53 AM UTC 24 Aug 21 08:17:03 AM UTC 24 508364746 ps
T39 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_kmac_err_chk.1017374717 Aug 21 08:16:45 AM UTC 24 Aug 21 08:17:04 AM UTC 24 254588014 ps
T120 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_max_throughput_chk.1059998481 Aug 21 08:16:54 AM UTC 24 Aug 21 08:17:05 AM UTC 24 534153287 ps
T86 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_alert_test.2937307624 Aug 21 08:16:57 AM UTC 24 Aug 21 08:17:05 AM UTC 24 524577750 ps
T174 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all.1056162375 Aug 21 08:16:54 AM UTC 24 Aug 21 08:17:06 AM UTC 24 602222007 ps
T52 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_kmac_err_chk.4126410718 Aug 21 08:16:52 AM UTC 24 Aug 21 08:17:07 AM UTC 24 175322230 ps
T40 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all.3059191118 Aug 21 08:16:45 AM UTC 24 Aug 21 08:17:07 AM UTC 24 408349944 ps
T143 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_smoke.2422914566 Aug 21 08:16:57 AM UTC 24 Aug 21 08:17:07 AM UTC 24 1660663642 ps
T144 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_max_throughput_chk.1858067569 Aug 21 08:16:59 AM UTC 24 Aug 21 08:17:08 AM UTC 24 527014799 ps
T53 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_kmac_err_chk.2075700425 Aug 21 08:16:54 AM UTC 24 Aug 21 08:17:09 AM UTC 24 254322480 ps
T30 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_sec_cm.3474695657 Aug 21 08:16:09 AM UTC 24 Aug 21 08:17:10 AM UTC 24 611034245 ps
T87 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_alert_test.1185387095 Aug 21 08:17:04 AM UTC 24 Aug 21 08:17:12 AM UTC 24 564817713 ps
T163 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_kmac_err_chk.4226875862 Aug 21 08:17:01 AM UTC 24 Aug 21 08:17:14 AM UTC 24 834401278 ps
T164 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_alert_test.1386256418 Aug 21 08:17:07 AM UTC 24 Aug 21 08:17:14 AM UTC 24 171385055 ps
T142 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_max_throughput_chk.2120800148 Aug 21 08:17:05 AM UTC 24 Aug 21 08:17:15 AM UTC 24 137329888 ps
T158 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_alert_test.2756050851 Aug 21 08:17:09 AM UTC 24 Aug 21 08:17:16 AM UTC 24 187218346 ps
T121 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_max_throughput_chk.3630717737 Aug 21 08:17:08 AM UTC 24 Aug 21 08:17:18 AM UTC 24 369521033 ps
T58 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_kmac_err_chk.235014334 Aug 21 08:17:08 AM UTC 24 Aug 21 08:17:20 AM UTC 24 170319139 ps
T145 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_max_throughput_chk.3813899446 Aug 21 08:17:11 AM UTC 24 Aug 21 08:17:20 AM UTC 24 100068240 ps
T175 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_alert_test.98688825 Aug 21 08:17:14 AM UTC 24 Aug 21 08:17:21 AM UTC 24 140934842 ps
T31 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_sec_cm.4152569824 Aug 21 08:16:13 AM UTC 24 Aug 21 08:17:21 AM UTC 24 180618610 ps
T156 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all.1615944715 Aug 21 08:16:59 AM UTC 24 Aug 21 08:17:22 AM UTC 24 304964466 ps
T169 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_stress_all.1851627665 Aug 21 08:17:11 AM UTC 24 Aug 21 08:17:22 AM UTC 24 2346355840 ps
T176 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_kmac_err_chk.1901363708 Aug 21 08:17:13 AM UTC 24 Aug 21 08:17:23 AM UTC 24 619814617 ps
T166 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_alert_test.3666033512 Aug 21 08:17:16 AM UTC 24 Aug 21 08:17:24 AM UTC 24 87200748 ps
T41 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_sec_cm.1005399142 Aug 21 08:16:36 AM UTC 24 Aug 21 08:17:42 AM UTC 24 134228857 ps
T177 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_max_throughput_chk.1862397564 Aug 21 08:17:15 AM UTC 24 Aug 21 08:17:24 AM UTC 24 529231219 ps
T178 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_kmac_err_chk.3275633614 Aug 21 08:17:06 AM UTC 24 Aug 21 08:17:25 AM UTC 24 3983664914 ps
T167 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_stress_all.3004856175 Aug 21 08:17:07 AM UTC 24 Aug 21 08:17:26 AM UTC 24 1160244191 ps
T146 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_max_throughput_chk.3082280901 Aug 21 08:17:21 AM UTC 24 Aug 21 08:17:29 AM UTC 24 566371445 ps
T179 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_kmac_err_chk.1855592233 Aug 21 08:17:16 AM UTC 24 Aug 21 08:17:30 AM UTC 24 658150673 ps
T152 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_alert_test.1544030213 Aug 21 08:17:23 AM UTC 24 Aug 21 08:17:30 AM UTC 24 154305719 ps
T157 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all.1471759886 Aug 21 08:17:05 AM UTC 24 Aug 21 08:17:31 AM UTC 24 430311862 ps
T150 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_stress_all.1459875652 Aug 21 08:17:19 AM UTC 24 Aug 21 08:17:32 AM UTC 24 826395428 ps
T147 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_max_throughput_chk.2733575879 Aug 21 08:17:23 AM UTC 24 Aug 21 08:17:32 AM UTC 24 99748158 ps
T180 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_alert_test.4231643285 Aug 21 08:17:25 AM UTC 24 Aug 21 08:17:33 AM UTC 24 499067225 ps
T151 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_stress_all.3339925542 Aug 21 08:17:15 AM UTC 24 Aug 21 08:17:34 AM UTC 24 307730714 ps
T165 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_kmac_err_chk.2836618212 Aug 21 08:17:22 AM UTC 24 Aug 21 08:17:34 AM UTC 24 1034731406 ps
T181 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_max_throughput_chk.1038696408 Aug 21 08:17:26 AM UTC 24 Aug 21 08:17:35 AM UTC 24 140047532 ps
T148 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_stress_all.3182055927 Aug 21 08:17:23 AM UTC 24 Aug 21 08:17:35 AM UTC 24 270678434 ps
T16 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_stress_all_with_rand_reset.469489652 Aug 21 08:16:07 AM UTC 24 Aug 21 08:17:37 AM UTC 24 2010906408 ps
T70 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_alert_test.634607932 Aug 21 08:17:31 AM UTC 24 Aug 21 08:17:40 AM UTC 24 263049338 ps
T71 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_kmac_err_chk.346591497 Aug 21 08:17:25 AM UTC 24 Aug 21 08:17:40 AM UTC 24 424883545 ps
T55 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/17.rom_ctrl_max_throughput_chk.1248356414 Aug 21 08:17:33 AM UTC 24 Aug 21 08:17:42 AM UTC 24 193184539 ps
T72 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_stress_all.3030155564 Aug 21 08:17:26 AM UTC 24 Aug 21 08:17:43 AM UTC 24 276137035 ps
T73 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/17.rom_ctrl_alert_test.3869885366 Aug 21 08:17:35 AM UTC 24 Aug 21 08:17:43 AM UTC 24 624948502 ps
T59 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_kmac_err_chk.2828047440 Aug 21 08:17:30 AM UTC 24 Aug 21 08:17:43 AM UTC 24 168480125 ps
T74 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/18.rom_ctrl_alert_test.2715468261 Aug 21 08:17:38 AM UTC 24 Aug 21 08:17:43 AM UTC 24 335622541 ps
T75 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/17.rom_ctrl_stress_all.3955777640 Aug 21 08:17:32 AM UTC 24 Aug 21 08:17:46 AM UTC 24 5288776641 ps
T76 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/18.rom_ctrl_max_throughput_chk.2634376955 Aug 21 08:17:36 AM UTC 24 Aug 21 08:17:46 AM UTC 24 137060900 ps
T172 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/18.rom_ctrl_kmac_err_chk.1793412760 Aug 21 08:17:37 AM UTC 24 Aug 21 08:17:50 AM UTC 24 1853343219 ps
T182 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/17.rom_ctrl_kmac_err_chk.1467184149 Aug 21 08:17:34 AM UTC 24 Aug 21 08:17:51 AM UTC 24 803718230 ps
T161 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_alert_test.2258610704 Aug 21 08:17:44 AM UTC 24 Aug 21 08:17:52 AM UTC 24 515545363 ps
T183 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_max_throughput_chk.2118119894 Aug 21 08:17:41 AM UTC 24 Aug 21 08:17:52 AM UTC 24 144057611 ps
T155 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/18.rom_ctrl_stress_all.4019919565 Aug 21 08:17:35 AM UTC 24 Aug 21 08:17:53 AM UTC 24 1211342043 ps
T184 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/20.rom_ctrl_max_throughput_chk.240978625 Aug 21 08:17:45 AM UTC 24 Aug 21 08:17:54 AM UTC 24 185592762 ps
T185 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_stress_all.1636370991 Aug 21 08:17:40 AM UTC 24 Aug 21 08:17:57 AM UTC 24 428589235 ps
T186 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_kmac_err_chk.1143843342 Aug 21 08:17:43 AM UTC 24 Aug 21 08:17:58 AM UTC 24 293308510 ps
T187 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/20.rom_ctrl_kmac_err_chk.1452017266 Aug 21 08:17:47 AM UTC 24 Aug 21 08:17:59 AM UTC 24 170573862 ps
T168 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/20.rom_ctrl_alert_test.3518558504 Aug 21 08:17:52 AM UTC 24 Aug 21 08:17:59 AM UTC 24 261453069 ps
T26 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_corrupt_sig_fatal_chk.1065181613 Aug 21 08:16:26 AM UTC 24 Aug 21 08:18:03 AM UTC 24 8711219999 ps
T188 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_max_throughput_chk.259941939 Aug 21 08:17:53 AM UTC 24 Aug 21 08:18:03 AM UTC 24 137292431 ps
T173 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_stress_all.3820143691 Aug 21 08:17:53 AM UTC 24 Aug 21 08:18:05 AM UTC 24 125074092 ps
T171 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_alert_test.3233027861 Aug 21 08:17:58 AM UTC 24 Aug 21 08:18:05 AM UTC 24 1792754006 ps
T154 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_kmac_err_chk.3667734463 Aug 21 08:17:54 AM UTC 24 Aug 21 08:18:07 AM UTC 24 261188605 ps
T189 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/22.rom_ctrl_max_throughput_chk.2859877206 Aug 21 08:17:59 AM UTC 24 Aug 21 08:18:10 AM UTC 24 282956678 ps
T17 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/10.rom_ctrl_stress_all_with_rand_reset.2929543444 Aug 21 08:17:06 AM UTC 24 Aug 21 08:18:11 AM UTC 24 904915189 ps
T190 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/22.rom_ctrl_alert_test.220352765 Aug 21 08:18:04 AM UTC 24 Aug 21 08:18:12 AM UTC 24 127225502 ps
T191 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/23.rom_ctrl_max_throughput_chk.2536965867 Aug 21 08:18:04 AM UTC 24 Aug 21 08:18:13 AM UTC 24 220355458 ps
T162 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/20.rom_ctrl_stress_all.1463068594 Aug 21 08:17:44 AM UTC 24 Aug 21 08:18:14 AM UTC 24 858650046 ps
T149 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/23.rom_ctrl_alert_test.411902027 Aug 21 08:18:08 AM UTC 24 Aug 21 08:18:14 AM UTC 24 128182351 ps
T27 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/1.rom_ctrl_corrupt_sig_fatal_chk.2254779609 Aug 21 08:16:11 AM UTC 24 Aug 21 08:18:16 AM UTC 24 33777543176 ps
T28 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_corrupt_sig_fatal_chk.3143209061 Aug 21 08:16:45 AM UTC 24 Aug 21 08:18:17 AM UTC 24 2450306669 ps
T192 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/22.rom_ctrl_kmac_err_chk.4162712367 Aug 21 08:18:01 AM UTC 24 Aug 21 08:18:17 AM UTC 24 3518247803 ps
T18 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_stress_all_with_rand_reset.2990177294 Aug 21 08:17:31 AM UTC 24 Aug 21 08:18:18 AM UTC 24 1674841914 ps
T193 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/23.rom_ctrl_kmac_err_chk.1920522912 Aug 21 08:18:06 AM UTC 24 Aug 21 08:18:20 AM UTC 24 2119985818 ps
T194 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_max_throughput_chk.3197408477 Aug 21 08:18:11 AM UTC 24 Aug 21 08:18:20 AM UTC 24 495843628 ps
T195 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_alert_test.3091626126 Aug 21 08:18:14 AM UTC 24 Aug 21 08:18:22 AM UTC 24 496699152 ps
T32 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/4.rom_ctrl_corrupt_sig_fatal_chk.3157953180 Aug 21 08:16:32 AM UTC 24 Aug 21 08:18:22 AM UTC 24 1885448942 ps
T196 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_kmac_err_chk.3942553592 Aug 21 08:18:13 AM UTC 24 Aug 21 08:18:25 AM UTC 24 696862619 ps
T50 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/12.rom_ctrl_corrupt_sig_fatal_chk.2973240825 Aug 21 08:17:12 AM UTC 24 Aug 21 08:18:26 AM UTC 24 3183040630 ps
T197 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/25.rom_ctrl_max_throughput_chk.3474614549 Aug 21 08:18:18 AM UTC 24 Aug 21 08:18:26 AM UTC 24 147485831 ps
T198 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/22.rom_ctrl_stress_all.3735239975 Aug 21 08:17:59 AM UTC 24 Aug 21 08:18:27 AM UTC 24 292375872 ps
T42 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_sec_cm.1402155559 Aug 21 08:16:29 AM UTC 24 Aug 21 08:18:28 AM UTC 24 264195867 ps
T51 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/7.rom_ctrl_corrupt_sig_fatal_chk.580695131 Aug 21 08:16:51 AM UTC 24 Aug 21 08:18:28 AM UTC 24 6394286152 ps
T199 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/25.rom_ctrl_alert_test.894243042 Aug 21 08:18:21 AM UTC 24 Aug 21 08:18:29 AM UTC 24 503062027 ps
T200 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/26.rom_ctrl_stress_all.3141950291 Aug 21 08:18:21 AM UTC 24 Aug 21 08:18:31 AM UTC 24 161739760 ps
T170 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_stress_all.2845392476 Aug 21 08:18:10 AM UTC 24 Aug 21 08:18:33 AM UTC 24 3987252067 ps
T160 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/25.rom_ctrl_kmac_err_chk.2612619433 Aug 21 08:18:19 AM UTC 24 Aug 21 08:18:33 AM UTC 24 176490431 ps
T201 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/26.rom_ctrl_alert_test.3732097351 Aug 21 08:18:26 AM UTC 24 Aug 21 08:18:33 AM UTC 24 441658831 ps
T202 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/26.rom_ctrl_max_throughput_chk.3984920300 Aug 21 08:18:23 AM UTC 24 Aug 21 08:18:34 AM UTC 24 560965489 ps
T64 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/6.rom_ctrl_stress_all_with_rand_reset.1831480820 Aug 21 08:16:48 AM UTC 24 Aug 21 08:18:35 AM UTC 24 5552254015 ps
T203 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/23.rom_ctrl_stress_all.3654723993 Aug 21 08:18:04 AM UTC 24 Aug 21 08:18:37 AM UTC 24 544179952 ps
T204 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/26.rom_ctrl_kmac_err_chk.1414883943 Aug 21 08:18:25 AM UTC 24 Aug 21 08:18:37 AM UTC 24 176331131 ps
T205 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/27.rom_ctrl_max_throughput_chk.3488213995 Aug 21 08:18:29 AM UTC 24 Aug 21 08:18:40 AM UTC 24 538045428 ps
T206 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/28.rom_ctrl_alert_test.4228663986 Aug 21 08:18:35 AM UTC 24 Aug 21 08:18:42 AM UTC 24 334225226 ps
T207 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/27.rom_ctrl_alert_test.3838608501 Aug 21 08:18:33 AM UTC 24 Aug 21 08:18:43 AM UTC 24 497989996 ps
T208 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/28.rom_ctrl_max_throughput_chk.2501144792 Aug 21 08:18:34 AM UTC 24 Aug 21 08:18:44 AM UTC 24 388329175 ps
T62 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_corrupt_sig_fatal_chk.1299037912 Aug 21 08:16:54 AM UTC 24 Aug 21 08:18:44 AM UTC 24 7559094655 ps
T209 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/27.rom_ctrl_kmac_err_chk.4163369114 Aug 21 08:18:29 AM UTC 24 Aug 21 08:18:44 AM UTC 24 171195099 ps
T159 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_stress_all.1761811474 Aug 21 08:18:38 AM UTC 24 Aug 21 08:18:46 AM UTC 24 113876181 ps
T210 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_max_throughput_chk.3368270729 Aug 21 08:18:38 AM UTC 24 Aug 21 08:18:47 AM UTC 24 423311567 ps
T211 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/25.rom_ctrl_stress_all.1784691772 Aug 21 08:18:14 AM UTC 24 Aug 21 08:18:47 AM UTC 24 6232693949 ps
T212 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/28.rom_ctrl_kmac_err_chk.4253045748 Aug 21 08:18:35 AM UTC 24 Aug 21 08:18:50 AM UTC 24 177764395 ps
T153 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/28.rom_ctrl_stress_all.3162468444 Aug 21 08:18:34 AM UTC 24 Aug 21 08:18:50 AM UTC 24 570895300 ps
T213 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_alert_test.4175840970 Aug 21 08:18:45 AM UTC 24 Aug 21 08:18:52 AM UTC 24 333118590 ps
T214 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/30.rom_ctrl_max_throughput_chk.1789690525 Aug 21 08:18:45 AM UTC 24 Aug 21 08:18:52 AM UTC 24 137987757 ps
T215 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/30.rom_ctrl_stress_all.673814492 Aug 21 08:18:45 AM UTC 24 Aug 21 08:18:53 AM UTC 24 122069834 ps
T216 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/27.rom_ctrl_stress_all.2713466179 Aug 21 08:18:28 AM UTC 24 Aug 21 08:18:53 AM UTC 24 1579333079 ps
T217 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/30.rom_ctrl_alert_test.338196539 Aug 21 08:18:48 AM UTC 24 Aug 21 08:18:55 AM UTC 24 323117454 ps
T218 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_kmac_err_chk.3993142657 Aug 21 08:18:42 AM UTC 24 Aug 21 08:18:57 AM UTC 24 257195232 ps
T219 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/30.rom_ctrl_kmac_err_chk.3918149792 Aug 21 08:18:46 AM UTC 24 Aug 21 08:18:58 AM UTC 24 664551068 ps
T220 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/31.rom_ctrl_alert_test.2620308438 Aug 21 08:18:54 AM UTC 24 Aug 21 08:19:01 AM UTC 24 215383691 ps
T221 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/31.rom_ctrl_max_throughput_chk.2594943196 Aug 21 08:18:51 AM UTC 24 Aug 21 08:19:01 AM UTC 24 575628530 ps
T65 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/28.rom_ctrl_stress_all_with_rand_reset.1819831836 Aug 21 08:18:35 AM UTC 24 Aug 21 08:19:02 AM UTC 24 4050228206 ps
T222 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/31.rom_ctrl_stress_all.1602566746 Aug 21 08:18:48 AM UTC 24 Aug 21 08:19:04 AM UTC 24 1092279963 ps
T223 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/32.rom_ctrl_max_throughput_chk.4224857326 Aug 21 08:18:57 AM UTC 24 Aug 21 08:19:06 AM UTC 24 101597739 ps
T224 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/32.rom_ctrl_alert_test.605803636 Aug 21 08:19:02 AM UTC 24 Aug 21 08:19:10 AM UTC 24 128597975 ps
T225 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/31.rom_ctrl_kmac_err_chk.1558878684 Aug 21 08:18:52 AM UTC 24 Aug 21 08:19:10 AM UTC 24 261572231 ps
T25 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/14.rom_ctrl_stress_all_with_rand_reset.1814689181 Aug 21 08:17:23 AM UTC 24 Aug 21 08:19:11 AM UTC 24 2794790622 ps
T66 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_stress_all_with_rand_reset.220769624 Aug 21 08:17:58 AM UTC 24 Aug 21 08:19:12 AM UTC 24 11694241896 ps
T136 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_corrupt_sig_fatal_chk.510577545 Aug 21 08:17:24 AM UTC 24 Aug 21 08:19:13 AM UTC 24 74548657362 ps
T226 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/11.rom_ctrl_corrupt_sig_fatal_chk.1854215042 Aug 21 08:17:08 AM UTC 24 Aug 21 08:19:13 AM UTC 24 1974834065 ps
T60 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/0.rom_ctrl_corrupt_sig_fatal_chk.627799882 Aug 21 08:16:02 AM UTC 24 Aug 21 08:19:13 AM UTC 24 5131747133 ps
T67 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/15.rom_ctrl_stress_all_with_rand_reset.692079827 Aug 21 08:17:25 AM UTC 24 Aug 21 08:19:14 AM UTC 24 5445020884 ps
T227 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/33.rom_ctrl_max_throughput_chk.3762457159 Aug 21 08:19:05 AM UTC 24 Aug 21 08:19:15 AM UTC 24 99759741 ps
T228 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/32.rom_ctrl_kmac_err_chk.253207052 Aug 21 08:19:00 AM UTC 24 Aug 21 08:19:15 AM UTC 24 1041350364 ps
T68 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_stress_all_with_rand_reset.1942464500 Aug 21 08:18:13 AM UTC 24 Aug 21 08:19:16 AM UTC 24 13407188792 ps
T229 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/33.rom_ctrl_alert_test.758066109 Aug 21 08:19:12 AM UTC 24 Aug 21 08:19:17 AM UTC 24 87527854 ps
T230 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/20.rom_ctrl_corrupt_sig_fatal_chk.3077181938 Aug 21 08:17:47 AM UTC 24 Aug 21 08:19:19 AM UTC 24 12689074920 ps
T69 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/3.rom_ctrl_stress_all_with_rand_reset.2398243638 Aug 21 08:16:27 AM UTC 24 Aug 21 08:19:21 AM UTC 24 12219767973 ps
T231 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/34.rom_ctrl_max_throughput_chk.4102618193 Aug 21 08:19:13 AM UTC 24 Aug 21 08:19:21 AM UTC 24 94352836 ps
T135 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/18.rom_ctrl_corrupt_sig_fatal_chk.2395502245 Aug 21 08:17:36 AM UTC 24 Aug 21 08:19:23 AM UTC 24 5745562534 ps
T232 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_stress_all_with_rand_reset.961236919 Aug 21 08:17:02 AM UTC 24 Aug 21 08:19:23 AM UTC 24 11119446928 ps
T233 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/33.rom_ctrl_kmac_err_chk.2461384382 Aug 21 08:19:11 AM UTC 24 Aug 21 08:19:23 AM UTC 24 667236118 ps
T234 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/34.rom_ctrl_alert_test.359445653 Aug 21 08:19:17 AM UTC 24 Aug 21 08:19:24 AM UTC 24 367245120 ps
T235 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/32.rom_ctrl_stress_all.3639123533 Aug 21 08:18:54 AM UTC 24 Aug 21 08:19:24 AM UTC 24 1205806778 ps
T236 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/34.rom_ctrl_stress_all.2018063651 Aug 21 08:19:12 AM UTC 24 Aug 21 08:19:24 AM UTC 24 396501835 ps
T237 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/34.rom_ctrl_kmac_err_chk.3004233066 Aug 21 08:19:14 AM UTC 24 Aug 21 08:19:25 AM UTC 24 756728255 ps
T238 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/33.rom_ctrl_stress_all.1142946986 Aug 21 08:19:03 AM UTC 24 Aug 21 08:19:26 AM UTC 24 311057075 ps
T239 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/35.rom_ctrl_max_throughput_chk.2106111801 Aug 21 08:19:17 AM UTC 24 Aug 21 08:19:27 AM UTC 24 482646534 ps
T240 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/32.rom_ctrl_stress_all_with_rand_reset.3852109003 Aug 21 08:19:02 AM UTC 24 Aug 21 08:19:27 AM UTC 24 734164199 ps
T241 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/35.rom_ctrl_alert_test.3669953825 Aug 21 08:19:21 AM UTC 24 Aug 21 08:19:28 AM UTC 24 102313828 ps
T242 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/36.rom_ctrl_alert_test.4294082743 Aug 21 08:19:24 AM UTC 24 Aug 21 08:19:32 AM UTC 24 127945697 ps
T243 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/36.rom_ctrl_max_throughput_chk.2892752925 Aug 21 08:19:23 AM UTC 24 Aug 21 08:19:32 AM UTC 24 1146937609 ps
T137 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_stress_all_with_rand_reset.695416904 Aug 21 08:17:16 AM UTC 24 Aug 21 08:19:33 AM UTC 24 24002628396 ps
T244 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/35.rom_ctrl_kmac_err_chk.4031317195 Aug 21 08:19:20 AM UTC 24 Aug 21 08:19:35 AM UTC 24 251727671 ps
T245 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/24.rom_ctrl_corrupt_sig_fatal_chk.112115893 Aug 21 08:18:13 AM UTC 24 Aug 21 08:19:35 AM UTC 24 5848374975 ps
T61 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/26.rom_ctrl_corrupt_sig_fatal_chk.702744323 Aug 21 08:18:23 AM UTC 24 Aug 21 08:19:36 AM UTC 24 4924886488 ps
T246 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/37.rom_ctrl_alert_test.4152381021 Aug 21 08:19:28 AM UTC 24 Aug 21 08:19:36 AM UTC 24 500348440 ps
T247 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/36.rom_ctrl_stress_all.3725293309 Aug 21 08:19:21 AM UTC 24 Aug 21 08:19:36 AM UTC 24 157128460 ps
T248 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/37.rom_ctrl_max_throughput_chk.201978839 Aug 21 08:19:25 AM UTC 24 Aug 21 08:19:36 AM UTC 24 273281631 ps
T249 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/36.rom_ctrl_kmac_err_chk.2950576252 Aug 21 08:19:24 AM UTC 24 Aug 21 08:19:36 AM UTC 24 700660397 ps
T250 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/35.rom_ctrl_stress_all.934816245 Aug 21 08:19:17 AM UTC 24 Aug 21 08:19:38 AM UTC 24 431887813 ps
T251 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/16.rom_ctrl_corrupt_sig_fatal_chk.2878294910 Aug 21 08:17:29 AM UTC 24 Aug 21 08:19:38 AM UTC 24 7705302149 ps
T252 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_stress_all_with_rand_reset.1689831039 Aug 21 08:17:43 AM UTC 24 Aug 21 08:19:39 AM UTC 24 12307044448 ps
T253 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/37.rom_ctrl_stress_all.2029288819 Aug 21 08:19:24 AM UTC 24 Aug 21 08:19:40 AM UTC 24 1100163083 ps
T254 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/35.rom_ctrl_stress_all_with_rand_reset.777997176 Aug 21 08:19:20 AM UTC 24 Aug 21 08:19:40 AM UTC 24 328224624 ps
T255 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/19.rom_ctrl_corrupt_sig_fatal_chk.1728804185 Aug 21 08:17:42 AM UTC 24 Aug 21 08:19:42 AM UTC 24 10791146492 ps
T256 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/38.rom_ctrl_max_throughput_chk.1962940655 Aug 21 08:19:33 AM UTC 24 Aug 21 08:19:43 AM UTC 24 146570282 ps
T257 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/37.rom_ctrl_kmac_err_chk.11394873 Aug 21 08:19:27 AM UTC 24 Aug 21 08:19:43 AM UTC 24 2756260160 ps
T258 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/38.rom_ctrl_alert_test.3569446439 Aug 21 08:19:36 AM UTC 24 Aug 21 08:19:43 AM UTC 24 171266726 ps
T259 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/39.rom_ctrl_alert_test.1534292625 Aug 21 08:19:38 AM UTC 24 Aug 21 08:19:45 AM UTC 24 168167207 ps
T260 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/8.rom_ctrl_stress_all_with_rand_reset.3842012798 Aug 21 08:16:56 AM UTC 24 Aug 21 08:19:45 AM UTC 24 26253167917 ps
T261 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/22.rom_ctrl_stress_all_with_rand_reset.1238338791 Aug 21 08:18:02 AM UTC 24 Aug 21 08:19:46 AM UTC 24 2730186683 ps
T262 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/39.rom_ctrl_max_throughput_chk.2784279916 Aug 21 08:19:36 AM UTC 24 Aug 21 08:19:46 AM UTC 24 136712276 ps
T263 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/13.rom_ctrl_corrupt_sig_fatal_chk.916101751 Aug 21 08:17:15 AM UTC 24 Aug 21 08:19:47 AM UTC 24 21323237772 ps
T264 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/40.rom_ctrl_max_throughput_chk.1869904097 Aug 21 08:19:40 AM UTC 24 Aug 21 08:19:47 AM UTC 24 100300626 ps
T265 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/9.rom_ctrl_corrupt_sig_fatal_chk.2790001717 Aug 21 08:17:01 AM UTC 24 Aug 21 08:19:48 AM UTC 24 6974952437 ps
T266 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/39.rom_ctrl_kmac_err_chk.3283430836 Aug 21 08:19:37 AM UTC 24 Aug 21 08:19:48 AM UTC 24 2381878859 ps
T267 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/40.rom_ctrl_alert_test.756825002 Aug 21 08:19:44 AM UTC 24 Aug 21 08:19:50 AM UTC 24 86296794 ps
T268 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/38.rom_ctrl_kmac_err_chk.1902093171 Aug 21 08:19:34 AM UTC 24 Aug 21 08:19:51 AM UTC 24 522226864 ps
T269 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/40.rom_ctrl_stress_all.3202002028 Aug 21 08:19:39 AM UTC 24 Aug 21 08:19:53 AM UTC 24 330229244 ps
T270 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/41.rom_ctrl_max_throughput_chk.2628836919 Aug 21 08:19:44 AM UTC 24 Aug 21 08:19:53 AM UTC 24 99439813 ps
T271 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/38.rom_ctrl_stress_all.1606888290 Aug 21 08:19:29 AM UTC 24 Aug 21 08:19:54 AM UTC 24 290188046 ps
T272 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/40.rom_ctrl_kmac_err_chk.361288668 Aug 21 08:19:41 AM UTC 24 Aug 21 08:19:55 AM UTC 24 1106168543 ps
T273 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/41.rom_ctrl_alert_test.3860931658 Aug 21 08:19:47 AM UTC 24 Aug 21 08:19:55 AM UTC 24 254990194 ps
T274 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/39.rom_ctrl_stress_all.2084518293 Aug 21 08:19:36 AM UTC 24 Aug 21 08:19:59 AM UTC 24 371984270 ps
T275 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/42.rom_ctrl_alert_test.475120970 Aug 21 08:19:53 AM UTC 24 Aug 21 08:19:59 AM UTC 24 350216078 ps
T276 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_corrupt_sig_fatal_chk.2407932007 Aug 21 08:18:40 AM UTC 24 Aug 21 08:20:00 AM UTC 24 987012136 ps
T277 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/41.rom_ctrl_kmac_err_chk.4197721292 Aug 21 08:19:46 AM UTC 24 Aug 21 08:20:00 AM UTC 24 693858386 ps
T278 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/42.rom_ctrl_stress_all.347184162 Aug 21 08:19:47 AM UTC 24 Aug 21 08:20:01 AM UTC 24 388333491 ps
T279 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/42.rom_ctrl_max_throughput_chk.290648356 Aug 21 08:19:48 AM UTC 24 Aug 21 08:20:02 AM UTC 24 2087825991 ps
T280 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/42.rom_ctrl_kmac_err_chk.45653078 Aug 21 08:19:49 AM UTC 24 Aug 21 08:20:04 AM UTC 24 982853810 ps
T281 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/17.rom_ctrl_corrupt_sig_fatal_chk.3083005931 Aug 21 08:17:34 AM UTC 24 Aug 21 08:20:04 AM UTC 24 85821207465 ps
T282 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/43.rom_ctrl_max_throughput_chk.1268780196 Aug 21 08:19:54 AM UTC 24 Aug 21 08:20:04 AM UTC 24 141681883 ps
T283 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/41.rom_ctrl_stress_all.2076694238 Aug 21 08:19:44 AM UTC 24 Aug 21 08:20:05 AM UTC 24 1174954985 ps
T284 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/21.rom_ctrl_corrupt_sig_fatal_chk.237606808 Aug 21 08:17:54 AM UTC 24 Aug 21 08:20:06 AM UTC 24 2450633395 ps
T285 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/43.rom_ctrl_alert_test.2463329289 Aug 21 08:20:00 AM UTC 24 Aug 21 08:20:08 AM UTC 24 250933106 ps
T286 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/31.rom_ctrl_stress_all_with_rand_reset.2313132236 Aug 21 08:18:53 AM UTC 24 Aug 21 08:20:09 AM UTC 24 10206887353 ps
T287 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/23.rom_ctrl_corrupt_sig_fatal_chk.3097296020 Aug 21 08:18:05 AM UTC 24 Aug 21 08:20:10 AM UTC 24 7554271416 ps
T288 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/44.rom_ctrl_max_throughput_chk.1014996514 Aug 21 08:20:01 AM UTC 24 Aug 21 08:20:10 AM UTC 24 823155958 ps
T289 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/43.rom_ctrl_kmac_err_chk.1266259270 Aug 21 08:19:56 AM UTC 24 Aug 21 08:20:10 AM UTC 24 581312516 ps
T290 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/45.rom_ctrl_stress_all.4282344714 Aug 21 08:20:05 AM UTC 24 Aug 21 08:20:16 AM UTC 24 154889199 ps
T291 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/44.rom_ctrl_stress_all.3624453042 Aug 21 08:20:00 AM UTC 24 Aug 21 08:20:13 AM UTC 24 135085429 ps
T292 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/44.rom_ctrl_alert_test.1836889840 Aug 21 08:20:05 AM UTC 24 Aug 21 08:20:14 AM UTC 24 521645328 ps
T293 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/45.rom_ctrl_max_throughput_chk.1993485263 Aug 21 08:20:05 AM UTC 24 Aug 21 08:20:15 AM UTC 24 96135231 ps
T294 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/43.rom_ctrl_stress_all.1735874045 Aug 21 08:19:54 AM UTC 24 Aug 21 08:20:17 AM UTC 24 4544138234 ps
T295 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/44.rom_ctrl_kmac_err_chk.132474669 Aug 21 08:20:02 AM UTC 24 Aug 21 08:20:18 AM UTC 24 1548951916 ps
T296 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/45.rom_ctrl_alert_test.2182158362 Aug 21 08:20:11 AM UTC 24 Aug 21 08:20:19 AM UTC 24 516849120 ps
T297 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/46.rom_ctrl_max_throughput_chk.423184690 Aug 21 08:20:11 AM UTC 24 Aug 21 08:20:21 AM UTC 24 552235885 ps
T298 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/45.rom_ctrl_kmac_err_chk.3805783799 Aug 21 08:20:07 AM UTC 24 Aug 21 08:20:21 AM UTC 24 1668558591 ps
T299 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/46.rom_ctrl_alert_test.1763470943 Aug 21 08:20:15 AM UTC 24 Aug 21 08:20:23 AM UTC 24 774719660 ps
T300 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/46.rom_ctrl_stress_all.1542420339 Aug 21 08:20:11 AM UTC 24 Aug 21 08:20:24 AM UTC 24 459498852 ps
T301 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/27.rom_ctrl_corrupt_sig_fatal_chk.1653055481 Aug 21 08:18:29 AM UTC 24 Aug 21 08:20:25 AM UTC 24 7841167023 ps
T302 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/46.rom_ctrl_kmac_err_chk.2428998433 Aug 21 08:20:13 AM UTC 24 Aug 21 08:20:27 AM UTC 24 169034480 ps
T303 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/47.rom_ctrl_max_throughput_chk.2014239439 Aug 21 08:20:18 AM UTC 24 Aug 21 08:20:28 AM UTC 24 385658070 ps
T304 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/40.rom_ctrl_stress_all_with_rand_reset.352307834 Aug 21 08:19:43 AM UTC 24 Aug 21 08:20:28 AM UTC 24 4617287938 ps
T305 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/47.rom_ctrl_alert_test.4129544335 Aug 21 08:20:22 AM UTC 24 Aug 21 08:20:30 AM UTC 24 518913156 ps
T306 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/47.rom_ctrl_stress_all.1785834379 Aug 21 08:20:16 AM UTC 24 Aug 21 08:20:31 AM UTC 24 801165094 ps
T307 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/29.rom_ctrl_stress_all_with_rand_reset.3487350000 Aug 21 08:18:45 AM UTC 24 Aug 21 08:20:32 AM UTC 24 14352642028 ps
T308 /workspaces/lowrisc/opentitan/scratch/earlgrey_1_0_0_2024_08_20_RC0/rom_ctrl_32kB-sim-vcs/coverage/default/48.rom_ctrl_max_throughput_chk.1941745209 Aug 21 08:20:24 AM UTC 24 Aug 21 08:20:34 AM UTC 24 385369134 ps
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