Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35818	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

304413

1

T4

41

T5

17

T6

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	107744	1			T4	316		T5	189		T6	89
values[0x0]	114484	1			T14	417		T15	710		T16	1435
values[0x1]	118003	1			T14	432		T15	677		T16	1442

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16754	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

323477

1

T4

194

T5

118

T6

53

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1035	1			T55	1		T57	1		T109	1
valid_sources[0x01]	1227	1			T5	7		T21	1		T55	5
valid_sources[0x02]	1587	1			T6	3		T107	1		T123	4
valid_sources[0x03]	1162	1			T10	1		T107	4		T109	2
valid_sources[0x04]	1000	1			T6	2		T21	1		T107	2
valid_sources[0x05]	1292	1			T22	1		T128	8		T73	1
valid_sources[0x06]	1022	1			T6	1		T21	3		T33	1
valid_sources[0x07]	1740	1			T5	2		T6	1		T21	2
valid_sources[0x08]	1317	1			T5	10		T10	1		T107	1
valid_sources[0x09]	1873	1			T107	2		T129	1		T109	1
valid_sources[0x0a]	902	1			T8	1		T21	2		T107	1
valid_sources[0x0b]	1596	1			T6	1		T10	2		T21	1
valid_sources[0x0c]	1051	1			T5	2		T6	2		T10	2
valid_sources[0x0d]	1305	1			T20	1		T21	3		T22	1
valid_sources[0x0e]	1121	1			T6	1		T55	2		T57	1
valid_sources[0x0f]	1194	1			T20	2		T55	1		T107	1
valid_sources[0x10]	1377	1			T5	2		T20	1		T21	2
valid_sources[0x11]	1100	1			T21	1		T55	2		T107	2
valid_sources[0x12]	1235	1			T21	2		T55	1		T91	1
valid_sources[0x13]	1179	1			T8	1		T21	2		T55	6
valid_sources[0x14]	873	1			T22	2		T107	2		T130	1
valid_sources[0x15]	1196	1			T4	5		T6	1		T21	2
valid_sources[0x16]	1034	1			T10	1		T18	1		T55	4
valid_sources[0x17]	1178	1			T6	2		T21	2		T55	2
valid_sources[0x18]	1229	1			T5	1		T6	1		T21	2
valid_sources[0x19]	972	1			T20	1		T21	3		T107	1
valid_sources[0x1a]	1429	1			T6	1		T21	1		T107	1
valid_sources[0x1b]	946	1			T6	2		T10	1		T21	2
valid_sources[0x1c]	1155	1			T21	1		T107	1		T129	1
valid_sources[0x1d]	995	1			T6	1		T8	1		T107	3
valid_sources[0x1e]	1323	1			T8	1		T21	1		T55	1
valid_sources[0x1f]	1189	1			T5	2		T55	5		T130	1
valid_sources[0x20]	1442	1			T6	1		T20	1		T21	2
valid_sources[0x21]	1530	1			T8	1		T10	2		T55	1
valid_sources[0x22]	1157	1			T5	7		T19	6		T107	2
valid_sources[0x23]	2052	1			T8	2		T10	2		T21	2
valid_sources[0x24]	1876	1			T21	2		T34	1		T131	49
valid_sources[0x25]	1118	1			T4	10		T8	1		T21	1
valid_sources[0x26]	1298	1			T4	13		T8	4		T107	2
valid_sources[0x27]	1272	1			T6	1		T10	1		T20	2
valid_sources[0x28]	1108	1			T20	1		T21	2		T129	2
valid_sources[0x29]	1040	1			T5	2		T8	1		T57	2
valid_sources[0x2a]	1135	1			T5	4		T6	1		T55	7
valid_sources[0x2b]	1285	1			T21	2		T57	1		T107	4
valid_sources[0x2c]	1415	1			T6	2		T20	5		T21	2
valid_sources[0x2d]	892	1			T130	1		T123	2		T132	5
valid_sources[0x2e]	1348	1			T8	3		T21	1		T55	4
valid_sources[0x2f]	1122	1			T4	4		T22	2		T55	4
valid_sources[0x30]	2558	1			T8	2		T55	1		T123	5
valid_sources[0x31]	1023	1			T7	22		T21	2		T55	4
valid_sources[0x32]	1475	1			T5	1		T8	1		T107	4
valid_sources[0x33]	1648	1			T5	1		T107	3		T109	1
valid_sources[0x34]	1019	1			T21	2		T22	1		T55	5
valid_sources[0x35]	1737	1			T20	1		T55	5		T107	1
valid_sources[0x36]	1018	1			T4	5		T8	1		T21	1
valid_sources[0x37]	1354	1			T8	1		T55	1		T107	1
valid_sources[0x38]	1198	1			T6	1		T18	1		T107	1
valid_sources[0x39]	1994	1			T5	2		T21	1		T19	9
valid_sources[0x3a]	1024	1			T20	1		T21	1		T55	7
valid_sources[0x3b]	1237	1			T123	2		T133	9		T38	1
valid_sources[0x3c]	1356	1			T4	14		T5	3		T20	2
valid_sources[0x3d]	1539	1			T4	1		T130	2		T109	1
valid_sources[0x3e]	2486	1			T4	11		T5	1		T18	1
valid_sources[0x3f]	1577	1			T6	1		T21	1		T55	1
valid_sources[0x40]	1577	1			T10	2		T107	1		T108	2
valid_sources[0x41]	970	1			T5	5		T21	1		T57	1
valid_sources[0x42]	1693	1			T8	1		T21	2		T107	2
valid_sources[0x43]	1322	1			T21	1		T107	1		T109	3
valid_sources[0x44]	1597	1			T6	1		T8	1		T20	2
valid_sources[0x45]	946	1			T5	3		T8	1		T21	3
valid_sources[0x46]	902	1			T21	2		T57	1		T19	20
valid_sources[0x47]	2310	1			T6	2		T10	1		T21	1
valid_sources[0x48]	1085	1			T21	1		T109	1		T123	2
valid_sources[0x49]	995	1			T21	2		T55	4		T107	1
valid_sources[0x4a]	1267	1			T8	1		T21	3		T108	1
valid_sources[0x4b]	1163	1			T6	1		T21	1		T107	2
valid_sources[0x4c]	987	1			T21	1		T92	1		T123	1
valid_sources[0x4d]	1294	1			T21	4		T109	1		T123	2
valid_sources[0x4e]	1088	1			T4	2		T6	1		T10	1
valid_sources[0x4f]	1205	1			T6	1		T33	1		T130	2
valid_sources[0x50]	1084	1			T20	2		T21	1		T55	2
valid_sources[0x51]	1431	1			T21	1		T129	1		T130	1
valid_sources[0x52]	1430	1			T21	1		T55	3		T128	1
valid_sources[0x53]	1019	1			T8	2		T33	2		T91	3
valid_sources[0x54]	1034	1			T21	1		T55	2		T107	2
valid_sources[0x55]	961	1			T6	1		T107	1		T92	1
valid_sources[0x56]	1030	1			T10	1		T21	2		T55	4
valid_sources[0x57]	1361	1			T8	1		T20	2		T21	2
valid_sources[0x58]	1123	1			T6	1		T21	1		T55	3
valid_sources[0x59]	1675	1			T21	1		T55	2		T107	1
valid_sources[0x5a]	1663	1			T4	2		T5	1		T8	3
valid_sources[0x5b]	1828	1			T21	1		T55	3		T107	2
valid_sources[0x5c]	1298	1			T8	1		T55	5		T107	2
valid_sources[0x5d]	1204	1			T4	11		T5	1		T21	2
valid_sources[0x5e]	1463	1			T55	4		T107	2		T129	2
valid_sources[0x5f]	1564	1			T21	1		T123	1		T132	3
valid_sources[0x60]	1010	1			T5	5		T6	2		T21	1
valid_sources[0x61]	1158	1			T18	3		T107	2		T109	1
valid_sources[0x62]	1727	1			T5	2		T10	1		T18	1
valid_sources[0x63]	957	1			T6	2		T21	1		T123	1
valid_sources[0x64]	1555	1			T5	1		T21	1		T57	1
valid_sources[0x65]	1837	1			T8	3		T10	1		T33	1
valid_sources[0x66]	894	1			T6	2		T20	2		T21	3
valid_sources[0x67]	1422	1			T4	13		T5	2		T10	1
valid_sources[0x68]	1580	1			T20	1		T21	2		T18	3
valid_sources[0x69]	1486	1			T5	1		T21	1		T55	1
valid_sources[0x6a]	1125	1			T21	1		T55	2		T130	1
valid_sources[0x6b]	1644	1			T5	6		T6	1		T21	1
valid_sources[0x6c]	1211	1			T5	2		T21	1		T55	4
valid_sources[0x6d]	1371	1			T20	2		T21	1		T22	1
valid_sources[0x6e]	1188	1			T5	6		T6	1		T21	2
valid_sources[0x6f]	1506	1			T21	1		T55	1		T107	2
valid_sources[0x70]	949	1			T21	1		T18	1		T57	2
valid_sources[0x71]	1287	1			T6	3		T21	1		T107	1
valid_sources[0x72]	1120	1			T21	1		T130	1		T123	2
valid_sources[0x73]	1307	1			T8	2		T20	2		T55	6
valid_sources[0x74]	1423	1			T57	2		T90	1		T34	2
valid_sources[0x75]	1102	1			T21	2		T55	2		T107	1
valid_sources[0x76]	1327	1			T57	1		T108	20		T130	1
valid_sources[0x77]	1435	1			T8	1		T18	1		T55	3
valid_sources[0x78]	1342	1			T4	1		T8	2		T9	14
valid_sources[0x79]	1019	1			T5	2		T6	1		T21	1
valid_sources[0x7a]	1281	1			T21	2		T22	1		T55	3
valid_sources[0x7b]	1510	1			T7	23		T21	1		T107	1
valid_sources[0x7c]	1115	1			T10	1		T21	2		T109	1
valid_sources[0x7d]	1044	1			T4	16		T6	1		T21	1
valid_sources[0x7e]	1623	1			T5	4		T34	4		T123	1
valid_sources[0x7f]	948	1			T4	4		T10	1		T20	1
valid_sources[0x80]	2004	1			T5	8		T6	1		T21	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

78140

1

T4

41

T5

17

T6

4

values[0x0]

all_enables

biggest_size

113414

1

T14

415

T15

699

T16

1420

values[0x1]

all_enables

biggest_size

112859

1

T14

420

T15

640

T16

1347

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31166	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

266097

1

T2

4

T3

1

T6

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	80218	1			T6	48		T7	16		T9	16
values[0x0]	101165	1			T1	3		T2	3		T3	6
values[0x1]	115880	1			T1	1		T2	12		T3	4

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16745	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

280518

1

T1

1

T2

6

T3

2

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1207	1			T78	2		T38	1		T14	59
valid_sources[0x01]	1722	1			T38	3		T14	39		T15	5
valid_sources[0x02]	1078	1			T91	1		T134	3		T15	4
valid_sources[0x03]	949	1			T135	1		T14	2		T44	2
valid_sources[0x04]	879	1			T57	1		T34	1		T38	1
valid_sources[0x05]	990	1			T44	1		T15	16		T63	20
valid_sources[0x06]	1678	1			T134	4		T15	2		T136	1
valid_sources[0x07]	1308	1			T137	2		T30	4		T16	1
valid_sources[0x08]	1418	1			T133	2		T38	1		T134	1
valid_sources[0x09]	1351	1			T15	14		T16	14		T63	15
valid_sources[0x0a]	1026	1			T134	1		T15	9		T138	1
valid_sources[0x0b]	1067	1			T19	1		T26	10		T16	127
valid_sources[0x0c]	1145	1			T19	1		T38	1		T44	2
valid_sources[0x0d]	1545	1			T19	3		T139	3		T15	3
valid_sources[0x0e]	1430	1			T133	3		T14	3		T15	4
valid_sources[0x0f]	879	1			T15	2		T140	9		T16	3
valid_sources[0x10]	1322	1			T77	1		T15	17		T141	1
valid_sources[0x11]	1484	1			T24	17		T80	6		T142	1
valid_sources[0x12]	1289	1			T57	1		T19	3		T129	5
valid_sources[0x13]	1023	1			T91	1		T38	2		T15	2
valid_sources[0x14]	1400	1			T134	1		T15	3		T141	1
valid_sources[0x15]	1525	1			T19	1		T38	2		T15	16
valid_sources[0x16]	1196	1			T15	4		T63	25		T64	2
valid_sources[0x17]	1212	1			T129	1		T15	3		T16	81
valid_sources[0x18]	814	1			T133	2		T41	4		T63	23
valid_sources[0x19]	1293	1			T133	1		T143	2		T15	13
valid_sources[0x1a]	1040	1			T52	1		T139	1		T15	25
valid_sources[0x1b]	1100	1			T57	1		T144	2		T38	1
valid_sources[0x1c]	981	1			T134	1		T15	4		T16	1
valid_sources[0x1d]	990	1			T73	1		T139	3		T15	27
valid_sources[0x1e]	1398	1			T133	1		T38	2		T145	1
valid_sources[0x1f]	1212	1			T15	20		T16	3		T63	23
valid_sources[0x20]	927	1			T141	1		T16	30		T63	26
valid_sources[0x21]	1187	1			T19	1		T35	1		T144	1
valid_sources[0x22]	949	1			T146	3		T134	1		T14	2
valid_sources[0x23]	899	1			T135	1		T14	14		T141	1
valid_sources[0x24]	971	1			T15	23		T63	18		T65	16
valid_sources[0x25]	989	1			T147	64		T15	3		T141	1
valid_sources[0x26]	1157	1			T14	13		T25	1		T16	4
valid_sources[0x27]	1022	1			T9	2		T134	2		T44	1
valid_sources[0x28]	1434	1			T92	16		T134	1		T25	1
valid_sources[0x29]	1102	1			T34	8		T137	1		T148	1
valid_sources[0x2a]	1400	1			T38	2		T135	1		T15	11
valid_sources[0x2b]	1181	1			T34	4		T133	1		T38	1
valid_sources[0x2c]	1451	1			T91	1		T128	48		T38	1
valid_sources[0x2d]	1055	1			T9	7		T14	1		T149	7
valid_sources[0x2e]	1693	1			T16	14		T63	31		T64	105
valid_sources[0x2f]	1419	1			T73	3		T137	1		T38	1
valid_sources[0x30]	1334	1			T129	1		T137	7		T133	1
valid_sources[0x31]	1396	1			T137	1		T15	10		T138	1
valid_sources[0x32]	1146	1			T14	5		T15	5		T63	18
valid_sources[0x33]	1624	1			T15	24		T39	10		T141	2
valid_sources[0x34]	1105	1			T14	26		T15	9		T150	4
valid_sources[0x35]	830	1			T19	2		T15	1		T63	25
valid_sources[0x36]	1021	1			T78	2		T38	1		T14	1
valid_sources[0x37]	1197	1			T38	1		T15	15		T141	1
valid_sources[0x38]	1104	1			T18	16		T56	2		T15	1
valid_sources[0x39]	1162	1			T38	1		T15	9		T141	1
valid_sources[0x3a]	992	1			T14	90		T15	1		T16	5
valid_sources[0x3b]	1065	1			T1	1		T15	1		T30	1
valid_sources[0x3c]	1165	1			T78	4		T38	2		T145	1
valid_sources[0x3d]	1106	1			T15	8		T138	1		T63	23
valid_sources[0x3e]	1282	1			T134	1		T15	12		T63	38
valid_sources[0x3f]	1229	1			T2	1		T15	2		T63	31
valid_sources[0x40]	1546	1			T19	1		T134	2		T15	2
valid_sources[0x41]	997	1			T22	4		T19	1		T90	1
valid_sources[0x42]	1293	1			T2	3		T134	1		T14	1
valid_sources[0x43]	1176	1			T144	1		T14	1		T15	10
valid_sources[0x44]	1096	1			T44	4		T15	3		T63	24
valid_sources[0x45]	1073	1			T14	9		T15	4		T16	1
valid_sources[0x46]	1255	1			T19	2		T15	1		T16	2
valid_sources[0x47]	959	1			T57	1		T38	1		T134	4
valid_sources[0x48]	1256	1			T137	1		T15	13		T141	1
valid_sources[0x49]	1240	1			T19	1		T44	2		T62	8
valid_sources[0x4a]	1319	1			T3	10		T53	1		T63	20
valid_sources[0x4b]	1535	1			T90	1		T133	2		T63	23
valid_sources[0x4c]	915	1			T6	20		T34	5		T38	1
valid_sources[0x4d]	878	1			T57	1		T15	5		T63	22
valid_sources[0x4e]	1031	1			T15	10		T16	59		T63	19
valid_sources[0x4f]	1230	1			T57	1		T91	1		T142	1
valid_sources[0x50]	1286	1			T141	1		T151	3		T63	17
valid_sources[0x51]	1173	1			T14	1		T15	3		T63	23
valid_sources[0x52]	1692	1			T23	2		T129	4		T135	1
valid_sources[0x53]	1243	1			T22	5		T143	1		T14	2
valid_sources[0x54]	870	1			T19	1		T77	1		T15	5
valid_sources[0x55]	1499	1			T31	1		T133	1		T14	2
valid_sources[0x56]	965	1			T78	2		T38	1		T139	2
valid_sources[0x57]	1113	1			T44	1		T15	22		T63	28
valid_sources[0x58]	924	1			T19	1		T152	1		T15	20
valid_sources[0x59]	1052	1			T90	1		T28	1		T15	19
valid_sources[0x5a]	1229	1			T91	1		T63	22		T64	34
valid_sources[0x5b]	1250	1			T73	1		T15	26		T16	17
valid_sources[0x5c]	1104	1			T137	1		T15	1		T140	1
valid_sources[0x5d]	1377	1			T23	1		T14	22		T63	23
valid_sources[0x5e]	987	1			T1	1		T19	1		T142	1
valid_sources[0x5f]	876	1			T134	1		T140	3		T16	1
valid_sources[0x60]	1230	1			T15	11		T63	25		T64	20
valid_sources[0x61]	926	1			T19	2		T15	11		T16	1
valid_sources[0x62]	951	1			T57	1		T38	1		T15	29
valid_sources[0x63]	1109	1			T79	2		T14	4		T15	15
valid_sources[0x64]	836	1			T91	1		T144	4		T14	1
valid_sources[0x65]	856	1			T38	1		T143	1		T44	2
valid_sources[0x66]	1244	1			T133	3		T143	1		T14	183
valid_sources[0x67]	958	1			T144	1		T142	1		T63	28
valid_sources[0x68]	963	1			T44	1		T15	3		T62	1
valid_sources[0x69]	998	1			T15	4		T63	18		T64	1
valid_sources[0x6a]	1350	1			T38	1		T134	4		T15	1
valid_sources[0x6b]	932	1			T15	8		T26	7		T16	2
valid_sources[0x6c]	1208	1			T15	6		T16	3		T63	16
valid_sources[0x6d]	885	1			T38	1		T153	7		T15	1
valid_sources[0x6e]	1085	1			T19	2		T137	1		T14	52
valid_sources[0x6f]	1007	1			T90	2		T146	1		T14	1
valid_sources[0x70]	992	1			T133	1		T38	1		T154	48
valid_sources[0x71]	1191	1			T90	1		T137	1		T38	1
valid_sources[0x72]	943	1			T19	1		T78	1		T135	1
valid_sources[0x73]	1166	1			T90	1		T139	1		T15	5
valid_sources[0x74]	814	1			T73	1		T143	1		T15	1
valid_sources[0x75]	1359	1			T57	1		T14	4		T44	2
valid_sources[0x76]	1096	1			T22	2		T19	2		T15	1
valid_sources[0x77]	1117	1			T38	1		T155	1		T15	11
valid_sources[0x78]	944	1			T90	1		T38	1		T15	11
valid_sources[0x79]	1023	1			T15	25		T25	1		T141	1
valid_sources[0x7a]	975	1			T19	1		T15	9		T30	2
valid_sources[0x7b]	1209	1			T10	16		T73	12		T15	11
valid_sources[0x7c]	1159	1			T91	2		T15	19		T63	15
valid_sources[0x7d]	1243	1			T145	1		T15	1		T141	1
valid_sources[0x7e]	947	1			T15	24		T16	2		T63	26
valid_sources[0x7f]	1028	1			T129	2		T91	1		T15	13
valid_sources[0x80]	1047	1			T38	1		T44	2		T15	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

68458

1

T6

15

T7

7

T9

6

values[0x0]

all_enables

biggest_size

98656

1

T2

3

T3

1

T23

1

values[0x1]

all_enables

biggest_size

98983

1

T2

1

T24

1

T78

2