Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	34772	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

280286

1

T2

3

T3

33

T4

7

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	100747	1			T2	29		T3	347		T4	49
values[0x0]	105209	1			T12	627		T13	847		T14	291
values[0x1]	109102	1			T12	624		T13	841		T14	308

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16238	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

298820

1

T2

21

T3

198

T4

27

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1428	1			T3	1		T125	1		T144	1
valid_sources[0x01]	1150	1			T3	3		T125	1		T145	1
valid_sources[0x02]	1699	1			T3	2		T5	1		T11	3
valid_sources[0x03]	977	1			T3	1		T125	3		T30	1
valid_sources[0x04]	1628	1			T125	3		T146	3		T12	1
valid_sources[0x05]	1555	1			T125	3		T126	4		T145	1
valid_sources[0x06]	938	1			T2	1		T3	1		T8	5
valid_sources[0x07]	1192	1			T3	1		T5	2		T15	1
valid_sources[0x08]	983	1			T3	1		T11	2		T125	2
valid_sources[0x09]	930	1			T5	3		T16	1		T126	5
valid_sources[0x0a]	1427	1			T4	1		T8	2		T35	1
valid_sources[0x0b]	966	1			T3	2		T125	1		T126	2
valid_sources[0x0c]	1041	1			T3	1		T55	1		T127	1
valid_sources[0x0d]	1296	1			T3	5		T125	1		T126	1
valid_sources[0x0e]	1008	1			T3	1		T5	1		T15	1
valid_sources[0x0f]	1227	1			T3	4		T5	2		T11	1
valid_sources[0x10]	1037	1			T3	1		T11	3		T127	4
valid_sources[0x11]	2174	1			T3	2		T125	2		T126	1
valid_sources[0x12]	1000	1			T3	1		T16	3		T125	1
valid_sources[0x13]	1559	1			T3	1		T20	13		T125	2
valid_sources[0x14]	1169	1			T3	1		T5	8		T11	3
valid_sources[0x15]	1320	1			T3	2		T5	2		T127	3
valid_sources[0x16]	2006	1			T3	5		T16	1		T126	1
valid_sources[0x17]	1155	1			T3	1		T11	7		T56	12
valid_sources[0x18]	2372	1			T129	2		T144	1		T147	1
valid_sources[0x19]	1196	1			T125	1		T35	2		T144	1
valid_sources[0x1a]	1406	1			T11	1		T147	13		T34	2
valid_sources[0x1b]	1444	1			T3	1		T11	1		T125	2
valid_sources[0x1c]	1458	1			T3	5		T4	3		T15	3
valid_sources[0x1d]	963	1			T3	2		T125	2		T127	10
valid_sources[0x1e]	1007	1			T11	1		T126	2		T68	1
valid_sources[0x1f]	1122	1			T3	2		T16	1		T33	3
valid_sources[0x20]	1013	1			T125	3		T35	2		T148	1
valid_sources[0x21]	1017	1			T3	1		T127	1		T30	9
valid_sources[0x22]	1127	1			T3	3		T125	1		T19	6
valid_sources[0x23]	1150	1			T3	2		T125	3		T126	4
valid_sources[0x24]	1146	1			T125	3		T126	3		T129	2
valid_sources[0x25]	1250	1			T2	6		T3	2		T5	1
valid_sources[0x26]	1125	1			T16	1		T125	3		T30	1
valid_sources[0x27]	1606	1			T3	1		T11	1		T125	2
valid_sources[0x28]	1184	1			T3	3		T5	6		T8	1
valid_sources[0x29]	1431	1			T5	5		T125	2		T126	11
valid_sources[0x2a]	1049	1			T5	2		T125	3		T146	2
valid_sources[0x2b]	1616	1			T125	1		T54	60		T147	2
valid_sources[0x2c]	978	1			T3	2		T5	1		T11	7
valid_sources[0x2d]	1313	1			T11	2		T125	2		T126	1
valid_sources[0x2e]	1251	1			T3	1		T5	1		T125	2
valid_sources[0x2f]	1036	1			T3	1		T125	2		T126	1
valid_sources[0x30]	971	1			T3	3		T5	2		T125	1
valid_sources[0x31]	1161	1			T11	1		T147	1		T148	1
valid_sources[0x32]	1579	1			T3	1		T16	1		T125	2
valid_sources[0x33]	1086	1			T8	3		T16	1		T125	1
valid_sources[0x34]	949	1			T3	1		T5	1		T93	1
valid_sources[0x35]	1772	1			T3	2		T11	3		T147	1
valid_sources[0x36]	1374	1			T3	1		T16	1		T30	10
valid_sources[0x37]	973	1			T147	1		T12	2		T149	1
valid_sources[0x38]	1096	1			T11	1		T125	1		T126	2
valid_sources[0x39]	980	1			T3	3		T125	1		T126	1
valid_sources[0x3a]	1723	1			T3	2		T8	4		T125	2
valid_sources[0x3b]	1022	1			T3	1		T5	1		T15	1
valid_sources[0x3c]	1017	1			T3	4		T5	10		T125	1
valid_sources[0x3d]	1453	1			T3	1		T11	3		T127	10
valid_sources[0x3e]	1016	1			T3	3		T5	1		T11	5
valid_sources[0x3f]	1235	1			T3	1		T125	3		T33	6
valid_sources[0x40]	1195	1			T3	2		T5	1		T93	1
valid_sources[0x41]	1056	1			T126	5		T129	1		T33	1
valid_sources[0x42]	1261	1			T3	2		T4	1		T125	2
valid_sources[0x43]	972	1			T8	1		T125	2		T144	1
valid_sources[0x44]	1251	1			T125	1		T30	1		T93	2
valid_sources[0x45]	969	1			T3	1		T126	5		T127	7
valid_sources[0x46]	949	1			T5	2		T144	3		T34	3
valid_sources[0x47]	993	1			T3	1		T8	2		T125	4
valid_sources[0x48]	1361	1			T5	2		T9	15		T16	1
valid_sources[0x49]	1212	1			T3	2		T126	3		T93	2
valid_sources[0x4a]	1171	1			T3	1		T5	4		T8	1
valid_sources[0x4b]	981	1			T3	4		T5	2		T125	1
valid_sources[0x4c]	1071	1			T5	9		T16	1		T125	2
valid_sources[0x4d]	1294	1			T3	2		T5	2		T8	1
valid_sources[0x4e]	1519	1			T5	1		T15	2		T93	2
valid_sources[0x4f]	1317	1			T3	2		T8	1		T11	1
valid_sources[0x50]	1112	1			T5	1		T125	1		T93	3
valid_sources[0x51]	1315	1			T3	4		T125	3		T78	3
valid_sources[0x52]	1130	1			T5	8		T125	1		T127	16
valid_sources[0x53]	1204	1			T125	1		T126	2		T93	4
valid_sources[0x54]	1165	1			T3	2		T126	2		T35	1
valid_sources[0x55]	1428	1			T3	2		T5	1		T20	38
valid_sources[0x56]	956	1			T20	11		T16	1		T125	1
valid_sources[0x57]	995	1			T3	1		T5	6		T11	2
valid_sources[0x58]	1067	1			T3	1		T125	1		T126	9
valid_sources[0x59]	1524	1			T3	2		T129	2		T147	1
valid_sources[0x5a]	1325	1			T5	4		T15	2		T126	5
valid_sources[0x5b]	936	1			T3	1		T11	1		T127	3
valid_sources[0x5c]	1460	1			T3	5		T125	2		T126	13
valid_sources[0x5d]	991	1			T125	2		T128	10		T35	5
valid_sources[0x5e]	1389	1			T3	1		T125	2		T19	2
valid_sources[0x5f]	968	1			T3	2		T125	1		T126	3
valid_sources[0x60]	953	1			T3	1		T125	1		T92	2
valid_sources[0x61]	1474	1			T3	1		T11	4		T15	1
valid_sources[0x62]	1092	1			T3	3		T5	5		T145	1
valid_sources[0x63]	975	1			T3	2		T16	1		T125	2
valid_sources[0x64]	1037	1			T125	1		T92	1		T21	2
valid_sources[0x65]	1258	1			T5	1		T93	3		T147	4
valid_sources[0x66]	1176	1			T3	2		T4	8		T8	7
valid_sources[0x67]	1624	1			T5	4		T15	1		T125	2
valid_sources[0x68]	1300	1			T3	1		T125	1		T127	35
valid_sources[0x69]	1633	1			T55	6		T127	4		T128	15
valid_sources[0x6a]	1377	1			T4	1		T125	1		T126	3
valid_sources[0x6b]	1553	1			T5	1		T20	18		T78	1
valid_sources[0x6c]	1904	1			T3	3		T5	1		T11	3
valid_sources[0x6d]	1233	1			T3	3		T8	2		T126	8
valid_sources[0x6e]	1249	1			T3	3		T16	1		T125	3
valid_sources[0x6f]	981	1			T125	1		T147	1		T146	1
valid_sources[0x70]	1743	1			T3	1		T125	4		T146	1
valid_sources[0x71]	1223	1			T3	2		T16	1		T126	11
valid_sources[0x72]	991	1			T3	1		T4	2		T11	1
valid_sources[0x73]	1140	1			T3	1		T5	2		T125	1
valid_sources[0x74]	1906	1			T11	1		T20	10		T125	2
valid_sources[0x75]	1043	1			T3	1		T8	2		T11	3
valid_sources[0x76]	1111	1			T3	1		T125	1		T129	8
valid_sources[0x77]	1124	1			T3	1		T55	2		T125	2
valid_sources[0x78]	1145	1			T3	3		T125	1		T144	2
valid_sources[0x79]	1779	1			T3	1		T127	2		T144	1
valid_sources[0x7a]	1394	1			T3	2		T125	2		T126	2
valid_sources[0x7b]	1159	1			T3	4		T16	1		T55	6
valid_sources[0x7c]	1301	1			T3	2		T5	1		T125	4
valid_sources[0x7d]	1096	1			T8	4		T93	3		T147	6
valid_sources[0x7e]	1589	1			T3	3		T4	1		T125	1
valid_sources[0x7f]	1923	1			T3	2		T5	1		T11	1
valid_sources[0x80]	1305	1			T3	2		T15	2		T125	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

72306

1

T2

3

T3

33

T4

7

values[0x0]

all_enables

biggest_size

104183

1

T12

619

T13

837

T14

288

values[0x1]

all_enables

biggest_size

103797

1

T12

593

T13

791

T14

294

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	30057	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

254133

1

T1

7

T2

5

T4

11

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	76510	1			T2	16		T4	16		T7	1
values[0x0]	96488	1			T1	9		T6	5		T29	2
values[0x1]	111192	1			T1	8		T6	7		T29	5

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	16085	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

268105

1

T1

9

T2

10

T4

12

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	965	1			T92	16		T81	1		T21	1
valid_sources[0x01]	1012	1			T4	2		T81	3		T21	1
valid_sources[0x02]	1026	1			T12	34		T149	1		T150	1
valid_sources[0x03]	1227	1			T4	3		T12	1		T37	2
valid_sources[0x04]	974	1			T82	2		T12	53		T151	1
valid_sources[0x05]	1356	1			T82	3		T17	12		T57	10
valid_sources[0x06]	934	1			T2	1		T46	1		T151	1
valid_sources[0x07]	1149	1			T152	1		T27	1		T41	3
valid_sources[0x08]	1017	1			T12	1		T17	13		T57	5
valid_sources[0x09]	1307	1			T13	118		T17	14		T57	8
valid_sources[0x0a]	1036	1			T34	3		T12	33		T23	1
valid_sources[0x0b]	962	1			T7	1		T51	1		T12	4
valid_sources[0x0c]	1516	1			T145	1		T12	1		T41	1
valid_sources[0x0d]	1370	1			T151	1		T153	1		T17	6
valid_sources[0x0e]	1100	1			T81	1		T154	3		T12	21
valid_sources[0x0f]	1041	1			T16	1		T81	5		T12	42
valid_sources[0x10]	1260	1			T79	3		T12	1		T17	16
valid_sources[0x11]	943	1			T152	1		T23	1		T17	20
valid_sources[0x12]	897	1			T2	1		T50	1		T155	1
valid_sources[0x13]	1109	1			T4	3		T12	17		T17	23
valid_sources[0x14]	745	1			T151	3		T152	1		T13	23
valid_sources[0x15]	1191	1			T17	19		T57	5		T58	20
valid_sources[0x16]	967	1			T145	1		T12	2		T149	1
valid_sources[0x17]	1358	1			T82	1		T17	19		T57	7
valid_sources[0x18]	1436	1			T17	8		T57	7		T58	21
valid_sources[0x19]	1093	1			T50	1		T12	32		T66	1
valid_sources[0x1a]	879	1			T153	1		T41	1		T17	6
valid_sources[0x1b]	967	1			T12	2		T17	11		T57	9
valid_sources[0x1c]	901	1			T21	1		T12	7		T27	1
valid_sources[0x1d]	1583	1			T19	32		T69	1		T27	2
valid_sources[0x1e]	1554	1			T16	2		T13	289		T17	8
valid_sources[0x1f]	1186	1			T12	10		T151	1		T17	17
valid_sources[0x20]	1008	1			T15	1		T12	3		T13	8
valid_sources[0x21]	1323	1			T12	5		T156	32		T17	19
valid_sources[0x22]	1243	1			T81	1		T12	35		T71	1
valid_sources[0x23]	871	1			T93	22		T12	3		T66	1
valid_sources[0x24]	1497	1			T50	1		T12	1		T151	1
valid_sources[0x25]	1183	1			T12	25		T66	1		T152	1
valid_sources[0x26]	911	1			T80	1		T24	1		T17	13
valid_sources[0x27]	1305	1			T149	1		T153	1		T17	20
valid_sources[0x28]	1097	1			T12	28		T152	1		T14	1
valid_sources[0x29]	980	1			T157	1		T12	7		T17	25
valid_sources[0x2a]	1175	1			T55	1		T36	1		T150	2
valid_sources[0x2b]	1145	1			T145	1		T12	3		T41	1
valid_sources[0x2c]	929	1			T12	2		T17	11		T57	9
valid_sources[0x2d]	1102	1			T12	2		T37	2		T17	13
valid_sources[0x2e]	1256	1			T4	1		T12	6		T153	1
valid_sources[0x2f]	1045	1			T15	5		T21	1		T12	2
valid_sources[0x30]	1111	1			T12	4		T151	1		T17	17
valid_sources[0x31]	1187	1			T12	84		T150	2		T13	185
valid_sources[0x32]	953	1			T21	1		T12	17		T17	6
valid_sources[0x33]	1001	1			T4	1		T12	1		T153	2
valid_sources[0x34]	872	1			T17	14		T57	11		T42	1
valid_sources[0x35]	892	1			T154	7		T153	1		T14	1
valid_sources[0x36]	1024	1			T151	1		T39	2		T17	10
valid_sources[0x37]	1028	1			T27	1		T17	16		T57	11
valid_sources[0x38]	1607	1			T150	1		T23	1		T17	13
valid_sources[0x39]	1580	1			T81	1		T30	10		T82	1
valid_sources[0x3a]	1224	1			T12	8		T13	11		T39	1
valid_sources[0x3b]	1392	1			T15	1		T50	1		T69	1
valid_sources[0x3c]	1015	1			T12	23		T37	1		T17	23
valid_sources[0x3d]	1475	1			T21	1		T151	1		T153	1
valid_sources[0x3e]	1171	1			T16	4		T12	12		T13	212
valid_sources[0x3f]	1209	1			T150	1		T153	1		T39	1
valid_sources[0x40]	749	1			T4	1		T12	3		T153	1
valid_sources[0x41]	997	1			T50	1		T47	1		T12	17
valid_sources[0x42]	852	1			T66	1		T151	1		T152	1
valid_sources[0x43]	1174	1			T55	2		T153	1		T17	5
valid_sources[0x44]	1071	1			T12	28		T151	1		T13	219
valid_sources[0x45]	1047	1			T1	17		T12	28		T153	1
valid_sources[0x46]	1265	1			T153	2		T26	1		T40	1
valid_sources[0x47]	1215	1			T50	1		T12	1		T17	20
valid_sources[0x48]	938	1			T16	2		T12	33		T17	12
valid_sources[0x49]	976	1			T17	18		T57	1		T58	21
valid_sources[0x4a]	1228	1			T145	3		T34	6		T17	14
valid_sources[0x4b]	863	1			T56	1		T145	1		T12	5
valid_sources[0x4c]	984	1			T12	7		T26	1		T41	2
valid_sources[0x4d]	1065	1			T12	3		T151	1		T17	28
valid_sources[0x4e]	1516	1			T50	1		T51	1		T145	1
valid_sources[0x4f]	999	1			T6	2		T12	2		T151	1
valid_sources[0x50]	942	1			T14	2		T17	17		T57	9
valid_sources[0x51]	915	1			T17	17		T57	8		T58	16
valid_sources[0x52]	1245	1			T12	14		T158	9		T13	169
valid_sources[0x53]	1271	1			T12	12		T69	1		T152	1
valid_sources[0x54]	867	1			T17	14		T57	7		T58	13
valid_sources[0x55]	973	1			T21	1		T12	28		T151	1
valid_sources[0x56]	1225	1			T23	1		T27	1		T17	20
valid_sources[0x57]	1062	1			T152	3		T17	8		T57	3
valid_sources[0x58]	977	1			T81	1		T12	3		T17	9
valid_sources[0x59]	1113	1			T2	1		T50	1		T12	1
valid_sources[0x5a]	943	1			T12	50		T66	1		T153	1
valid_sources[0x5b]	1709	1			T21	1		T145	2		T17	16
valid_sources[0x5c]	1182	1			T12	10		T159	1		T13	24
valid_sources[0x5d]	1081	1			T50	1		T160	1		T17	19
valid_sources[0x5e]	1027	1			T15	4		T151	1		T17	11
valid_sources[0x5f]	1141	1			T152	1		T17	28		T57	7
valid_sources[0x60]	769	1			T149	2		T23	1		T17	11
valid_sources[0x61]	847	1			T21	1		T12	1		T152	1
valid_sources[0x62]	1027	1			T161	1		T12	11		T151	2
valid_sources[0x63]	1227	1			T80	2		T12	28		T23	1
valid_sources[0x64]	943	1			T13	1		T17	18		T57	5
valid_sources[0x65]	1254	1			T50	1		T145	1		T69	1
valid_sources[0x66]	1481	1			T12	9		T17	9		T57	5
valid_sources[0x67]	732	1			T34	2		T12	9		T150	1
valid_sources[0x68]	1136	1			T16	1		T155	1		T14	2
valid_sources[0x69]	1208	1			T2	4		T145	1		T12	1
valid_sources[0x6a]	922	1			T154	1		T71	1		T14	1
valid_sources[0x6b]	1393	1			T157	1		T66	1		T152	2
valid_sources[0x6c]	1270	1			T71	1		T17	23		T57	4
valid_sources[0x6d]	1251	1			T4	4		T13	166		T23	1
valid_sources[0x6e]	1087	1			T6	4		T152	3		T13	176
valid_sources[0x6f]	933	1			T12	46		T23	1		T153	1
valid_sources[0x70]	1362	1			T17	13		T57	5		T42	2
valid_sources[0x71]	1179	1			T9	16		T153	1		T14	133
valid_sources[0x72]	1021	1			T10	1		T34	8		T12	1
valid_sources[0x73]	1160	1			T12	1		T152	1		T17	15
valid_sources[0x74]	1438	1			T12	9		T152	4		T13	65
valid_sources[0x75]	1461	1			T151	1		T13	2		T153	1
valid_sources[0x76]	1086	1			T12	32		T25	1		T26	1
valid_sources[0x77]	1162	1			T55	1		T14	95		T17	21
valid_sources[0x78]	1101	1			T12	3		T13	131		T17	11
valid_sources[0x79]	1207	1			T28	1		T83	1		T12	31
valid_sources[0x7a]	997	1			T157	1		T12	11		T69	1
valid_sources[0x7b]	983	1			T12	8		T149	1		T25	3
valid_sources[0x7c]	970	1			T21	1		T69	1		T153	1
valid_sources[0x7d]	1348	1			T66	1		T17	19		T57	11
valid_sources[0x7e]	1067	1			T12	16		T17	9		T57	4
valid_sources[0x7f]	985	1			T157	1		T12	3		T17	23
valid_sources[0x80]	917	1			T37	2		T17	16		T57	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

64965

1

T2

5

T4

11

T7

1

values[0x0]

all_enables

biggest_size

94142

1

T1

5

T6

1

T50

2

values[0x1]

all_enables

biggest_size

95026

1

T1

2

T29

2

T50

1