Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 39146 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 574275 1 T1 11 T3 24 T4 11



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 173370 1 T1 139 T3 240 T4 74
values[0x0] 216105 1 T14 6448 T15 52502 T16 52573
values[0x1] 223946 1 T14 6611 T15 54253 T16 54508



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 19195 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 594226 1 T1 84 T3 133 T4 53



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2629 1 T1 1 T6 12 T14 71
valid_sources[0x01] 2630 1 T1 1 T46 2 T14 65
valid_sources[0x02] 1867 1 T7 5 T78 1 T14 76
valid_sources[0x03] 1964 1 T1 1 T11 1 T14 86
valid_sources[0x04] 2814 1 T5 1 T46 3 T11 2
valid_sources[0x05] 2754 1 T67 2 T11 1 T14 75
valid_sources[0x06] 1881 1 T1 2 T63 3 T67 2
valid_sources[0x07] 2274 1 T8 3 T46 1 T11 1
valid_sources[0x08] 2566 1 T4 3 T14 88 T15 539
valid_sources[0x09] 1872 1 T1 1 T67 4 T14 73
valid_sources[0x0a] 2909 1 T13 31 T46 2 T78 1
valid_sources[0x0b] 2670 1 T46 2 T67 7 T11 1
valid_sources[0x0c] 2453 1 T46 2 T67 1 T78 1
valid_sources[0x0d] 2459 1 T46 4 T67 2 T14 79
valid_sources[0x0e] 3453 1 T4 2 T46 1 T14 63
valid_sources[0x0f] 2104 1 T46 5 T14 81 T15 541
valid_sources[0x10] 2299 1 T63 1 T102 12 T14 76
valid_sources[0x11] 2413 1 T1 2 T7 2 T46 1
valid_sources[0x12] 1902 1 T1 1 T46 2 T63 2
valid_sources[0x13] 2262 1 T1 1 T46 4 T63 1
valid_sources[0x14] 2825 1 T67 1 T11 1 T14 85
valid_sources[0x15] 2021 1 T10 2 T46 4 T67 3
valid_sources[0x16] 2377 1 T46 4 T14 72 T15 624
valid_sources[0x17] 2099 1 T10 1 T46 1 T67 2
valid_sources[0x18] 2645 1 T46 2 T102 20 T14 64
valid_sources[0x19] 2586 1 T46 1 T67 1 T14 60
valid_sources[0x1a] 3302 1 T7 2 T8 5 T46 3
valid_sources[0x1b] 1961 1 T63 4 T67 1 T14 76
valid_sources[0x1c] 1823 1 T1 1 T46 4 T14 72
valid_sources[0x1d] 3077 1 T10 1 T46 2 T14 55
valid_sources[0x1e] 4244 1 T46 1 T14 74 T15 534
valid_sources[0x1f] 2304 1 T46 2 T67 2 T14 75
valid_sources[0x20] 3163 1 T1 1 T10 2 T46 1
valid_sources[0x21] 3456 1 T67 1 T14 75 T15 534
valid_sources[0x22] 4024 1 T46 2 T67 2 T14 64
valid_sources[0x23] 1927 1 T7 1 T46 2 T11 1
valid_sources[0x24] 2212 1 T1 1 T7 1 T67 4
valid_sources[0x25] 3501 1 T46 9 T14 59 T53 1
valid_sources[0x26] 2251 1 T7 1 T46 3 T67 1
valid_sources[0x27] 2055 1 T46 3 T11 1 T14 81
valid_sources[0x28] 1959 1 T3 11 T4 1 T46 2
valid_sources[0x29] 2130 1 T1 2 T13 10 T46 5
valid_sources[0x2a] 1918 1 T4 1 T7 4 T10 1
valid_sources[0x2b] 2587 1 T4 8 T14 60 T15 549
valid_sources[0x2c] 2163 1 T63 1 T67 6 T14 63
valid_sources[0x2d] 1895 1 T1 3 T8 4 T78 1
valid_sources[0x2e] 2241 1 T46 3 T67 1 T14 87
valid_sources[0x2f] 2315 1 T1 2 T4 1 T46 2
valid_sources[0x30] 2252 1 T7 3 T8 2 T78 1
valid_sources[0x31] 1992 1 T1 4 T63 2 T67 1
valid_sources[0x32] 1875 1 T1 3 T67 2 T14 63
valid_sources[0x33] 2346 1 T4 3 T46 2 T14 74
valid_sources[0x34] 2185 1 T7 1 T46 3 T67 4
valid_sources[0x35] 1938 1 T1 3 T46 2 T14 80
valid_sources[0x36] 1984 1 T14 64 T15 580 T58 9
valid_sources[0x37] 3327 1 T4 1 T10 1 T46 1
valid_sources[0x38] 2382 1 T1 2 T10 1 T63 1
valid_sources[0x39] 2006 1 T46 3 T14 62 T15 556
valid_sources[0x3a] 1966 1 T10 2 T46 7 T11 1
valid_sources[0x3b] 2317 1 T3 22 T46 3 T67 2
valid_sources[0x3c] 3210 1 T1 1 T67 4 T11 1
valid_sources[0x3d] 3627 1 T14 68 T15 551 T118 7
valid_sources[0x3e] 2599 1 T1 1 T6 25 T7 1
valid_sources[0x3f] 1874 1 T5 1 T78 1 T14 71
valid_sources[0x40] 2266 1 T4 1 T7 3 T13 10
valid_sources[0x41] 1930 1 T8 1 T46 1 T67 3
valid_sources[0x42] 2510 1 T1 1 T12 1 T46 2
valid_sources[0x43] 1890 1 T4 1 T14 67 T53 1
valid_sources[0x44] 2634 1 T3 27 T7 1 T46 4
valid_sources[0x45] 2481 1 T1 2 T10 1 T46 3
valid_sources[0x46] 1903 1 T46 1 T63 3 T67 2
valid_sources[0x47] 3257 1 T7 2 T46 1 T11 1
valid_sources[0x48] 2126 1 T1 2 T46 4 T78 1
valid_sources[0x49] 2747 1 T1 2 T10 1 T11 1
valid_sources[0x4a] 2375 1 T46 6 T14 67 T15 591
valid_sources[0x4b] 1888 1 T3 32 T46 1 T67 4
valid_sources[0x4c] 3266 1 T1 2 T13 25 T46 1
valid_sources[0x4d] 2013 1 T1 2 T78 6 T14 67
valid_sources[0x4e] 2653 1 T14 53 T15 560 T119 2
valid_sources[0x4f] 2887 1 T1 1 T78 1 T14 75
valid_sources[0x50] 2218 1 T4 5 T46 2 T67 3
valid_sources[0x51] 1901 1 T46 1 T14 66 T15 591
valid_sources[0x52] 3046 1 T63 1 T14 83 T53 1
valid_sources[0x53] 2089 1 T1 1 T11 1 T14 65
valid_sources[0x54] 2899 1 T67 1 T11 2 T78 2
valid_sources[0x55] 2420 1 T1 1 T4 4 T46 1
valid_sources[0x56] 1972 1 T1 1 T10 1 T78 1
valid_sources[0x57] 2381 1 T1 4 T6 38 T46 1
valid_sources[0x58] 2588 1 T1 1 T46 12 T63 1
valid_sources[0x59] 2120 1 T46 2 T67 1 T14 78
valid_sources[0x5a] 2146 1 T1 1 T8 1 T67 2
valid_sources[0x5b] 2799 1 T1 1 T4 1 T10 1
valid_sources[0x5c] 3012 1 T46 7 T11 2 T14 69
valid_sources[0x5d] 2495 1 T10 2 T67 2 T14 78
valid_sources[0x5e] 2165 1 T1 1 T67 2 T11 1
valid_sources[0x5f] 1928 1 T10 1 T46 2 T14 62
valid_sources[0x60] 2704 1 T3 68 T46 2 T63 3
valid_sources[0x61] 2162 1 T8 1 T46 4 T67 2
valid_sources[0x62] 2057 1 T7 3 T46 1 T11 1
valid_sources[0x63] 2217 1 T1 2 T46 6 T11 2
valid_sources[0x64] 2053 1 T1 1 T46 2 T67 2
valid_sources[0x65] 2943 1 T1 3 T46 5 T14 90
valid_sources[0x66] 1960 1 T46 4 T63 1 T14 77
valid_sources[0x67] 1976 1 T1 1 T11 1 T14 69
valid_sources[0x68] 1833 1 T1 1 T10 1 T46 1
valid_sources[0x69] 2173 1 T1 2 T67 1 T78 1
valid_sources[0x6a] 2899 1 T1 1 T46 3 T67 1
valid_sources[0x6b] 1928 1 T1 1 T10 1 T11 3
valid_sources[0x6c] 1971 1 T8 2 T14 72 T15 606
valid_sources[0x6d] 2241 1 T67 5 T11 2 T102 53
valid_sources[0x6e] 1893 1 T10 1 T46 2 T67 1
valid_sources[0x6f] 2223 1 T46 3 T63 1 T67 1
valid_sources[0x70] 2097 1 T14 80 T15 564 T120 1
valid_sources[0x71] 2072 1 T46 2 T14 81 T15 513
valid_sources[0x72] 2813 1 T4 1 T7 5 T10 3
valid_sources[0x73] 1983 1 T7 7 T10 1 T63 1
valid_sources[0x74] 2420 1 T4 3 T14 78 T53 3
valid_sources[0x75] 2185 1 T11 1 T14 80 T15 597
valid_sources[0x76] 2531 1 T1 2 T3 16 T67 2
valid_sources[0x77] 2036 1 T7 1 T8 7 T11 2
valid_sources[0x78] 3432 1 T4 1 T46 8 T102 120
valid_sources[0x79] 2229 1 T7 1 T67 1 T14 67
valid_sources[0x7a] 2633 1 T10 1 T67 1 T14 61
valid_sources[0x7b] 2402 1 T78 1 T14 63 T15 545
valid_sources[0x7c] 2138 1 T10 1 T46 3 T63 1
valid_sources[0x7d] 2328 1 T10 1 T13 10 T46 4
valid_sources[0x7e] 2685 1 T3 33 T46 3 T67 3
valid_sources[0x7f] 3503 1 T67 3 T14 76 T53 1
valid_sources[0x80] 1814 1 T1 1 T46 3 T14 59



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 146023 1 T1 11 T3 24 T4 11
values[0x0] all_enables biggest_size 214163 1 T14 6386 T15 52021 T16 52133
values[0x1] all_enables biggest_size 214089 1 T14 6292 T15 51891 T16 52082


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 49836 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 464465 1 T1 29 T2 1 T4 12



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 131768 1 T1 64 T2 1 T4 32
values[0x0] 177681 1 T9 4 T33 15 T34 5
values[0x1] 204852 1 T9 5 T33 6 T34 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 24108 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 490193 1 T1 35 T2 1 T4 17



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2157 1 T14 93 T15 486 T120 1
valid_sources[0x01] 2037 1 T1 2 T4 1 T33 21
valid_sources[0x02] 1911 1 T14 68 T15 477 T121 2
valid_sources[0x03] 1901 1 T14 74 T15 499 T122 1
valid_sources[0x04] 1960 1 T14 39 T15 444 T57 1
valid_sources[0x05] 2109 1 T4 1 T14 9 T15 502
valid_sources[0x06] 2219 1 T14 88 T15 441 T123 1
valid_sources[0x07] 1921 1 T14 65 T15 441 T117 8
valid_sources[0x08] 2085 1 T78 2 T14 37 T15 495
valid_sources[0x09] 2034 1 T4 1 T5 1 T14 20
valid_sources[0x0a] 1936 1 T14 89 T53 1 T15 443
valid_sources[0x0b] 2162 1 T14 125 T15 452 T29 1
valid_sources[0x0c] 2151 1 T14 270 T15 430 T21 4
valid_sources[0x0d] 1970 1 T5 1 T66 1 T14 9
valid_sources[0x0e] 2151 1 T14 119 T15 477 T42 1
valid_sources[0x0f] 1795 1 T63 2 T14 43 T15 446
valid_sources[0x10] 2399 1 T1 2 T14 35 T15 452
valid_sources[0x11] 2021 1 T4 5 T14 75 T15 471
valid_sources[0x12] 2052 1 T14 30 T15 460 T124 1
valid_sources[0x13] 2057 1 T78 2 T14 26 T15 514
valid_sources[0x14] 2016 1 T78 1 T14 135 T15 474
valid_sources[0x15] 1997 1 T10 3 T14 50 T54 1
valid_sources[0x16] 2149 1 T5 1 T28 1 T14 120
valid_sources[0x17] 1732 1 T66 3 T14 51 T15 453
valid_sources[0x18] 1889 1 T14 79 T15 483 T29 2
valid_sources[0x19] 2095 1 T14 156 T15 490 T120 1
valid_sources[0x1a] 1983 1 T10 1 T14 23 T15 468
valid_sources[0x1b] 1922 1 T14 18 T15 487 T119 1
valid_sources[0x1c] 1745 1 T14 126 T15 405 T22 1
valid_sources[0x1d] 1827 1 T14 92 T15 467 T119 5
valid_sources[0x1e] 2032 1 T5 1 T14 82 T53 1
valid_sources[0x1f] 1884 1 T14 50 T15 473 T120 1
valid_sources[0x20] 2200 1 T14 115 T15 480 T81 2
valid_sources[0x21] 2065 1 T2 1 T66 1 T14 104
valid_sources[0x22] 1842 1 T14 12 T15 462 T55 1
valid_sources[0x23] 2163 1 T12 1 T14 15 T15 473
valid_sources[0x24] 1833 1 T14 1 T15 460 T124 2
valid_sources[0x25] 1843 1 T1 1 T4 1 T11 32
valid_sources[0x26] 1853 1 T14 24 T15 471 T125 1
valid_sources[0x27] 1994 1 T1 1 T28 1 T66 4
valid_sources[0x28] 1881 1 T1 1 T14 18 T15 423
valid_sources[0x29] 1942 1 T14 115 T15 451 T29 1
valid_sources[0x2a] 2046 1 T14 20 T15 487 T121 1
valid_sources[0x2b] 1953 1 T14 155 T15 445 T120 3
valid_sources[0x2c] 1970 1 T12 5 T78 1 T14 72
valid_sources[0x2d] 2074 1 T1 1 T10 3 T14 124
valid_sources[0x2e] 2279 1 T1 1 T14 78 T15 473
valid_sources[0x2f] 2342 1 T5 2 T14 65 T15 464
valid_sources[0x30] 1952 1 T14 148 T15 463 T121 1
valid_sources[0x31] 2190 1 T10 2 T14 114 T15 482
valid_sources[0x32] 2035 1 T28 1 T63 2 T25 1
valid_sources[0x33] 1825 1 T14 68 T15 512 T80 1
valid_sources[0x34] 2096 1 T1 3 T14 119 T15 503
valid_sources[0x35] 2135 1 T14 290 T15 454 T120 1
valid_sources[0x36] 2005 1 T14 20 T15 499 T120 1
valid_sources[0x37] 2126 1 T10 1 T63 2 T14 29
valid_sources[0x38] 1995 1 T1 1 T9 9 T28 2
valid_sources[0x39] 1736 1 T1 1 T14 74 T15 467
valid_sources[0x3a] 2120 1 T28 2 T63 1 T14 96
valid_sources[0x3b] 1988 1 T14 31 T15 454 T120 1
valid_sources[0x3c] 2054 1 T14 30 T15 507 T126 1
valid_sources[0x3d] 2030 1 T1 3 T5 1 T14 176
valid_sources[0x3e] 2044 1 T14 43 T15 425 T55 2
valid_sources[0x3f] 2023 1 T78 1 T14 55 T15 448
valid_sources[0x40] 1889 1 T14 5 T15 486 T123 3
valid_sources[0x41] 1782 1 T1 2 T14 5 T15 469
valid_sources[0x42] 2197 1 T1 1 T14 99 T15 476
valid_sources[0x43] 2201 1 T4 1 T14 94 T15 501
valid_sources[0x44] 2103 1 T28 2 T14 65 T53 1
valid_sources[0x45] 1929 1 T78 1 T14 30 T15 483
valid_sources[0x46] 2190 1 T14 94 T15 451 T120 2
valid_sources[0x47] 2188 1 T5 2 T12 3 T14 29
valid_sources[0x48] 1678 1 T5 1 T127 1 T14 26
valid_sources[0x49] 2025 1 T14 50 T15 460 T120 2
valid_sources[0x4a] 1872 1 T14 51 T15 493 T121 1
valid_sources[0x4b] 1803 1 T5 1 T14 25 T15 445
valid_sources[0x4c] 1878 1 T14 27 T53 1 T15 470
valid_sources[0x4d] 2362 1 T14 5 T53 2 T15 472
valid_sources[0x4e] 1894 1 T12 2 T14 86 T15 453
valid_sources[0x4f] 2107 1 T10 1 T14 117 T15 500
valid_sources[0x50] 1939 1 T14 72 T27 6 T15 456
valid_sources[0x51] 2009 1 T14 17 T15 440 T55 1
valid_sources[0x52] 2082 1 T14 62 T15 499 T128 5
valid_sources[0x53] 1674 1 T14 22 T15 429 T125 1
valid_sources[0x54] 2189 1 T14 141 T15 460 T83 1
valid_sources[0x55] 2031 1 T4 1 T14 117 T15 489
valid_sources[0x56] 1918 1 T14 23 T15 470 T117 7
valid_sources[0x57] 2260 1 T14 68 T15 465 T29 1
valid_sources[0x58] 1924 1 T63 1 T14 17 T15 482
valid_sources[0x59] 2062 1 T1 1 T14 46 T15 424
valid_sources[0x5a] 2103 1 T4 1 T14 99 T15 448
valid_sources[0x5b] 1980 1 T14 14 T27 1 T15 481
valid_sources[0x5c] 1853 1 T4 1 T14 92 T15 475
valid_sources[0x5d] 1893 1 T4 2 T14 50 T15 460
valid_sources[0x5e] 2005 1 T1 2 T14 2 T15 464
valid_sources[0x5f] 1889 1 T1 1 T14 11 T15 482
valid_sources[0x60] 2124 1 T1 1 T14 110 T27 3
valid_sources[0x61] 1819 1 T14 97 T15 469 T120 3
valid_sources[0x62] 1976 1 T14 5 T15 421 T120 1
valid_sources[0x63] 1894 1 T7 32 T14 109 T27 6
valid_sources[0x64] 1832 1 T14 51 T15 495 T120 1
valid_sources[0x65] 1920 1 T14 13 T53 1 T15 506
valid_sources[0x66] 2447 1 T14 15 T15 499 T81 1
valid_sources[0x67] 1963 1 T14 49 T15 476 T120 2
valid_sources[0x68] 2065 1 T4 1 T14 76 T15 471
valid_sources[0x69] 2272 1 T5 1 T14 103 T53 1
valid_sources[0x6a] 2054 1 T14 34 T15 459 T81 1
valid_sources[0x6b] 2013 1 T10 4 T28 1 T14 43
valid_sources[0x6c] 1940 1 T14 27 T15 484 T43 1
valid_sources[0x6d] 1850 1 T12 2 T14 47 T15 465
valid_sources[0x6e] 1833 1 T14 42 T15 489 T119 4
valid_sources[0x6f] 1870 1 T1 2 T10 1 T78 1
valid_sources[0x70] 2045 1 T14 98 T15 477 T21 6
valid_sources[0x71] 1981 1 T5 3 T14 100 T15 484
valid_sources[0x72] 1945 1 T14 19 T15 459 T121 1
valid_sources[0x73] 1896 1 T26 1 T14 58 T15 460
valid_sources[0x74] 1868 1 T14 1 T15 474 T119 4
valid_sources[0x75] 2242 1 T5 1 T14 69 T15 468
valid_sources[0x76] 1809 1 T14 23 T15 466 T79 4
valid_sources[0x77] 2119 1 T34 8 T14 75 T15 457
valid_sources[0x78] 2021 1 T14 62 T15 463 T119 2
valid_sources[0x79] 1717 1 T1 1 T14 43 T15 431
valid_sources[0x7a] 2505 1 T28 2 T14 4 T53 3
valid_sources[0x7b] 2157 1 T1 5 T14 105 T15 460
valid_sources[0x7c] 1941 1 T1 4 T14 11 T15 441
valid_sources[0x7d] 1914 1 T1 1 T28 1 T14 108
valid_sources[0x7e] 2018 1 T14 87 T15 480 T120 2
valid_sources[0x7f] 1870 1 T1 1 T10 2 T14 68
valid_sources[0x80] 1849 1 T63 1 T14 24 T15 473



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 117480 1 T1 29 T2 1 T4 12
values[0x0] all_enables biggest_size 173667 1 T9 1 T33 3 T34 3
values[0x1] all_enables biggest_size 173318 1 T9 1 T34 1 T64 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%