Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 43928 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 755150 1 T2 31 T3 14 T9 6



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 219040 1 T2 286 T3 178 T9 66
values[0x0] 285016 1 T20 23342 T21 72955 T22 6783
values[0x1] 295022 1 T20 24415 T21 75194 T22 7014



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 21666 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 777412 1 T2 177 T3 109 T9 41



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2950 1 T3 1 T18 5 T20 234
valid_sources[0x01] 2767 1 T2 1 T3 1 T9 1
valid_sources[0x02] 2766 1 T18 1 T105 2 T20 310
valid_sources[0x03] 3113 1 T106 2 T20 200 T40 1
valid_sources[0x04] 3181 1 T3 1 T18 3 T106 1
valid_sources[0x05] 3293 1 T9 1 T105 1 T106 3
valid_sources[0x06] 3833 1 T18 1 T106 2 T20 286
valid_sources[0x07] 2858 1 T3 1 T105 1 T106 2
valid_sources[0x08] 2944 1 T2 8 T3 1 T18 2
valid_sources[0x09] 2876 1 T18 1 T12 4 T105 1
valid_sources[0x0a] 3105 1 T2 5 T9 3 T106 1
valid_sources[0x0b] 2905 1 T109 2 T126 3 T20 363
valid_sources[0x0c] 3004 1 T3 1 T18 2 T12 3
valid_sources[0x0d] 2931 1 T2 15 T18 3 T105 1
valid_sources[0x0e] 3041 1 T2 2 T3 3 T17 1
valid_sources[0x0f] 3268 1 T11 4 T12 2 T105 2
valid_sources[0x10] 2696 1 T17 2 T105 1 T106 6
valid_sources[0x11] 3215 1 T2 1 T105 2 T20 204
valid_sources[0x12] 2806 1 T16 11 T17 3 T105 2
valid_sources[0x13] 2889 1 T18 5 T109 1 T13 3
valid_sources[0x14] 2979 1 T3 2 T17 1 T12 2
valid_sources[0x15] 3283 1 T3 1 T18 2 T20 172
valid_sources[0x16] 2849 1 T12 1 T105 1 T106 3
valid_sources[0x17] 3272 1 T18 4 T12 1 T109 1
valid_sources[0x18] 2907 1 T9 1 T106 1 T13 15
valid_sources[0x19] 2929 1 T20 238 T57 2 T40 3
valid_sources[0x1a] 3036 1 T2 1 T3 1 T9 2
valid_sources[0x1b] 2695 1 T3 2 T17 11 T18 3
valid_sources[0x1c] 3099 1 T3 2 T9 1 T18 2
valid_sources[0x1d] 2926 1 T3 1 T105 1 T20 176
valid_sources[0x1e] 2773 1 T11 3 T20 188 T57 1
valid_sources[0x1f] 3706 1 T3 1 T18 5 T11 4
valid_sources[0x20] 2886 1 T105 2 T13 5 T20 326
valid_sources[0x21] 3293 1 T18 2 T106 1 T109 1
valid_sources[0x22] 4775 1 T3 2 T18 2 T105 1
valid_sources[0x23] 2858 1 T3 1 T17 2 T18 2
valid_sources[0x24] 3281 1 T18 1 T106 1 T20 147
valid_sources[0x25] 3789 1 T2 3 T12 1 T20 298
valid_sources[0x26] 2740 1 T3 2 T12 3 T105 3
valid_sources[0x27] 2763 1 T9 3 T20 224 T58 1
valid_sources[0x28] 2784 1 T17 6 T20 306 T57 1
valid_sources[0x29] 3137 1 T105 1 T126 1 T20 186
valid_sources[0x2a] 3415 1 T3 1 T9 1 T18 1
valid_sources[0x2b] 3110 1 T105 1 T20 263 T40 1
valid_sources[0x2c] 3058 1 T17 3 T12 2 T105 2
valid_sources[0x2d] 2703 1 T3 1 T9 1 T12 2
valid_sources[0x2e] 2900 1 T3 1 T18 1 T105 1
valid_sources[0x2f] 2743 1 T18 1 T105 1 T106 1
valid_sources[0x30] 2958 1 T18 2 T105 2 T126 1
valid_sources[0x31] 4008 1 T3 2 T17 14 T18 2
valid_sources[0x32] 2755 1 T18 2 T106 1 T109 3
valid_sources[0x33] 2787 1 T3 1 T105 1 T106 1
valid_sources[0x34] 3545 1 T2 1 T3 5 T11 3
valid_sources[0x35] 3317 1 T18 4 T105 3 T106 3
valid_sources[0x36] 3376 1 T3 1 T17 7 T105 1
valid_sources[0x37] 2799 1 T2 1 T3 2 T20 274
valid_sources[0x38] 3029 1 T105 1 T109 2 T20 305
valid_sources[0x39] 3124 1 T17 2 T18 3 T106 1
valid_sources[0x3a] 3084 1 T17 3 T18 4 T126 2
valid_sources[0x3b] 3120 1 T3 2 T17 1 T109 2
valid_sources[0x3c] 3447 1 T20 205 T58 2 T36 1
valid_sources[0x3d] 3604 1 T2 1 T12 2 T106 2
valid_sources[0x3e] 3095 1 T17 2 T106 1 T109 1
valid_sources[0x3f] 2836 1 T2 5 T9 1 T105 1
valid_sources[0x40] 3933 1 T18 2 T105 1 T20 312
valid_sources[0x41] 2831 1 T106 1 T20 249 T57 2
valid_sources[0x42] 3098 1 T17 6 T106 3 T20 226
valid_sources[0x43] 2686 1 T105 1 T106 3 T20 250
valid_sources[0x44] 3409 1 T3 1 T17 3 T105 3
valid_sources[0x45] 3161 1 T12 1 T105 2 T126 1
valid_sources[0x46] 2740 1 T3 2 T105 2 T106 2
valid_sources[0x47] 2867 1 T3 1 T12 2 T105 1
valid_sources[0x48] 2840 1 T3 1 T9 1 T105 1
valid_sources[0x49] 2990 1 T3 2 T12 5 T105 1
valid_sources[0x4a] 2817 1 T12 2 T20 192 T57 1
valid_sources[0x4b] 2906 1 T9 1 T17 3 T18 2
valid_sources[0x4c] 3104 1 T3 1 T105 1 T20 243
valid_sources[0x4d] 3077 1 T17 3 T18 2 T105 1
valid_sources[0x4e] 3352 1 T3 2 T18 5 T105 2
valid_sources[0x4f] 3188 1 T105 2 T106 2 T20 193
valid_sources[0x50] 3208 1 T17 1 T18 3 T105 1
valid_sources[0x51] 3557 1 T2 10 T18 1 T12 1
valid_sources[0x52] 4554 1 T2 15 T3 5 T20 183
valid_sources[0x53] 3325 1 T3 1 T17 2 T20 170
valid_sources[0x54] 4278 1 T2 1 T105 3 T48 3
valid_sources[0x55] 3320 1 T3 3 T105 1 T106 3
valid_sources[0x56] 3029 1 T3 1 T9 1 T12 1
valid_sources[0x57] 2772 1 T3 4 T14 1 T18 6
valid_sources[0x58] 2729 1 T9 1 T17 1 T18 1
valid_sources[0x59] 3010 1 T3 2 T17 3 T13 28
valid_sources[0x5a] 3010 1 T9 1 T18 1 T11 2
valid_sources[0x5b] 3887 1 T3 3 T17 2 T106 1
valid_sources[0x5c] 3018 1 T12 2 T105 1 T20 228
valid_sources[0x5d] 3341 1 T3 1 T20 316 T57 1
valid_sources[0x5e] 2752 1 T12 1 T20 343 T57 2
valid_sources[0x5f] 2671 1 T2 7 T20 195 T57 1
valid_sources[0x60] 2816 1 T18 2 T105 2 T109 5
valid_sources[0x61] 2863 1 T3 2 T18 5 T106 1
valid_sources[0x62] 3328 1 T9 1 T17 1 T106 2
valid_sources[0x63] 3202 1 T3 1 T12 2 T105 2
valid_sources[0x64] 3554 1 T17 1 T20 287 T57 2
valid_sources[0x65] 2847 1 T9 1 T17 8 T20 253
valid_sources[0x66] 2982 1 T18 5 T106 2 T126 2
valid_sources[0x67] 2954 1 T9 1 T105 1 T106 3
valid_sources[0x68] 3042 1 T3 1 T18 3 T20 193
valid_sources[0x69] 2845 1 T9 1 T105 3 T106 2
valid_sources[0x6a] 2643 1 T2 3 T3 3 T18 11
valid_sources[0x6b] 3641 1 T3 1 T18 2 T105 2
valid_sources[0x6c] 4158 1 T20 167 T57 2 T58 3
valid_sources[0x6d] 3108 1 T3 2 T12 2 T20 209
valid_sources[0x6e] 2914 1 T9 1 T105 1 T106 4
valid_sources[0x6f] 2780 1 T3 2 T105 2 T126 1
valid_sources[0x70] 2863 1 T105 1 T106 2 T20 246
valid_sources[0x71] 3104 1 T3 1 T9 1 T20 194
valid_sources[0x72] 2659 1 T106 1 T126 1 T20 203
valid_sources[0x73] 2835 1 T18 2 T28 6 T20 282
valid_sources[0x74] 2861 1 T3 1 T17 5 T18 3
valid_sources[0x75] 2712 1 T3 2 T17 9 T18 1
valid_sources[0x76] 2787 1 T3 1 T12 1 T126 1
valid_sources[0x77] 3383 1 T3 8 T17 4 T106 1
valid_sources[0x78] 3462 1 T3 1 T105 1 T20 241
valid_sources[0x79] 3085 1 T2 3 T105 1 T106 3
valid_sources[0x7a] 3784 1 T17 5 T107 20 T20 353
valid_sources[0x7b] 2872 1 T3 1 T17 1 T18 3
valid_sources[0x7c] 2978 1 T18 5 T105 1 T20 245
valid_sources[0x7d] 3077 1 T3 1 T105 1 T13 4
valid_sources[0x7e] 3410 1 T2 9 T18 3 T12 1
valid_sources[0x7f] 2819 1 T17 3 T105 1 T106 1
valid_sources[0x80] 3284 1 T3 1 T17 1 T20 256



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 190624 1 T2 31 T3 14 T9 6
values[0x0] all_enables biggest_size 282491 1 T20 23116 T21 72360 T22 6727
values[0x1] all_enables biggest_size 282035 1 T20 23371 T21 71847 T22 6701


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 61786 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 577907 1 T1 15 T2 66 T4 1



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 163454 1 T1 31 T2 128 T4 1
values[0x0] 220656 1 T6 1 T8 2 T32 3
values[0x1] 255583 1 T6 3 T8 2 T32 4



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 29057 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 610636 1 T1 15 T2 84 T4 1



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 2525 1 T2 1 T18 1 T20 204
valid_sources[0x01] 2768 1 T2 1 T108 1 T20 205
valid_sources[0x02] 2452 1 T7 1 T20 165 T81 1
valid_sources[0x03] 2169 1 T2 2 T108 1 T20 189
valid_sources[0x04] 2584 1 T17 1 T20 197 T81 3
valid_sources[0x05] 2379 1 T2 3 T18 1 T20 193
valid_sources[0x06] 2447 1 T17 1 T20 226 T58 1
valid_sources[0x07] 2284 1 T7 1 T70 1 T20 216
valid_sources[0x08] 2346 1 T11 1 T109 2 T20 212
valid_sources[0x09] 2468 1 T11 2 T20 211 T44 2
valid_sources[0x0a] 2541 1 T2 3 T17 1 T18 2
valid_sources[0x0b] 2614 1 T1 1 T20 203 T21 665
valid_sources[0x0c] 2541 1 T18 1 T20 179 T58 1
valid_sources[0x0d] 2336 1 T2 1 T13 3 T20 203
valid_sources[0x0e] 2828 1 T108 1 T20 201 T81 2
valid_sources[0x0f] 2413 1 T2 1 T18 3 T20 186
valid_sources[0x10] 2319 1 T2 2 T17 1 T11 1
valid_sources[0x11] 2575 1 T2 1 T18 2 T20 160
valid_sources[0x12] 2585 1 T9 1 T109 3 T20 246
valid_sources[0x13] 2288 1 T1 1 T17 1 T18 1
valid_sources[0x14] 2542 1 T20 190 T81 2 T127 1
valid_sources[0x15] 2430 1 T17 1 T18 1 T108 2
valid_sources[0x16] 2657 1 T1 1 T2 1 T20 189
valid_sources[0x17] 2302 1 T18 1 T20 185 T41 1
valid_sources[0x18] 2490 1 T17 1 T18 1 T20 167
valid_sources[0x19] 2643 1 T7 1 T17 1 T11 2
valid_sources[0x1a] 2192 1 T17 1 T20 206 T35 7
valid_sources[0x1b] 2665 1 T18 2 T13 5 T20 210
valid_sources[0x1c] 2428 1 T2 1 T18 1 T32 3
valid_sources[0x1d] 2463 1 T2 2 T4 1 T17 2
valid_sources[0x1e] 2540 1 T11 1 T20 195 T58 2
valid_sources[0x1f] 2769 1 T1 1 T17 1 T20 211
valid_sources[0x20] 2495 1 T20 186 T83 1 T21 651
valid_sources[0x21] 2431 1 T7 4 T18 1 T20 205
valid_sources[0x22] 2352 1 T20 184 T83 2 T21 585
valid_sources[0x23] 2283 1 T2 1 T7 1 T20 209
valid_sources[0x24] 2463 1 T20 202 T128 29 T129 1
valid_sources[0x25] 2365 1 T2 2 T17 1 T20 218
valid_sources[0x26] 2355 1 T17 2 T20 174 T81 1
valid_sources[0x27] 2340 1 T18 1 T20 200 T36 2
valid_sources[0x28] 2472 1 T17 1 T18 3 T20 182
valid_sources[0x29] 2276 1 T2 1 T20 195 T21 547
valid_sources[0x2a] 2446 1 T109 2 T20 199 T60 3
valid_sources[0x2b] 2444 1 T2 1 T20 198 T44 1
valid_sources[0x2c] 2688 1 T2 1 T9 3 T18 1
valid_sources[0x2d] 2508 1 T1 1 T17 1 T18 1
valid_sources[0x2e] 2354 1 T17 1 T18 1 T20 175
valid_sources[0x2f] 2304 1 T20 211 T46 2 T21 495
valid_sources[0x30] 2614 1 T20 200 T130 1 T21 609
valid_sources[0x31] 2393 1 T18 1 T13 1 T20 232
valid_sources[0x32] 2591 1 T2 1 T20 219 T58 2
valid_sources[0x33] 2445 1 T1 3 T2 2 T20 196
valid_sources[0x34] 2413 1 T18 1 T20 184 T36 3
valid_sources[0x35] 2549 1 T18 1 T20 190 T21 698
valid_sources[0x36] 2453 1 T17 1 T20 209 T21 624
valid_sources[0x37] 2461 1 T2 1 T14 30 T17 1
valid_sources[0x38] 2494 1 T2 1 T18 1 T20 206
valid_sources[0x39] 2375 1 T17 1 T18 1 T20 180
valid_sources[0x3a] 2518 1 T17 3 T20 176 T58 1
valid_sources[0x3b] 2488 1 T2 1 T17 2 T18 1
valid_sources[0x3c] 2445 1 T1 1 T7 1 T17 1
valid_sources[0x3d] 2670 1 T2 1 T18 1 T20 183
valid_sources[0x3e] 2822 1 T17 1 T20 210 T127 5
valid_sources[0x3f] 3016 1 T20 194 T21 700 T22 382
valid_sources[0x40] 2797 1 T17 1 T18 1 T20 204
valid_sources[0x41] 2423 1 T18 3 T20 206 T58 2
valid_sources[0x42] 2366 1 T20 174 T58 2 T21 568
valid_sources[0x43] 2202 1 T20 203 T83 1 T21 503
valid_sources[0x44] 2427 1 T20 227 T128 17 T45 1
valid_sources[0x45] 2358 1 T20 198 T81 2 T21 533
valid_sources[0x46] 2401 1 T1 1 T18 1 T11 1
valid_sources[0x47] 2282 1 T1 1 T27 1 T17 1
valid_sources[0x48] 2628 1 T2 2 T18 1 T20 179
valid_sources[0x49] 2762 1 T2 1 T18 2 T20 196
valid_sources[0x4a] 2470 1 T13 1 T20 228 T58 4
valid_sources[0x4b] 2263 1 T18 1 T108 1 T20 213
valid_sources[0x4c] 2805 1 T11 1 T109 2 T20 190
valid_sources[0x4d] 2703 1 T2 1 T20 210 T46 1
valid_sources[0x4e] 2372 1 T9 1 T17 1 T18 2
valid_sources[0x4f] 2714 1 T2 1 T109 1 T20 219
valid_sources[0x50] 2463 1 T2 1 T18 2 T15 12
valid_sources[0x51] 2554 1 T20 191 T21 702 T49 323
valid_sources[0x52] 2381 1 T2 3 T20 185 T131 1
valid_sources[0x53] 2321 1 T18 1 T20 209 T132 1
valid_sources[0x54] 2536 1 T18 2 T11 1 T20 191
valid_sources[0x55] 2296 1 T17 1 T20 185 T60 3
valid_sources[0x56] 2326 1 T11 2 T109 3 T20 212
valid_sources[0x57] 2526 1 T18 2 T108 1 T20 198
valid_sources[0x58] 2659 1 T2 1 T17 1 T20 202
valid_sources[0x59] 2531 1 T2 2 T8 4 T18 1
valid_sources[0x5a] 2498 1 T2 1 T20 222 T81 2
valid_sources[0x5b] 2530 1 T1 1 T2 3 T20 202
valid_sources[0x5c] 2456 1 T1 1 T17 1 T11 1
valid_sources[0x5d] 2657 1 T2 1 T12 32 T20 177
valid_sources[0x5e] 2299 1 T2 1 T20 185 T58 1
valid_sources[0x5f] 2352 1 T18 6 T109 3 T20 208
valid_sources[0x60] 2545 1 T2 1 T9 1 T11 1
valid_sources[0x61] 2604 1 T18 1 T20 213 T35 4
valid_sources[0x62] 2423 1 T17 1 T20 198 T58 2
valid_sources[0x63] 2532 1 T18 2 T20 195 T21 701
valid_sources[0x64] 2345 1 T108 1 T20 198 T83 2
valid_sources[0x65] 2278 1 T2 2 T20 203 T46 1
valid_sources[0x66] 2333 1 T2 1 T7 1 T11 1
valid_sources[0x67] 2734 1 T20 177 T37 1 T41 1
valid_sources[0x68] 2242 1 T1 1 T2 1 T17 1
valid_sources[0x69] 2594 1 T17 1 T20 177 T81 1
valid_sources[0x6a] 2541 1 T2 1 T7 1 T9 1
valid_sources[0x6b] 2484 1 T2 1 T11 1 T20 242
valid_sources[0x6c] 2365 1 T9 1 T17 1 T20 211
valid_sources[0x6d] 2632 1 T9 1 T18 1 T11 1
valid_sources[0x6e] 2324 1 T7 1 T20 175 T58 1
valid_sources[0x6f] 2475 1 T2 2 T18 1 T20 202
valid_sources[0x70] 2412 1 T2 3 T10 1 T20 222
valid_sources[0x71] 2491 1 T2 2 T7 4 T17 1
valid_sources[0x72] 2359 1 T7 1 T109 1 T20 188
valid_sources[0x73] 2382 1 T18 2 T108 1 T20 188
valid_sources[0x74] 2536 1 T20 167 T36 1 T21 686
valid_sources[0x75] 2516 1 T1 3 T7 1 T17 1
valid_sources[0x76] 2735 1 T20 214 T46 1 T83 1
valid_sources[0x77] 2235 1 T20 163 T129 1 T132 1
valid_sources[0x78] 2345 1 T20 196 T21 514 T49 303
valid_sources[0x79] 2324 1 T17 1 T20 231 T21 473
valid_sources[0x7a] 2709 1 T108 1 T20 186 T81 2
valid_sources[0x7b] 2455 1 T2 2 T9 2 T20 168
valid_sources[0x7c] 2530 1 T18 1 T20 178 T45 1
valid_sources[0x7d] 2597 1 T2 1 T17 2 T18 2
valid_sources[0x7e] 2645 1 T2 2 T20 161 T81 8
valid_sources[0x7f] 2344 1 T20 164 T36 1 T41 2
valid_sources[0x80] 2502 1 T9 2 T11 1 T28 15



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 147074 1 T1 15 T2 66 T4 1
values[0x0] all_enables biggest_size 215806 1 T32 3 T20 16984 T37 3
values[0x1] all_enables biggest_size 215027 1 T8 2 T20 16894 T41 3

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