Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 47421 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 971325 1 T1 7 T2 3 T3 18



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 273060 1 T1 133 T2 3 T3 231
values[0x0] 366143 1 T17 22361 T18 69793 T19 14970
values[0x1] 379543 1 T17 22773 T18 72246 T19 15612



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 23942 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 994804 1 T1 78 T2 3 T3 117



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 4671 1 T75 2 T109 4 T124 6
valid_sources[0x01] 3940 1 T10 1 T74 2 T75 1
valid_sources[0x02] 4718 1 T31 2 T87 2 T109 27
valid_sources[0x03] 3555 1 T64 4 T125 6 T17 268
valid_sources[0x04] 5535 1 T75 1 T90 2 T126 3
valid_sources[0x05] 3085 1 T87 2 T127 1 T17 255
valid_sources[0x06] 4379 1 T1 7 T10 1 T11 2
valid_sources[0x07] 4078 1 T74 4 T90 1 T17 204
valid_sources[0x08] 2990 1 T13 1 T64 2 T17 215
valid_sources[0x09] 6198 1 T2 1 T75 2 T64 10
valid_sources[0x0a] 3715 1 T7 11 T8 11 T10 1
valid_sources[0x0b] 2932 1 T1 7 T13 1 T74 2
valid_sources[0x0c] 5392 1 T4 3 T75 2 T87 1
valid_sources[0x0d] 3566 1 T13 1 T90 1 T17 264
valid_sources[0x0e] 4343 1 T74 2 T90 1 T17 209
valid_sources[0x0f] 4252 1 T10 2 T74 1 T128 4
valid_sources[0x10] 3900 1 T109 14 T12 2 T17 237
valid_sources[0x11] 3686 1 T75 3 T87 2 T64 1
valid_sources[0x12] 4209 1 T74 1 T75 2 T87 1
valid_sources[0x13] 4629 1 T15 3 T74 2 T109 13
valid_sources[0x14] 4813 1 T13 1 T74 2 T75 5
valid_sources[0x15] 3190 1 T13 1 T75 1 T87 1
valid_sources[0x16] 3781 1 T1 1 T12 1 T17 228
valid_sources[0x17] 4634 1 T3 20 T75 1 T90 1
valid_sources[0x18] 3047 1 T125 14 T17 245 T25 4
valid_sources[0x19] 3188 1 T10 1 T87 1 T109 13
valid_sources[0x1a] 4281 1 T10 1 T11 2 T126 13
valid_sources[0x1b] 3488 1 T10 2 T13 1 T127 2
valid_sources[0x1c] 4152 1 T13 2 T74 1 T75 1
valid_sources[0x1d] 3875 1 T7 38 T13 1 T87 1
valid_sources[0x1e] 4017 1 T11 2 T126 12 T17 224
valid_sources[0x1f] 3871 1 T13 2 T75 2 T127 2
valid_sources[0x20] 4070 1 T13 2 T109 8 T17 268
valid_sources[0x21] 3694 1 T1 6 T12 5 T90 1
valid_sources[0x22] 5383 1 T10 1 T74 2 T124 1
valid_sources[0x23] 3680 1 T1 1 T8 24 T75 2
valid_sources[0x24] 3997 1 T9 14 T88 4 T90 3
valid_sources[0x25] 3239 1 T1 1 T13 3 T74 3
valid_sources[0x26] 4265 1 T13 1 T90 1 T17 252
valid_sources[0x27] 3315 1 T74 1 T124 2 T17 246
valid_sources[0x28] 5180 1 T1 5 T17 257 T18 788
valid_sources[0x29] 4451 1 T128 2 T90 1 T127 1
valid_sources[0x2a] 5718 1 T74 2 T128 1 T17 232
valid_sources[0x2b] 3394 1 T87 1 T124 1 T129 8
valid_sources[0x2c] 4630 1 T1 3 T17 244 T25 1
valid_sources[0x2d] 3560 1 T13 1 T75 2 T87 1
valid_sources[0x2e] 3671 1 T75 1 T109 6 T17 243
valid_sources[0x2f] 3460 1 T1 1 T109 12 T125 4
valid_sources[0x30] 4118 1 T31 1 T87 1 T127 1
valid_sources[0x31] 4408 1 T10 2 T13 1 T74 3
valid_sources[0x32] 4036 1 T75 3 T87 2 T90 1
valid_sources[0x33] 4525 1 T75 1 T90 1 T17 236
valid_sources[0x34] 3911 1 T8 13 T16 35 T12 1
valid_sources[0x35] 4621 1 T74 2 T11 6 T17 240
valid_sources[0x36] 4214 1 T87 1 T90 2 T17 236
valid_sources[0x37] 4258 1 T74 3 T87 2 T109 4
valid_sources[0x38] 4729 1 T1 4 T75 1 T89 24
valid_sources[0x39] 3489 1 T1 4 T9 6 T126 2
valid_sources[0x3a] 4893 1 T16 73 T109 22 T90 4
valid_sources[0x3b] 4892 1 T1 4 T4 2 T86 11
valid_sources[0x3c] 4400 1 T10 1 T15 1 T74 4
valid_sources[0x3d] 3285 1 T13 2 T108 10 T87 1
valid_sources[0x3e] 3681 1 T1 1 T2 1 T17 211
valid_sources[0x3f] 3952 1 T74 1 T17 231 T25 1
valid_sources[0x40] 3500 1 T75 4 T87 1 T129 1
valid_sources[0x41] 4525 1 T74 2 T108 20 T87 1
valid_sources[0x42] 4953 1 T124 8 T11 2 T17 218
valid_sources[0x43] 3785 1 T10 5 T13 1 T75 6
valid_sources[0x44] 3924 1 T15 1 T88 1 T12 1
valid_sources[0x45] 4587 1 T1 1 T10 2 T87 1
valid_sources[0x46] 4425 1 T13 1 T130 53 T17 226
valid_sources[0x47] 5291 1 T10 1 T11 1 T88 1
valid_sources[0x48] 4238 1 T11 1 T64 3 T90 1
valid_sources[0x49] 3501 1 T10 1 T75 1 T87 2
valid_sources[0x4a] 3823 1 T64 1 T125 9 T17 240
valid_sources[0x4b] 4327 1 T14 3 T75 1 T17 244
valid_sources[0x4c] 3358 1 T13 1 T129 4 T17 252
valid_sources[0x4d] 3293 1 T74 1 T75 1 T90 1
valid_sources[0x4e] 3166 1 T7 51 T13 1 T17 220
valid_sources[0x4f] 3785 1 T74 1 T125 4 T17 216
valid_sources[0x50] 3918 1 T125 10 T17 232 T18 681
valid_sources[0x51] 3761 1 T74 1 T75 3 T17 227
valid_sources[0x52] 4039 1 T1 1 T16 56 T17 245
valid_sources[0x53] 4980 1 T1 1 T74 3 T86 4
valid_sources[0x54] 3174 1 T1 1 T74 2 T75 1
valid_sources[0x55] 4406 1 T16 19 T87 1 T17 227
valid_sources[0x56] 4895 1 T87 1 T17 230 T18 717
valid_sources[0x57] 3029 1 T74 1 T87 1 T90 1
valid_sources[0x58] 4081 1 T13 1 T75 1 T16 31
valid_sources[0x59] 5258 1 T9 4 T75 1 T124 1
valid_sources[0x5a] 3883 1 T1 3 T13 1 T74 2
valid_sources[0x5b] 3393 1 T1 1 T10 1 T13 1
valid_sources[0x5c] 5037 1 T1 2 T15 11 T86 13
valid_sources[0x5d] 3689 1 T24 3 T64 5 T17 218
valid_sources[0x5e] 3449 1 T10 2 T74 4 T87 1
valid_sources[0x5f] 3685 1 T130 15 T17 237 T25 8
valid_sources[0x60] 4111 1 T74 7 T87 2 T90 1
valid_sources[0x61] 4674 1 T1 1 T13 1 T74 1
valid_sources[0x62] 3771 1 T31 1 T124 1 T125 3
valid_sources[0x63] 4650 1 T74 1 T75 2 T11 6
valid_sources[0x64] 4173 1 T74 3 T17 225 T18 726
valid_sources[0x65] 2824 1 T13 1 T75 4 T64 1
valid_sources[0x66] 4483 1 T75 1 T86 15 T109 14
valid_sources[0x67] 4433 1 T9 4 T13 1 T87 1
valid_sources[0x68] 3942 1 T1 5 T15 4 T109 11
valid_sources[0x69] 5742 1 T87 1 T90 2 T17 220
valid_sources[0x6a] 3637 1 T124 1 T89 78 T17 267
valid_sources[0x6b] 3250 1 T74 2 T109 26 T89 21
valid_sources[0x6c] 4318 1 T3 33 T16 64 T11 14
valid_sources[0x6d] 4704 1 T87 1 T129 3 T17 237
valid_sources[0x6e] 3757 1 T10 1 T109 19 T128 5
valid_sources[0x6f] 4363 1 T87 2 T11 4 T88 4
valid_sources[0x70] 3856 1 T10 1 T74 1 T87 1
valid_sources[0x71] 4318 1 T10 1 T75 2 T125 2
valid_sources[0x72] 3102 1 T1 1 T7 11 T124 6
valid_sources[0x73] 3336 1 T1 1 T13 1 T75 1
valid_sources[0x74] 3589 1 T15 12 T75 6 T88 2
valid_sources[0x75] 3202 1 T10 1 T74 1 T17 213
valid_sources[0x76] 3317 1 T74 3 T17 213 T18 755
valid_sources[0x77] 3831 1 T10 1 T74 1 T17 234
valid_sources[0x78] 4483 1 T75 1 T11 5 T128 2
valid_sources[0x79] 3143 1 T1 3 T4 3 T75 1
valid_sources[0x7a] 3877 1 T10 1 T109 4 T130 19
valid_sources[0x7b] 4349 1 T3 21 T125 3 T17 238
valid_sources[0x7c] 3902 1 T75 2 T126 1 T17 248
valid_sources[0x7d] 4339 1 T1 2 T75 1 T87 1
valid_sources[0x7e] 4279 1 T13 1 T17 234 T18 753
valid_sources[0x7f] 3954 1 T13 1 T64 3 T127 2
valid_sources[0x80] 3176 1 T1 1 T2 1 T74 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 245299 1 T1 7 T2 3 T3 18
values[0x0] all_enables biggest_size 362880 1 T17 22164 T18 69166 T19 14850
values[0x1] all_enables biggest_size 363146 1 T17 21772 T18 68994 T19 14972


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 75763 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 731560 1 T1 35 T2 9 T3 48



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 202969 1 T1 64 T2 16 T3 96
values[0x0] 279040 1 T36 8 T37 5 T38 3
values[0x1] 325314 1 T37 5 T38 3 T67 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34892 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 772431 1 T1 42 T2 9 T3 57



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 3338 1 T75 1 T131 2 T126 32
valid_sources[0x01] 3315 1 T10 1 T75 1 T17 196
valid_sources[0x02] 3242 1 T1 1 T64 1 T17 191
valid_sources[0x03] 3333 1 T64 1 T17 195 T25 2
valid_sources[0x04] 2989 1 T14 2 T15 7 T69 1
valid_sources[0x05] 3103 1 T1 2 T36 1 T88 3
valid_sources[0x06] 3437 1 T75 1 T30 1 T17 198
valid_sources[0x07] 2885 1 T75 2 T128 1 T17 183
valid_sources[0x08] 3060 1 T86 1 T17 196 T18 597
valid_sources[0x09] 3210 1 T17 215 T18 592 T19 148
valid_sources[0x0a] 3157 1 T1 1 T74 2 T17 192
valid_sources[0x0b] 2899 1 T1 1 T89 4 T17 200
valid_sources[0x0c] 2731 1 T75 1 T12 1 T17 201
valid_sources[0x0d] 3492 1 T17 203 T18 638 T19 113
valid_sources[0x0e] 3176 1 T89 1 T128 3 T17 201
valid_sources[0x0f] 3119 1 T10 1 T89 1 T17 170
valid_sources[0x10] 3552 1 T89 1 T17 193 T25 1
valid_sources[0x11] 2662 1 T1 1 T32 2 T17 209
valid_sources[0x12] 2702 1 T64 3 T89 1 T17 218
valid_sources[0x13] 2819 1 T75 1 T12 1 T17 172
valid_sources[0x14] 3212 1 T1 1 T13 4 T69 3
valid_sources[0x15] 3040 1 T131 1 T17 194 T18 565
valid_sources[0x16] 3270 1 T1 2 T17 198 T49 1
valid_sources[0x17] 2893 1 T89 1 T17 179 T18 525
valid_sources[0x18] 3190 1 T14 1 T75 1 T17 196
valid_sources[0x19] 3057 1 T37 2 T87 3 T131 1
valid_sources[0x1a] 3313 1 T17 189 T25 1 T18 622
valid_sources[0x1b] 3215 1 T124 1 T17 189 T18 553
valid_sources[0x1c] 3022 1 T1 3 T14 1 T86 1
valid_sources[0x1d] 2654 1 T74 5 T75 1 T87 1
valid_sources[0x1e] 3335 1 T17 196 T25 2 T18 586
valid_sources[0x1f] 3199 1 T2 1 T17 192 T18 531
valid_sources[0x20] 2765 1 T10 1 T30 1 T17 207
valid_sources[0x21] 3075 1 T17 195 T18 577 T132 2
valid_sources[0x22] 3405 1 T17 221 T18 638 T19 131
valid_sources[0x23] 2884 1 T2 1 T75 1 T64 1
valid_sources[0x24] 2961 1 T38 1 T64 1 T17 208
valid_sources[0x25] 2890 1 T14 1 T89 1 T17 158
valid_sources[0x26] 3099 1 T64 1 T89 1 T17 194
valid_sources[0x27] 3359 1 T75 1 T86 1 T68 2
valid_sources[0x28] 3377 1 T1 2 T24 2 T32 1
valid_sources[0x29] 2917 1 T75 1 T64 4 T128 3
valid_sources[0x2a] 3724 1 T14 1 T12 3 T17 226
valid_sources[0x2b] 2802 1 T1 1 T64 1 T17 187
valid_sources[0x2c] 3133 1 T90 2 T17 198 T25 1
valid_sources[0x2d] 3386 1 T17 212 T25 1 T18 552
valid_sources[0x2e] 3103 1 T1 1 T131 1 T17 212
valid_sources[0x2f] 2825 1 T86 1 T124 2 T89 1
valid_sources[0x30] 3279 1 T30 1 T64 1 T128 3
valid_sources[0x31] 3004 1 T86 2 T131 1 T17 215
valid_sources[0x32] 3426 1 T89 3 T17 201 T18 588
valid_sources[0x33] 3131 1 T15 3 T124 7 T64 2
valid_sources[0x34] 3587 1 T74 6 T64 2 T17 233
valid_sources[0x35] 3569 1 T13 15 T37 2 T75 1
valid_sources[0x36] 2636 1 T75 1 T64 1 T131 1
valid_sources[0x37] 3064 1 T36 2 T17 190 T25 2
valid_sources[0x38] 2655 1 T133 2 T17 187 T18 535
valid_sources[0x39] 3230 1 T75 1 T64 2 T17 215
valid_sources[0x3a] 3186 1 T75 3 T89 2 T127 19
valid_sources[0x3b] 2987 1 T14 1 T17 209 T25 4
valid_sources[0x3c] 3045 1 T134 1 T89 1 T17 206
valid_sources[0x3d] 3155 1 T10 1 T89 2 T128 2
valid_sources[0x3e] 3413 1 T135 1 T17 195 T18 616
valid_sources[0x3f] 3433 1 T10 1 T74 5 T75 1
valid_sources[0x40] 3113 1 T37 1 T136 1 T89 1
valid_sources[0x41] 3066 1 T135 2 T17 208 T18 596
valid_sources[0x42] 2915 1 T10 1 T36 1 T64 1
valid_sources[0x43] 3162 1 T1 1 T36 1 T75 1
valid_sources[0x44] 2749 1 T10 1 T14 1 T87 1
valid_sources[0x45] 3442 1 T1 1 T86 2 T87 3
valid_sources[0x46] 2766 1 T75 1 T64 1 T128 3
valid_sources[0x47] 3783 1 T2 2 T37 3 T17 198
valid_sources[0x48] 3190 1 T1 1 T10 1 T64 1
valid_sources[0x49] 3632 1 T86 2 T124 1 T88 1
valid_sources[0x4a] 3074 1 T10 1 T13 4 T30 1
valid_sources[0x4b] 2938 1 T3 3 T86 5 T89 1
valid_sources[0x4c] 3714 1 T135 1 T12 1 T17 164
valid_sources[0x4d] 3088 1 T1 2 T75 1 T17 191
valid_sources[0x4e] 3359 1 T1 1 T75 1 T68 7
valid_sources[0x4f] 3124 1 T1 1 T17 179 T25 1
valid_sources[0x50] 3749 1 T69 3 T71 14 T12 1
valid_sources[0x51] 3345 1 T74 1 T64 1 T17 197
valid_sources[0x52] 3336 1 T14 1 T86 2 T87 1
valid_sources[0x53] 3104 1 T10 1 T17 200 T18 551
valid_sources[0x54] 3220 1 T86 2 T12 1 T17 197
valid_sources[0x55] 3362 1 T10 1 T30 1 T17 190
valid_sources[0x56] 3370 1 T86 2 T32 1 T17 207
valid_sources[0x57] 3051 1 T1 1 T17 225 T25 1
valid_sources[0x58] 2809 1 T1 1 T17 163 T18 520
valid_sources[0x59] 3347 1 T1 2 T89 1 T17 199
valid_sources[0x5a] 2972 1 T2 1 T10 2 T74 11
valid_sources[0x5b] 3210 1 T14 1 T12 1 T17 197
valid_sources[0x5c] 3033 1 T90 25 T17 200 T18 611
valid_sources[0x5d] 3174 1 T75 1 T70 2 T17 203
valid_sources[0x5e] 3233 1 T75 1 T128 1 T17 192
valid_sources[0x5f] 2834 1 T14 1 T12 3 T17 191
valid_sources[0x60] 3138 1 T75 1 T89 1 T32 2
valid_sources[0x61] 2777 1 T1 1 T70 1 T17 188
valid_sources[0x62] 3394 1 T30 1 T17 189 T25 1
valid_sources[0x63] 3073 1 T17 202 T18 582 T19 82
valid_sources[0x64] 3256 1 T1 1 T3 37 T75 1
valid_sources[0x65] 3089 1 T10 1 T89 1 T17 191
valid_sources[0x66] 3197 1 T28 1 T74 1 T124 2
valid_sources[0x67] 2628 1 T14 1 T15 10 T30 2
valid_sources[0x68] 3157 1 T17 217 T18 557 T137 1
valid_sources[0x69] 3343 1 T10 1 T89 1 T17 199
valid_sources[0x6a] 3607 1 T86 1 T17 204 T18 563
valid_sources[0x6b] 3157 1 T2 1 T10 1 T86 2
valid_sources[0x6c] 3008 1 T17 216 T25 2 T18 574
valid_sources[0x6d] 2957 1 T17 217 T49 1 T18 578
valid_sources[0x6e] 3112 1 T67 1 T135 1 T12 1
valid_sources[0x6f] 2965 1 T1 1 T17 207 T49 2
valid_sources[0x70] 3020 1 T2 1 T75 1 T68 2
valid_sources[0x71] 3073 1 T75 1 T64 1 T17 187
valid_sources[0x72] 2764 1 T89 1 T17 202 T18 607
valid_sources[0x73] 3053 1 T24 12 T89 2 T17 176
valid_sources[0x74] 2834 1 T135 1 T88 1 T17 183
valid_sources[0x75] 3340 1 T17 220 T18 535 T19 156
valid_sources[0x76] 3413 1 T10 1 T87 5 T89 1
valid_sources[0x77] 2976 1 T17 214 T25 1 T18 641
valid_sources[0x78] 2989 1 T67 8 T138 1 T17 192
valid_sources[0x79] 2911 1 T17 202 T18 505 T19 75
valid_sources[0x7a] 3911 1 T10 1 T12 1 T17 191
valid_sources[0x7b] 3056 1 T14 1 T24 5 T17 204
valid_sources[0x7c] 3539 1 T29 1 T124 2 T17 184
valid_sources[0x7d] 3505 1 T14 1 T38 1 T69 1
valid_sources[0x7e] 2704 1 T37 1 T74 17 T17 212
valid_sources[0x7f] 3598 1 T17 189 T25 1 T18 597
valid_sources[0x80] 3271 1 T30 1 T17 186 T25 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 184344 1 T1 35 T2 9 T3 48
values[0x0] all_enables biggest_size 272935 1 T36 3 T37 1 T38 3
values[0x1] all_enables biggest_size 274281 1 T37 2 T38 1 T68 2

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