Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 70534 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1679972 1 T2 33 T4 8 T5 13



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 459861 1 T2 323 T4 69 T5 136
values[0x0] 634663 1 T26 60690 T27 21874 T28 15079
values[0x1] 655982 1 T26 63175 T27 22508 T28 15653



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 36271 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1714235 1 T2 185 T4 38 T5 81



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 6576 1 T2 4 T6 1 T26 711
valid_sources[0x01] 6219 1 T2 1 T5 1 T26 670
valid_sources[0x02] 7253 1 T2 3 T4 1 T9 3
valid_sources[0x03] 7394 1 T2 2 T10 5 T26 719
valid_sources[0x04] 6894 1 T2 1 T4 1 T26 658
valid_sources[0x05] 6986 1 T2 1 T5 3 T40 1
valid_sources[0x06] 6193 1 T5 3 T6 1 T10 1
valid_sources[0x07] 6368 1 T2 1 T10 8 T11 6
valid_sources[0x08] 6728 1 T2 1 T6 2 T11 1
valid_sources[0x09] 6418 1 T2 4 T5 1 T11 12
valid_sources[0x0a] 6541 1 T9 1 T26 689 T43 1
valid_sources[0x0b] 7494 1 T2 1 T5 2 T26 601
valid_sources[0x0c] 6500 1 T4 2 T5 1 T10 2
valid_sources[0x0d] 6731 1 T9 1 T26 577 T27 234
valid_sources[0x0e] 7471 1 T2 3 T5 1 T10 8
valid_sources[0x0f] 6983 1 T2 1 T9 4 T13 2
valid_sources[0x10] 7125 1 T2 1 T5 1 T13 1
valid_sources[0x11] 6461 1 T2 3 T5 1 T26 634
valid_sources[0x12] 6421 1 T2 1 T6 1 T10 10
valid_sources[0x13] 7335 1 T2 2 T10 5 T26 674
valid_sources[0x14] 6954 1 T2 1 T26 649 T18 2
valid_sources[0x15] 6606 1 T2 3 T4 2 T5 4
valid_sources[0x16] 6380 1 T2 1 T5 2 T9 1
valid_sources[0x17] 6411 1 T2 1 T4 1 T5 1
valid_sources[0x18] 6470 1 T2 3 T4 1 T5 1
valid_sources[0x19] 7266 1 T2 1 T4 1 T9 2
valid_sources[0x1a] 7096 1 T40 1 T26 773 T53 2
valid_sources[0x1b] 6779 1 T2 2 T6 1 T26 591
valid_sources[0x1c] 7876 1 T6 1 T26 702 T53 1
valid_sources[0x1d] 8199 1 T2 2 T4 1 T5 2
valid_sources[0x1e] 6780 1 T2 2 T26 634 T43 2
valid_sources[0x1f] 7661 1 T10 4 T26 712 T27 309
valid_sources[0x20] 6604 1 T2 4 T26 597 T43 3
valid_sources[0x21] 6597 1 T2 1 T4 1 T5 1
valid_sources[0x22] 6627 1 T2 2 T4 1 T11 16
valid_sources[0x23] 6888 1 T2 1 T5 1 T11 6
valid_sources[0x24] 6632 1 T2 1 T5 1 T6 1
valid_sources[0x25] 7916 1 T2 1 T5 1 T26 712
valid_sources[0x26] 6521 1 T2 1 T5 1 T26 610
valid_sources[0x27] 6951 1 T26 770 T43 5 T44 22
valid_sources[0x28] 7142 1 T26 701 T43 1 T18 2
valid_sources[0x29] 6847 1 T2 5 T5 1 T6 1
valid_sources[0x2a] 6293 1 T5 1 T6 1 T26 608
valid_sources[0x2b] 6641 1 T2 2 T10 4 T26 592
valid_sources[0x2c] 7226 1 T26 544 T27 197 T28 154
valid_sources[0x2d] 6710 1 T2 3 T5 1 T11 4
valid_sources[0x2e] 6928 1 T2 1 T13 1 T26 765
valid_sources[0x2f] 6439 1 T26 637 T27 283 T28 161
valid_sources[0x30] 7289 1 T2 1 T26 627 T43 2
valid_sources[0x31] 6760 1 T2 1 T11 2 T26 759
valid_sources[0x32] 6899 1 T10 8 T26 667 T42 22
valid_sources[0x33] 6427 1 T2 1 T4 1 T5 2
valid_sources[0x34] 6986 1 T2 4 T5 1 T10 2
valid_sources[0x35] 6898 1 T11 1 T26 634 T43 1
valid_sources[0x36] 6655 1 T2 3 T5 1 T9 1
valid_sources[0x37] 6725 1 T2 3 T5 1 T26 697
valid_sources[0x38] 6650 1 T5 1 T26 498 T53 1
valid_sources[0x39] 7008 1 T2 1 T10 1 T26 699
valid_sources[0x3a] 6820 1 T2 1 T4 1 T5 1
valid_sources[0x3b] 6802 1 T5 1 T26 704 T27 299
valid_sources[0x3c] 7118 1 T2 3 T4 2 T9 1
valid_sources[0x3d] 6781 1 T4 3 T10 1 T13 1
valid_sources[0x3e] 6678 1 T13 1 T22 1 T26 557
valid_sources[0x3f] 6578 1 T4 1 T26 595 T43 1
valid_sources[0x40] 7448 1 T9 1 T13 1 T26 842
valid_sources[0x41] 6716 1 T2 1 T5 1 T11 5
valid_sources[0x42] 6503 1 T2 3 T5 2 T10 1
valid_sources[0x43] 6765 1 T2 2 T4 1 T26 761
valid_sources[0x44] 6871 1 T2 2 T9 2 T10 1
valid_sources[0x45] 6724 1 T2 1 T4 1 T6 1
valid_sources[0x46] 6320 1 T2 3 T4 2 T5 1
valid_sources[0x47] 6385 1 T2 2 T6 4 T11 1
valid_sources[0x48] 6555 1 T5 2 T26 707 T43 1
valid_sources[0x49] 6441 1 T6 1 T11 1 T13 1
valid_sources[0x4a] 6517 1 T2 2 T4 2 T5 1
valid_sources[0x4b] 7562 1 T2 2 T5 1 T9 1
valid_sources[0x4c] 6551 1 T2 2 T26 643 T27 215
valid_sources[0x4d] 6627 1 T2 3 T5 2 T26 686
valid_sources[0x4e] 7017 1 T2 3 T4 1 T5 2
valid_sources[0x4f] 7499 1 T2 1 T4 1 T26 648
valid_sources[0x50] 6938 1 T2 2 T26 617 T43 2
valid_sources[0x51] 6527 1 T2 1 T13 1 T26 604
valid_sources[0x52] 6265 1 T4 1 T10 4 T11 2
valid_sources[0x53] 7216 1 T9 1 T26 686 T43 5
valid_sources[0x54] 6899 1 T2 2 T26 562 T53 1
valid_sources[0x55] 7026 1 T2 1 T4 2 T5 1
valid_sources[0x56] 6614 1 T13 1 T26 597 T53 1
valid_sources[0x57] 6634 1 T10 2 T26 474 T53 1
valid_sources[0x58] 6480 1 T2 1 T12 20 T26 581
valid_sources[0x59] 6338 1 T2 2 T5 2 T9 2
valid_sources[0x5a] 7766 1 T2 1 T4 1 T9 2
valid_sources[0x5b] 7512 1 T2 2 T4 1 T26 554
valid_sources[0x5c] 8043 1 T2 1 T4 1 T10 10
valid_sources[0x5d] 6424 1 T5 1 T6 1 T9 1
valid_sources[0x5e] 7066 1 T2 1 T26 613 T43 1
valid_sources[0x5f] 6330 1 T2 1 T5 1 T11 2
valid_sources[0x60] 7908 1 T5 1 T10 3 T13 1
valid_sources[0x61] 6635 1 T2 1 T5 1 T13 1
valid_sources[0x62] 6546 1 T26 609 T42 15 T27 279
valid_sources[0x63] 7824 1 T11 3 T26 627 T53 3
valid_sources[0x64] 6511 1 T2 1 T10 3 T26 533
valid_sources[0x65] 7066 1 T2 1 T5 2 T26 656
valid_sources[0x66] 6350 1 T2 1 T5 1 T10 1
valid_sources[0x67] 7202 1 T2 2 T5 2 T10 4
valid_sources[0x68] 6751 1 T12 18 T39 18 T26 764
valid_sources[0x69] 6625 1 T2 1 T11 1 T26 711
valid_sources[0x6a] 6569 1 T5 1 T11 3 T26 652
valid_sources[0x6b] 6841 1 T2 2 T5 2 T9 2
valid_sources[0x6c] 6764 1 T2 1 T12 29 T26 650
valid_sources[0x6d] 6734 1 T2 1 T10 4 T26 627
valid_sources[0x6e] 7449 1 T2 1 T26 627 T43 4
valid_sources[0x6f] 6332 1 T26 689 T43 2 T27 177
valid_sources[0x70] 6898 1 T2 1 T11 1 T26 606
valid_sources[0x71] 7169 1 T2 2 T4 1 T5 1
valid_sources[0x72] 6721 1 T2 1 T4 2 T26 646
valid_sources[0x73] 6464 1 T6 1 T9 1 T13 6
valid_sources[0x74] 7150 1 T2 1 T13 4 T26 785
valid_sources[0x75] 7815 1 T2 6 T5 1 T9 2
valid_sources[0x76] 6515 1 T4 1 T5 1 T10 3
valid_sources[0x77] 6834 1 T2 1 T5 1 T9 1
valid_sources[0x78] 6480 1 T2 1 T6 4 T26 662
valid_sources[0x79] 7198 1 T2 1 T4 1 T26 743
valid_sources[0x7a] 7157 1 T26 543 T43 2 T44 28
valid_sources[0x7b] 6432 1 T5 1 T6 1 T10 2
valid_sources[0x7c] 6259 1 T2 1 T6 1 T13 1
valid_sources[0x7d] 7176 1 T2 1 T5 1 T26 615
valid_sources[0x7e] 6677 1 T2 3 T9 1 T13 1
valid_sources[0x7f] 7025 1 T2 3 T6 1 T26 604
valid_sources[0x80] 7055 1 T2 2 T13 2 T26 637



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 422955 1 T2 33 T4 8 T5 13
values[0x0] all_enables biggest_size 629197 1 T26 60191 T27 21685 T28 14958
values[0x1] all_enables biggest_size 627820 1 T26 60470 T27 21576 T28 14988


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 125757 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1289045 1 T1 1 T3 1 T4 16



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 353422 1 T1 1 T3 1 T4 32
values[0x0] 492034 1 T35 15 T24 6 T26 46044
values[0x1] 569346 1 T35 8 T24 3 T26 52719



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56369 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1358433 1 T1 1 T3 1 T4 19



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 5696 1 T10 1 T26 448 T27 225
valid_sources[0x01] 5239 1 T5 1 T26 495 T27 226
valid_sources[0x02] 5719 1 T11 1 T25 1 T26 520
valid_sources[0x03] 5557 1 T10 1 T25 2 T26 489
valid_sources[0x04] 5732 1 T26 537 T27 213 T28 126
valid_sources[0x05] 5237 1 T26 492 T27 178 T28 142
valid_sources[0x06] 5383 1 T5 1 T11 1 T26 530
valid_sources[0x07] 6790 1 T11 1 T26 550 T43 1
valid_sources[0x08] 5771 1 T26 536 T27 172 T28 143
valid_sources[0x09] 5504 1 T41 1 T26 558 T53 1
valid_sources[0x0a] 5985 1 T11 1 T26 564 T43 5
valid_sources[0x0b] 6374 1 T10 1 T26 488 T27 209
valid_sources[0x0c] 4659 1 T11 1 T26 517 T27 228
valid_sources[0x0d] 6319 1 T11 1 T26 504 T43 2
valid_sources[0x0e] 5623 1 T13 8 T26 530 T27 181
valid_sources[0x0f] 5666 1 T6 1 T10 1 T26 546
valid_sources[0x10] 5292 1 T6 1 T10 1 T11 1
valid_sources[0x11] 5542 1 T10 1 T26 466 T27 164
valid_sources[0x12] 4538 1 T10 1 T11 1 T26 545
valid_sources[0x13] 5138 1 T10 2 T26 548 T27 201
valid_sources[0x14] 5481 1 T10 2 T35 5 T26 497
valid_sources[0x15] 4612 1 T26 548 T27 189 T28 145
valid_sources[0x16] 5628 1 T5 1 T6 1 T10 1
valid_sources[0x17] 5559 1 T26 496 T44 1 T27 145
valid_sources[0x18] 5076 1 T5 2 T10 1 T26 471
valid_sources[0x19] 5519 1 T5 1 T6 1 T26 526
valid_sources[0x1a] 5374 1 T26 479 T27 205 T28 152
valid_sources[0x1b] 4791 1 T6 1 T11 1 T26 529
valid_sources[0x1c] 5603 1 T6 1 T26 497 T27 201
valid_sources[0x1d] 4918 1 T26 507 T27 231 T28 138
valid_sources[0x1e] 5074 1 T35 7 T25 1 T40 1
valid_sources[0x1f] 5778 1 T21 2 T26 505 T44 16
valid_sources[0x20] 5351 1 T8 1 T11 1 T26 532
valid_sources[0x21] 4982 1 T26 473 T27 197 T28 127
valid_sources[0x22] 5468 1 T6 1 T26 513 T27 163
valid_sources[0x23] 5669 1 T5 1 T6 1 T11 1
valid_sources[0x24] 4651 1 T26 530 T43 1 T27 211
valid_sources[0x25] 4884 1 T11 1 T21 8 T26 512
valid_sources[0x26] 5093 1 T10 1 T35 7 T26 493
valid_sources[0x27] 5884 1 T10 1 T25 1 T26 499
valid_sources[0x28] 5650 1 T10 1 T22 4 T26 491
valid_sources[0x29] 7143 1 T5 1 T26 518 T43 1
valid_sources[0x2a] 5744 1 T25 1 T41 1 T26 455
valid_sources[0x2b] 4821 1 T6 2 T41 1 T26 546
valid_sources[0x2c] 5706 1 T5 1 T9 32 T41 1
valid_sources[0x2d] 5880 1 T11 1 T26 516 T27 213
valid_sources[0x2e] 5368 1 T11 1 T26 500 T27 199
valid_sources[0x2f] 5103 1 T26 527 T27 194 T28 133
valid_sources[0x30] 4425 1 T35 1 T41 2 T26 446
valid_sources[0x31] 5263 1 T40 2 T26 529 T27 221
valid_sources[0x32] 4635 1 T10 1 T11 1 T26 488
valid_sources[0x33] 4971 1 T6 1 T26 464 T43 1
valid_sources[0x34] 5073 1 T21 1 T26 493 T18 3
valid_sources[0x35] 5061 1 T21 1 T26 556 T27 181
valid_sources[0x36] 4634 1 T10 1 T41 1 T26 468
valid_sources[0x37] 5225 1 T10 1 T26 484 T27 160
valid_sources[0x38] 5890 1 T26 504 T27 161 T28 116
valid_sources[0x39] 5844 1 T22 3 T26 534 T44 11
valid_sources[0x3a] 4778 1 T26 528 T27 181 T28 133
valid_sources[0x3b] 5614 1 T5 2 T11 1 T26 547
valid_sources[0x3c] 4676 1 T8 1 T11 2 T25 1
valid_sources[0x3d] 5468 1 T10 5 T41 1 T26 467
valid_sources[0x3e] 5707 1 T5 1 T22 1 T26 487
valid_sources[0x3f] 5029 1 T26 575 T27 199 T28 146
valid_sources[0x40] 5735 1 T11 1 T26 554 T27 204
valid_sources[0x41] 4963 1 T6 1 T26 490 T27 182
valid_sources[0x42] 5616 1 T26 576 T43 3 T27 199
valid_sources[0x43] 5307 1 T5 1 T26 496 T27 210
valid_sources[0x44] 5702 1 T26 589 T27 203 T28 114
valid_sources[0x45] 5778 1 T41 1 T26 497 T27 184
valid_sources[0x46] 5918 1 T26 494 T27 221 T28 128
valid_sources[0x47] 6703 1 T8 1 T26 507 T27 180
valid_sources[0x48] 5450 1 T5 1 T26 465 T27 184
valid_sources[0x49] 4693 1 T26 521 T43 2 T27 173
valid_sources[0x4a] 5565 1 T11 1 T26 484 T27 166
valid_sources[0x4b] 5454 1 T26 513 T27 207 T28 128
valid_sources[0x4c] 5556 1 T10 3 T26 500 T27 154
valid_sources[0x4d] 5787 1 T41 1 T26 489 T27 206
valid_sources[0x4e] 4733 1 T26 494 T44 4 T27 195
valid_sources[0x4f] 5601 1 T11 1 T41 1 T26 538
valid_sources[0x50] 5655 1 T10 2 T11 1 T26 538
valid_sources[0x51] 5655 1 T10 3 T35 1 T21 1
valid_sources[0x52] 5056 1 T5 1 T26 465 T27 204
valid_sources[0x53] 5099 1 T5 1 T26 528 T44 4
valid_sources[0x54] 5403 1 T5 1 T11 2 T26 488
valid_sources[0x55] 5948 1 T26 470 T27 218 T28 129
valid_sources[0x56] 6461 1 T6 1 T10 2 T11 1
valid_sources[0x57] 5850 1 T10 1 T22 1 T26 480
valid_sources[0x58] 5792 1 T11 1 T41 1 T26 505
valid_sources[0x59] 5826 1 T1 1 T10 2 T11 1
valid_sources[0x5a] 4885 1 T10 1 T26 499 T27 205
valid_sources[0x5b] 5917 1 T26 523 T27 177 T28 115
valid_sources[0x5c] 5384 1 T10 1 T41 1 T26 520
valid_sources[0x5d] 5703 1 T6 1 T26 463 T36 10
valid_sources[0x5e] 5046 1 T26 496 T27 189 T28 114
valid_sources[0x5f] 5094 1 T10 1 T11 1 T26 526
valid_sources[0x60] 4896 1 T6 1 T10 2 T11 1
valid_sources[0x61] 5572 1 T5 2 T10 2 T14 1
valid_sources[0x62] 5447 1 T35 2 T26 475 T43 3
valid_sources[0x63] 5471 1 T8 1 T40 3 T41 1
valid_sources[0x64] 5503 1 T26 504 T27 181 T28 120
valid_sources[0x65] 5110 1 T10 1 T41 1 T26 513
valid_sources[0x66] 5578 1 T26 545 T18 1 T27 167
valid_sources[0x67] 7095 1 T11 2 T26 492 T43 1
valid_sources[0x68] 5035 1 T5 1 T6 1 T26 515
valid_sources[0x69] 6310 1 T3 1 T5 1 T26 561
valid_sources[0x6a] 5298 1 T5 1 T26 526 T27 163
valid_sources[0x6b] 5825 1 T10 1 T26 524 T27 201
valid_sources[0x6c] 5891 1 T5 1 T10 1 T26 512
valid_sources[0x6d] 5283 1 T10 1 T11 1 T41 1
valid_sources[0x6e] 5936 1 T11 1 T26 485 T23 34
valid_sources[0x6f] 6413 1 T5 1 T6 1 T10 1
valid_sources[0x70] 5817 1 T5 1 T10 1 T11 2
valid_sources[0x71] 6270 1 T26 495 T27 237 T28 112
valid_sources[0x72] 5152 1 T5 1 T11 1 T22 1
valid_sources[0x73] 5443 1 T26 483 T27 213 T28 134
valid_sources[0x74] 4948 1 T26 563 T27 184 T28 130
valid_sources[0x75] 5979 1 T10 2 T11 1 T26 579
valid_sources[0x76] 5966 1 T5 2 T26 515 T44 2
valid_sources[0x77] 5691 1 T8 1 T11 1 T41 1
valid_sources[0x78] 5220 1 T6 1 T11 1 T26 501
valid_sources[0x79] 5614 1 T5 1 T26 530 T27 204
valid_sources[0x7a] 5591 1 T25 1 T41 1 T26 488
valid_sources[0x7b] 4759 1 T5 2 T26 552 T44 1
valid_sources[0x7c] 6366 1 T5 1 T6 1 T10 3
valid_sources[0x7d] 4670 1 T26 497 T27 226 T28 126
valid_sources[0x7e] 4889 1 T10 1 T11 1 T26 511
valid_sources[0x7f] 5298 1 T10 1 T26 517 T27 219
valid_sources[0x80] 5595 1 T11 1 T26 523 T27 194



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 325301 1 T1 1 T3 1 T4 16
values[0x0] all_enables biggest_size 482054 1 T35 2 T24 1 T26 45163
values[0x1] all_enables biggest_size 481690 1 T35 2 T26 44463 T36 2

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