Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44286	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

732656

1

T1

15

T2

3

T5

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	215401	1			T1	87		T2	3		T5	76
values[0x0]	275690	1			T12	52759		T13	12519		T14	1316
values[0x1]	285851	1			T12	54707		T13	12924		T14	1354

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21713	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

755229

1

T1

52

T2

3

T5

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2945	1			T10	1		T17	19		T63	2
valid_sources[0x01]	2987	1			T10	1		T15	1		T63	2
valid_sources[0x02]	3108	1			T15	1		T16	1		T12	617
valid_sources[0x03]	3059	1			T61	1		T16	3		T12	559
valid_sources[0x04]	3056	1			T10	5		T15	5		T63	2
valid_sources[0x05]	2964	1			T10	1		T18	1		T63	1
valid_sources[0x06]	2996	1			T10	2		T15	3		T61	1
valid_sources[0x07]	2902	1			T10	2		T15	1		T61	1
valid_sources[0x08]	2997	1			T63	1		T61	1		T12	573
valid_sources[0x09]	3047	1			T8	1		T18	1		T16	1
valid_sources[0x0a]	2999	1			T8	1		T63	5		T61	1
valid_sources[0x0b]	2950	1			T10	3		T61	1		T12	533
valid_sources[0x0c]	3058	1			T1	5		T62	12		T63	2
valid_sources[0x0d]	2997	1			T10	3		T12	592		T13	130
valid_sources[0x0e]	3075	1			T10	1		T11	19		T17	15
valid_sources[0x0f]	3104	1			T10	1		T18	1		T15	8
valid_sources[0x10]	2972	1			T15	1		T63	4		T61	1
valid_sources[0x11]	2997	1			T60	1		T61	1		T12	582
valid_sources[0x12]	3016	1			T10	3		T61	1		T12	586
valid_sources[0x13]	2953	1			T10	4		T63	1		T61	1
valid_sources[0x14]	2938	1			T10	2		T61	3		T12	553
valid_sources[0x15]	2944	1			T16	1		T12	563		T13	123
valid_sources[0x16]	2961	1			T63	2		T61	2		T12	493
valid_sources[0x17]	2900	1			T8	5		T10	2		T18	2
valid_sources[0x18]	2978	1			T11	12		T18	1		T63	2
valid_sources[0x19]	3179	1			T1	4		T5	2		T61	1
valid_sources[0x1a]	3251	1			T1	1		T63	1		T61	1
valid_sources[0x1b]	2957	1			T10	1		T15	1		T63	2
valid_sources[0x1c]	2992	1			T1	2		T10	2		T60	7
valid_sources[0x1d]	2944	1			T10	4		T63	3		T61	2
valid_sources[0x1e]	3260	1			T10	1		T63	4		T108	6
valid_sources[0x1f]	2963	1			T10	1		T60	8		T12	552
valid_sources[0x20]	2985	1			T10	2		T15	3		T61	2
valid_sources[0x21]	3086	1			T10	2		T18	1		T15	7
valid_sources[0x22]	3151	1			T1	1		T9	3		T10	3
valid_sources[0x23]	3106	1			T10	1		T15	10		T61	2
valid_sources[0x24]	2986	1			T8	3		T10	2		T15	7
valid_sources[0x25]	2879	1			T15	1		T63	4		T61	2
valid_sources[0x26]	3021	1			T12	576		T13	115		T72	1
valid_sources[0x27]	3101	1			T10	1		T63	1		T60	24
valid_sources[0x28]	2970	1			T61	1		T12	552		T47	1
valid_sources[0x29]	3144	1			T10	4		T11	47		T61	1
valid_sources[0x2a]	2859	1			T63	1		T61	1		T12	520
valid_sources[0x2b]	2952	1			T10	3		T18	3		T15	1
valid_sources[0x2c]	3052	1			T8	3		T15	5		T61	3
valid_sources[0x2d]	3016	1			T10	1		T62	3		T61	2
valid_sources[0x2e]	2962	1			T1	1		T10	2		T16	3
valid_sources[0x2f]	2967	1			T10	2		T15	2		T61	2
valid_sources[0x30]	3205	1			T63	3		T61	1		T12	602
valid_sources[0x31]	2985	1			T10	3		T12	535		T13	135
valid_sources[0x32]	3087	1			T10	3		T62	6		T16	1
valid_sources[0x33]	3187	1			T8	4		T10	2		T15	2
valid_sources[0x34]	3031	1			T10	1		T18	6		T62	6
valid_sources[0x35]	3069	1			T5	22		T10	1		T63	3
valid_sources[0x36]	3248	1			T10	2		T19	14		T61	1
valid_sources[0x37]	2977	1			T1	1		T10	3		T63	2
valid_sources[0x38]	3148	1			T10	1		T62	14		T63	6
valid_sources[0x39]	2999	1			T1	1		T10	2		T16	1
valid_sources[0x3a]	3090	1			T10	1		T18	1		T60	17
valid_sources[0x3b]	3118	1			T10	1		T18	2		T61	1
valid_sources[0x3c]	2999	1			T1	6		T10	4		T18	1
valid_sources[0x3d]	2998	1			T10	6		T15	1		T12	538
valid_sources[0x3e]	3061	1			T1	2		T10	2		T15	6
valid_sources[0x3f]	3229	1			T61	2		T12	598		T49	3
valid_sources[0x40]	2983	1			T17	14		T18	1		T63	3
valid_sources[0x41]	3009	1			T61	5		T12	530		T49	2
valid_sources[0x42]	3041	1			T10	2		T15	2		T63	1
valid_sources[0x43]	3198	1			T61	1		T12	553		T13	144
valid_sources[0x44]	3020	1			T8	1		T61	1		T16	2
valid_sources[0x45]	3092	1			T19	30		T63	2		T61	1
valid_sources[0x46]	3152	1			T10	2		T61	3		T12	546
valid_sources[0x47]	2961	1			T8	2		T10	2		T63	3
valid_sources[0x48]	2980	1			T8	1		T108	11		T61	1
valid_sources[0x49]	3295	1			T8	2		T17	38		T63	3
valid_sources[0x4a]	3053	1			T1	4		T10	1		T15	2
valid_sources[0x4b]	3316	1			T8	2		T18	4		T61	4
valid_sources[0x4c]	3047	1			T63	1		T61	3		T12	540
valid_sources[0x4d]	3130	1			T10	2		T63	5		T61	1
valid_sources[0x4e]	2932	1			T1	1		T15	5		T62	4
valid_sources[0x4f]	3029	1			T18	1		T12	541		T13	141
valid_sources[0x50]	3005	1			T1	2		T10	2		T63	7
valid_sources[0x51]	2926	1			T10	1		T15	6		T63	1
valid_sources[0x52]	3098	1			T10	1		T15	4		T63	1
valid_sources[0x53]	3055	1			T63	3		T61	2		T16	1
valid_sources[0x54]	3085	1			T8	1		T60	13		T12	540
valid_sources[0x55]	2927	1			T10	1		T18	1		T63	2
valid_sources[0x56]	3040	1			T10	1		T12	534		T13	120
valid_sources[0x57]	3062	1			T8	3		T18	1		T61	2
valid_sources[0x58]	3123	1			T18	5		T63	1		T61	1
valid_sources[0x59]	3029	1			T10	3		T15	2		T12	556
valid_sources[0x5a]	3098	1			T10	1		T15	3		T12	575
valid_sources[0x5b]	2921	1			T63	4		T108	1		T61	1
valid_sources[0x5c]	3123	1			T5	3		T10	1		T61	1
valid_sources[0x5d]	2876	1			T1	1		T12	577		T13	137
valid_sources[0x5e]	3087	1			T10	3		T18	2		T63	1
valid_sources[0x5f]	3033	1			T1	1		T63	2		T61	2
valid_sources[0x60]	3057	1			T1	1		T61	7		T12	571
valid_sources[0x61]	3002	1			T10	2		T63	7		T12	581
valid_sources[0x62]	2956	1			T63	1		T12	595		T13	119
valid_sources[0x63]	3059	1			T63	9		T61	2		T12	595
valid_sources[0x64]	2908	1			T8	1		T10	1		T63	1
valid_sources[0x65]	3070	1			T2	2		T10	1		T15	1
valid_sources[0x66]	3006	1			T1	1		T11	32		T60	42
valid_sources[0x67]	2964	1			T1	1		T18	1		T63	1
valid_sources[0x68]	2981	1			T10	1		T15	7		T16	1
valid_sources[0x69]	3089	1			T10	1		T63	2		T12	543
valid_sources[0x6a]	2910	1			T10	3		T63	2		T61	1
valid_sources[0x6b]	2959	1			T10	4		T15	4		T16	1
valid_sources[0x6c]	3004	1			T10	3		T15	2		T63	1
valid_sources[0x6d]	3084	1			T10	4		T63	2		T108	7
valid_sources[0x6e]	3063	1			T15	2		T63	4		T61	1
valid_sources[0x6f]	3139	1			T15	8		T63	1		T60	2
valid_sources[0x70]	2976	1			T61	2		T12	553		T49	1
valid_sources[0x71]	2853	1			T1	1		T10	2		T11	61
valid_sources[0x72]	3021	1			T8	3		T10	4		T15	1
valid_sources[0x73]	2966	1			T15	16		T63	4		T60	18
valid_sources[0x74]	2921	1			T18	2		T63	3		T12	608
valid_sources[0x75]	2937	1			T1	2		T63	2		T61	1
valid_sources[0x76]	2964	1			T10	1		T11	28		T15	10
valid_sources[0x77]	3100	1			T10	1		T60	1		T12	572
valid_sources[0x78]	3116	1			T2	1		T10	1		T18	2
valid_sources[0x79]	3054	1			T10	1		T15	4		T62	4
valid_sources[0x7a]	2999	1			T10	5		T17	16		T61	1
valid_sources[0x7b]	2912	1			T10	2		T15	4		T60	9
valid_sources[0x7c]	2973	1			T18	1		T63	1		T60	4
valid_sources[0x7d]	2834	1			T10	2		T18	1		T19	16
valid_sources[0x7e]	2878	1			T63	1		T16	1		T12	557
valid_sources[0x7f]	2939	1			T10	3		T62	2		T61	1
valid_sources[0x80]	2929	1			T10	1		T61	3		T12	528

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

185829

1

T1

15

T2

3

T5

9

values[0x0]

all_enables

biggest_size

273274

1

T12

52283

T13

12408

T14

1304

values[0x1]

all_enables

biggest_size

273553

1

T12

52366

T13

12336

T14

1286

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	58832	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

565572

1

T1

14

T2

18

T3

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	159219	1			T1	32		T2	33		T3	1
values[0x0]	215626	1			T22	2		T12	40053		T23	4
values[0x1]	249559	1			T22	2		T12	47228		T23	9

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27858	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

596546

1

T1

21

T2

20

T3

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1773	1			T12	159		T47	1		T13	110
valid_sources[0x01]	3797	1			T12	531		T13	109		T72	1
valid_sources[0x02]	2425	1			T12	166		T13	85		T109	4
valid_sources[0x03]	2651	1			T2	1		T62	1		T12	919
valid_sources[0x04]	2728	1			T2	2		T8	1		T12	547
valid_sources[0x05]	2699	1			T6	1		T12	585		T13	115
valid_sources[0x06]	2800	1			T12	124		T13	119		T110	1
valid_sources[0x07]	2304	1			T12	336		T13	105		T14	142
valid_sources[0x08]	2625	1			T8	1		T15	1		T12	588
valid_sources[0x09]	2687	1			T1	1		T6	1		T15	1
valid_sources[0x0a]	2289	1			T15	1		T12	8		T13	103
valid_sources[0x0b]	2498	1			T12	494		T13	72		T109	9
valid_sources[0x0c]	2254	1			T1	5		T12	868		T13	86
valid_sources[0x0d]	2663	1			T8	1		T15	2		T62	1
valid_sources[0x0e]	2342	1			T9	1		T62	2		T12	379
valid_sources[0x0f]	2891	1			T12	595		T13	128		T72	1
valid_sources[0x10]	2535	1			T12	180		T13	101		T40	132
valid_sources[0x11]	1949	1			T12	140		T13	84		T72	2
valid_sources[0x12]	1806	1			T62	1		T12	207		T13	92
valid_sources[0x13]	2293	1			T12	349		T13	136		T111	1
valid_sources[0x14]	2816	1			T15	1		T62	1		T12	717
valid_sources[0x15]	3664	1			T2	1		T15	1		T12	1440
valid_sources[0x16]	2484	1			T1	1		T12	547		T13	99
valid_sources[0x17]	2104	1			T2	2		T12	324		T13	96
valid_sources[0x18]	2384	1			T12	462		T13	138		T29	4
valid_sources[0x19]	2431	1			T15	1		T12	623		T48	2
valid_sources[0x1a]	2629	1			T2	1		T8	1		T15	1
valid_sources[0x1b]	2314	1			T6	1		T15	1		T12	109
valid_sources[0x1c]	2615	1			T9	1		T15	1		T12	183
valid_sources[0x1d]	2276	1			T2	1		T9	1		T15	1
valid_sources[0x1e]	2400	1			T12	293		T13	72		T110	2
valid_sources[0x1f]	2880	1			T19	3		T62	1		T12	518
valid_sources[0x20]	3514	1			T5	1		T6	1		T62	1
valid_sources[0x21]	2045	1			T1	3		T15	2		T12	350
valid_sources[0x22]	2444	1			T19	5		T15	3		T12	774
valid_sources[0x23]	2939	1			T8	1		T15	2		T62	1
valid_sources[0x24]	1981	1			T12	398		T48	1		T13	71
valid_sources[0x25]	2117	1			T5	5		T12	262		T13	138
valid_sources[0x26]	2735	1			T6	1		T12	1031		T13	141
valid_sources[0x27]	2035	1			T15	1		T62	1		T12	102
valid_sources[0x28]	2870	1			T8	1		T15	1		T12	484
valid_sources[0x29]	1909	1			T1	2		T12	242		T13	88
valid_sources[0x2a]	2934	1			T1	1		T2	1		T12	646
valid_sources[0x2b]	2240	1			T15	1		T12	256		T47	1
valid_sources[0x2c]	2438	1			T8	1		T15	2		T62	1
valid_sources[0x2d]	2392	1			T2	1		T8	1		T12	700
valid_sources[0x2e]	2901	1			T2	1		T15	1		T12	664
valid_sources[0x2f]	2660	1			T15	1		T12	634		T13	138
valid_sources[0x30]	2550	1			T8	1		T12	779		T13	100
valid_sources[0x31]	2184	1			T1	2		T5	2		T12	675
valid_sources[0x32]	2925	1			T5	3		T12	826		T47	1
valid_sources[0x33]	1976	1			T9	1		T12	82		T48	1
valid_sources[0x34]	2866	1			T62	1		T12	600		T47	1
valid_sources[0x35]	1923	1			T8	1		T12	272		T13	146
valid_sources[0x36]	2220	1			T12	166		T13	91		T110	2
valid_sources[0x37]	2713	1			T12	352		T13	140		T110	1
valid_sources[0x38]	2597	1			T15	2		T12	249		T13	84
valid_sources[0x39]	2784	1			T12	866		T47	1		T13	100
valid_sources[0x3a]	2983	1			T62	1		T12	656		T23	1
valid_sources[0x3b]	2480	1			T15	1		T12	319		T13	109
valid_sources[0x3c]	2930	1			T15	1		T12	636		T13	99
valid_sources[0x3d]	1991	1			T15	2		T12	113		T13	117
valid_sources[0x3e]	3065	1			T15	1		T12	860		T13	81
valid_sources[0x3f]	2651	1			T2	1		T9	1		T62	1
valid_sources[0x40]	2266	1			T12	547		T13	149		T31	2
valid_sources[0x41]	2821	1			T15	1		T12	474		T13	84
valid_sources[0x42]	1951	1			T12	209		T23	1		T13	106
valid_sources[0x43]	1616	1			T15	1		T12	45		T13	144
valid_sources[0x44]	1941	1			T12	116		T13	96		T109	2
valid_sources[0x45]	3213	1			T12	806		T13	107		T75	1
valid_sources[0x46]	2810	1			T12	190		T13	128		T72	1
valid_sources[0x47]	2554	1			T1	1		T5	1		T12	594
valid_sources[0x48]	1992	1			T12	237		T48	1		T13	93
valid_sources[0x49]	2494	1			T12	707		T13	103		T110	2
valid_sources[0x4a]	1807	1			T12	178		T13	104		T40	138
valid_sources[0x4b]	2787	1			T6	1		T15	1		T62	1
valid_sources[0x4c]	2293	1			T9	2		T15	1		T12	285
valid_sources[0x4d]	2715	1			T12	410		T47	1		T13	104
valid_sources[0x4e]	2509	1			T12	483		T13	71		T40	117
valid_sources[0x4f]	1796	1			T12	264		T23	2		T13	123
valid_sources[0x50]	2604	1			T2	3		T12	938		T13	151
valid_sources[0x51]	2868	1			T62	1		T12	385		T47	1
valid_sources[0x52]	2262	1			T15	2		T12	141		T13	113
valid_sources[0x53]	2445	1			T6	2		T12	603		T13	79
valid_sources[0x54]	2732	1			T9	1		T12	703		T48	1
valid_sources[0x55]	2123	1			T2	1		T12	666		T13	97
valid_sources[0x56]	2386	1			T12	233		T48	1		T13	97
valid_sources[0x57]	2092	1			T12	248		T47	1		T13	90
valid_sources[0x58]	2265	1			T15	1		T62	1		T12	69
valid_sources[0x59]	2137	1			T3	1		T19	1		T12	535
valid_sources[0x5a]	2657	1			T8	1		T15	1		T12	660
valid_sources[0x5b]	2022	1			T15	2		T22	1		T48	1
valid_sources[0x5c]	2069	1			T12	8		T47	1		T13	70
valid_sources[0x5d]	2952	1			T5	1		T12	310		T47	1
valid_sources[0x5e]	2489	1			T12	442		T47	1		T13	98
valid_sources[0x5f]	2764	1			T15	1		T12	1020		T49	32
valid_sources[0x60]	2046	1			T12	172		T13	101		T72	1
valid_sources[0x61]	2513	1			T12	213		T47	1		T13	100
valid_sources[0x62]	2475	1			T12	610		T13	87		T40	114
valid_sources[0x63]	1996	1			T15	1		T62	1		T12	56
valid_sources[0x64]	2875	1			T19	8		T15	1		T12	376
valid_sources[0x65]	3120	1			T8	1		T62	1		T12	1111
valid_sources[0x66]	2543	1			T15	1		T12	617		T13	84
valid_sources[0x67]	3109	1			T1	1		T12	830		T48	1
valid_sources[0x68]	3083	1			T15	2		T62	1		T12	515
valid_sources[0x69]	2370	1			T1	2		T12	329		T13	120
valid_sources[0x6a]	2587	1			T62	1		T12	434		T13	122
valid_sources[0x6b]	2202	1			T15	1		T12	90		T47	1
valid_sources[0x6c]	1785	1			T1	1		T2	1		T12	71
valid_sources[0x6d]	2673	1			T12	664		T13	121		T72	1
valid_sources[0x6e]	2931	1			T9	1		T15	1		T12	629
valid_sources[0x6f]	2481	1			T15	1		T12	685		T23	1
valid_sources[0x70]	2004	1			T6	1		T12	341		T47	1
valid_sources[0x71]	2263	1			T8	1		T12	416		T48	1
valid_sources[0x72]	1892	1			T2	1		T15	1		T12	30
valid_sources[0x73]	2075	1			T12	219		T13	116		T111	1
valid_sources[0x74]	2758	1			T12	772		T47	1		T13	114
valid_sources[0x75]	2564	1			T1	2		T15	1		T62	1
valid_sources[0x76]	1932	1			T8	1		T12	175		T13	94
valid_sources[0x77]	2337	1			T62	1		T12	770		T13	122
valid_sources[0x78]	2732	1			T15	2		T12	754		T13	87
valid_sources[0x79]	1940	1			T9	1		T15	1		T62	1
valid_sources[0x7a]	2216	1			T19	2		T12	25		T23	1
valid_sources[0x7b]	2239	1			T2	2		T19	1		T15	1
valid_sources[0x7c]	2340	1			T2	1		T62	1		T12	413
valid_sources[0x7d]	1638	1			T15	2		T12	145		T48	1
valid_sources[0x7e]	2657	1			T12	271		T13	97		T111	1
valid_sources[0x7f]	2653	1			T9	1		T12	589		T13	122
valid_sources[0x80]	2147	1			T6	4		T8	1		T62	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

143371

1

T1

14

T2

18

T3

1

values[0x0]

all_enables

biggest_size

210954

1

T22

1

T12

39275

T23

2

values[0x1]

all_enables

biggest_size

211247

1

T12

39716

T13

9603

T24

1