Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	41285	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

734175

1

T2

11

T4

15

T6

4

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	211974	1			T2	140		T4	134		T6	53
values[0x0]	276680	1			T14	55557		T15	25270		T16	65874
values[0x1]	286806	1			T14	57693		T15	26406		T16	68118

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	20503	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

754957

1

T2

74

T4

81

T6

33

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3246	1			T2	1		T4	3		T11	1
valid_sources[0x01]	3202	1			T4	4		T11	3		T14	560
valid_sources[0x02]	3131	1			T33	9		T14	554		T62	1
valid_sources[0x03]	3015	1			T2	1		T11	1		T33	2
valid_sources[0x04]	2867	1			T13	4		T26	1		T33	1
valid_sources[0x05]	3246	1			T12	2		T13	1		T32	1
valid_sources[0x06]	2864	1			T26	1		T14	517		T114	2
valid_sources[0x07]	3002	1			T2	1		T4	8		T33	7
valid_sources[0x08]	3100	1			T2	1		T4	1		T11	4
valid_sources[0x09]	3271	1			T4	1		T11	1		T26	10
valid_sources[0x0a]	2926	1			T2	2		T17	1		T14	569
valid_sources[0x0b]	2975	1			T2	1		T11	1		T12	1
valid_sources[0x0c]	3259	1			T26	2		T33	1		T14	602
valid_sources[0x0d]	3072	1			T11	3		T84	3		T14	604
valid_sources[0x0e]	2989	1			T2	2		T4	1		T11	1
valid_sources[0x0f]	3002	1			T11	1		T19	6		T84	1
valid_sources[0x10]	3075	1			T9	1		T11	2		T18	2
valid_sources[0x11]	3072	1			T6	14		T13	1		T33	2
valid_sources[0x12]	3025	1			T11	1		T12	3		T13	1
valid_sources[0x13]	2984	1			T2	2		T11	3		T115	4
valid_sources[0x14]	3029	1			T4	1		T11	4		T33	2
valid_sources[0x15]	3203	1			T11	1		T12	2		T14	584
valid_sources[0x16]	3065	1			T2	1		T11	2		T84	1
valid_sources[0x17]	3067	1			T9	2		T11	1		T26	4
valid_sources[0x18]	2894	1			T12	1		T33	1		T84	1
valid_sources[0x19]	2838	1			T11	2		T18	1		T30	2
valid_sources[0x1a]	3172	1			T2	2		T11	2		T33	2
valid_sources[0x1b]	3150	1			T2	1		T4	1		T11	1
valid_sources[0x1c]	3210	1			T2	3		T4	1		T17	4
valid_sources[0x1d]	3290	1			T10	3		T13	4		T18	1
valid_sources[0x1e]	3217	1			T13	1		T30	1		T14	672
valid_sources[0x1f]	3051	1			T4	3		T11	1		T30	5
valid_sources[0x20]	2674	1			T11	1		T30	6		T14	523
valid_sources[0x21]	2867	1			T4	1		T11	1		T33	5
valid_sources[0x22]	2878	1			T4	2		T13	1		T18	1
valid_sources[0x23]	2989	1			T2	1		T11	1		T13	2
valid_sources[0x24]	3149	1			T4	4		T11	1		T19	8
valid_sources[0x25]	2973	1			T2	1		T26	5		T33	3
valid_sources[0x26]	2978	1			T26	1		T14	613		T56	1
valid_sources[0x27]	3018	1			T4	4		T18	2		T26	3
valid_sources[0x28]	2731	1			T30	7		T33	1		T14	542
valid_sources[0x29]	2906	1			T2	1		T11	2		T30	7
valid_sources[0x2a]	3131	1			T2	1		T11	3		T33	1
valid_sources[0x2b]	3040	1			T4	1		T13	1		T33	1
valid_sources[0x2c]	3170	1			T2	2		T11	1		T26	4
valid_sources[0x2d]	3369	1			T12	9		T33	1		T14	561
valid_sources[0x2e]	3086	1			T11	4		T33	1		T14	655
valid_sources[0x2f]	3035	1			T4	1		T11	2		T13	1
valid_sources[0x30]	2809	1			T4	1		T11	1		T14	487
valid_sources[0x31]	3034	1			T2	1		T33	6		T14	608
valid_sources[0x32]	3049	1			T26	3		T30	2		T14	591
valid_sources[0x33]	2940	1			T9	2		T11	1		T33	3
valid_sources[0x34]	3142	1			T9	6		T13	1		T26	2
valid_sources[0x35]	2820	1			T11	4		T14	540		T56	3
valid_sources[0x36]	2953	1			T11	2		T12	26		T26	2
valid_sources[0x37]	2890	1			T2	1		T12	2		T26	7
valid_sources[0x38]	3003	1			T18	1		T33	3		T14	618
valid_sources[0x39]	3202	1			T2	1		T4	1		T33	1
valid_sources[0x3a]	2909	1			T11	1		T33	1		T115	5
valid_sources[0x3b]	2966	1			T2	1		T11	2		T26	2
valid_sources[0x3c]	2907	1			T4	9		T36	1		T14	523
valid_sources[0x3d]	2930	1			T11	2		T115	1		T14	557
valid_sources[0x3e]	2856	1			T18	1		T33	1		T14	536
valid_sources[0x3f]	2908	1			T2	2		T11	2		T12	1
valid_sources[0x40]	3271	1			T11	1		T30	3		T14	656
valid_sources[0x41]	3064	1			T32	1		T14	527		T114	1
valid_sources[0x42]	3129	1			T11	1		T18	1		T26	3
valid_sources[0x43]	2978	1			T4	2		T9	12		T33	2
valid_sources[0x44]	3063	1			T2	1		T11	1		T18	7
valid_sources[0x45]	2865	1			T2	2		T33	1		T14	587
valid_sources[0x46]	3342	1			T26	1		T30	1		T33	4
valid_sources[0x47]	2929	1			T11	1		T12	7		T33	1
valid_sources[0x48]	2921	1			T11	2		T12	1		T26	4
valid_sources[0x49]	3233	1			T11	1		T33	3		T19	10
valid_sources[0x4a]	2987	1			T4	1		T11	3		T30	4
valid_sources[0x4b]	3077	1			T12	2		T33	10		T14	635
valid_sources[0x4c]	2844	1			T11	1		T13	2		T26	8
valid_sources[0x4d]	3183	1			T4	1		T30	5		T33	4
valid_sources[0x4e]	2938	1			T11	2		T33	1		T14	555
valid_sources[0x4f]	3075	1			T12	5		T33	4		T14	566
valid_sources[0x50]	2932	1			T4	2		T11	1		T14	599
valid_sources[0x51]	2952	1			T11	1		T12	2		T30	4
valid_sources[0x52]	2970	1			T17	10		T12	2		T18	2
valid_sources[0x53]	3132	1			T4	1		T11	2		T30	6
valid_sources[0x54]	3041	1			T4	3		T26	11		T14	534
valid_sources[0x55]	3200	1			T11	4		T13	4		T26	4
valid_sources[0x56]	2996	1			T2	3		T11	1		T33	1
valid_sources[0x57]	3033	1			T17	4		T11	3		T115	4
valid_sources[0x58]	2851	1			T4	1		T17	3		T33	3
valid_sources[0x59]	3005	1			T2	2		T14	620		T55	1
valid_sources[0x5a]	2852	1			T2	1		T17	1		T26	2
valid_sources[0x5b]	3290	1			T26	1		T30	1		T14	697
valid_sources[0x5c]	3422	1			T2	1		T11	2		T84	4
valid_sources[0x5d]	2893	1			T4	2		T11	1		T14	531
valid_sources[0x5e]	3009	1			T4	2		T11	3		T13	2
valid_sources[0x5f]	2891	1			T2	4		T14	559		T114	2
valid_sources[0x60]	2875	1			T2	2		T11	2		T12	1
valid_sources[0x61]	3052	1			T2	1		T11	2		T19	2
valid_sources[0x62]	3096	1			T2	2		T11	1		T12	1
valid_sources[0x63]	3128	1			T30	4		T14	546		T56	1
valid_sources[0x64]	3246	1			T11	2		T14	594		T114	2
valid_sources[0x65]	3171	1			T12	5		T33	1		T14	600
valid_sources[0x66]	3090	1			T11	1		T33	1		T115	8
valid_sources[0x67]	3062	1			T2	1		T12	2		T85	1
valid_sources[0x68]	3097	1			T11	1		T26	15		T19	2
valid_sources[0x69]	3166	1			T2	1		T33	6		T14	634
valid_sources[0x6a]	2836	1			T4	2		T11	1		T33	3
valid_sources[0x6b]	2967	1			T2	1		T13	8		T18	2
valid_sources[0x6c]	2874	1			T2	1		T11	2		T26	9
valid_sources[0x6d]	2738	1			T4	1		T33	1		T84	1
valid_sources[0x6e]	2678	1			T4	1		T26	3		T14	495
valid_sources[0x6f]	3088	1			T2	1		T12	4		T33	3
valid_sources[0x70]	2948	1			T11	2		T18	3		T14	683
valid_sources[0x71]	3125	1			T2	2		T11	1		T14	571
valid_sources[0x72]	3054	1			T11	1		T115	1		T14	552
valid_sources[0x73]	3095	1			T2	2		T11	2		T26	3
valid_sources[0x74]	2809	1			T4	1		T11	2		T13	1
valid_sources[0x75]	3138	1			T17	1		T11	3		T13	3
valid_sources[0x76]	3239	1			T4	3		T26	1		T33	3
valid_sources[0x77]	2993	1			T4	1		T11	1		T12	2
valid_sources[0x78]	3089	1			T11	2		T14	579		T56	1
valid_sources[0x79]	2955	1			T33	2		T84	2		T14	565
valid_sources[0x7a]	3086	1			T2	1		T14	558		T56	1
valid_sources[0x7b]	3071	1			T33	1		T14	600		T56	1
valid_sources[0x7c]	3036	1			T2	1		T12	2		T18	1
valid_sources[0x7d]	2996	1			T11	2		T33	3		T14	553
valid_sources[0x7e]	3052	1			T2	2		T9	2		T11	2
valid_sources[0x7f]	2935	1			T12	2		T84	1		T14	571
valid_sources[0x80]	3018	1			T2	1		T4	1		T11	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

185562

1

T2

11

T4

15

T6

4

values[0x0]

all_enables

biggest_size

274219

1

T14

55076

T15

25049

T16

65329

values[0x1]

all_enables

biggest_size

274394

1

T14

55359

T15

25265

T16

65226

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	59172	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

557208

1

T1

16

T2

36

T4

27

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	157023	1			T1	29		T2	64		T4	64
values[0x0]	212748	1			T5	2		T8	6		T24	10
values[0x1]	246609	1			T5	3		T8	3		T24	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28029	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

588351

1

T1

16

T2

44

T4

34

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2167	1			T10	1		T27	1		T115	1
valid_sources[0x01]	2397	1			T13	2		T115	1		T14	461
valid_sources[0x02]	3058	1			T6	2		T20	1		T14	485
valid_sources[0x03]	2256	1			T6	1		T32	1		T115	1
valid_sources[0x04]	2751	1			T115	1		T14	449		T58	1
valid_sources[0x05]	2333	1			T18	1		T14	520		T56	1
valid_sources[0x06]	2172	1			T14	493		T58	2		T87	1
valid_sources[0x07]	1901	1			T14	498		T37	3		T116	5
valid_sources[0x08]	2532	1			T2	2		T14	482		T117	1
valid_sources[0x09]	2428	1			T14	498		T118	1		T15	233
valid_sources[0x0a]	2684	1			T18	1		T19	2		T14	435
valid_sources[0x0b]	2198	1			T36	2		T14	400		T56	1
valid_sources[0x0c]	2613	1			T13	1		T85	1		T14	509
valid_sources[0x0d]	2283	1			T14	358		T119	2		T120	10
valid_sources[0x0e]	2283	1			T36	1		T115	1		T14	459
valid_sources[0x0f]	2175	1			T14	553		T55	2		T121	1
valid_sources[0x10]	2201	1			T85	1		T14	404		T56	1
valid_sources[0x11]	2082	1			T115	2		T14	509		T55	2
valid_sources[0x12]	2299	1			T36	2		T14	524		T56	1
valid_sources[0x13]	2295	1			T6	1		T36	3		T14	437
valid_sources[0x14]	2191	1			T14	428		T38	1		T113	1
valid_sources[0x15]	2442	1			T115	1		T14	473		T61	1
valid_sources[0x16]	2233	1			T85	1		T115	1		T14	475
valid_sources[0x17]	2426	1			T115	1		T14	446		T61	1
valid_sources[0x18]	2413	1			T14	469		T23	1		T15	195
valid_sources[0x19]	2501	1			T2	6		T6	1		T22	4
valid_sources[0x1a]	2083	1			T8	1		T20	1		T115	1
valid_sources[0x1b]	2027	1			T14	493		T122	1		T123	1
valid_sources[0x1c]	2105	1			T13	2		T31	1		T84	2
valid_sources[0x1d]	2063	1			T115	2		T14	484		T122	1
valid_sources[0x1e]	2672	1			T18	1		T84	2		T14	424
valid_sources[0x1f]	2350	1			T14	511		T23	1		T15	220
valid_sources[0x20]	2115	1			T1	10		T4	3		T5	3
valid_sources[0x21]	2534	1			T1	3		T115	1		T14	440
valid_sources[0x22]	2383	1			T6	1		T14	475		T61	1
valid_sources[0x23]	2407	1			T6	1		T10	3		T14	514
valid_sources[0x24]	2537	1			T13	2		T14	459		T38	2
valid_sources[0x25]	2379	1			T4	8		T19	4		T14	495
valid_sources[0x26]	2374	1			T14	479		T61	1		T122	1
valid_sources[0x27]	2352	1			T85	1		T14	436		T58	1
valid_sources[0x28]	2414	1			T20	1		T14	453		T117	1
valid_sources[0x29]	2527	1			T14	533		T56	1		T122	2
valid_sources[0x2a]	2286	1			T1	1		T14	504		T113	1
valid_sources[0x2b]	2210	1			T36	2		T115	3		T14	451
valid_sources[0x2c]	2337	1			T14	466		T56	1		T117	1
valid_sources[0x2d]	1949	1			T2	1		T4	7		T21	7
valid_sources[0x2e]	2221	1			T19	1		T14	488		T56	1
valid_sources[0x2f]	2588	1			T18	1		T85	1		T14	476
valid_sources[0x30]	2636	1			T115	1		T14	499		T61	2
valid_sources[0x31]	2138	1			T2	1		T32	1		T19	2
valid_sources[0x32]	2715	1			T10	1		T14	413		T56	1
valid_sources[0x33]	3234	1			T1	1		T36	3		T14	564
valid_sources[0x34]	2624	1			T115	1		T14	481		T61	1
valid_sources[0x35]	2568	1			T20	1		T14	455		T61	1
valid_sources[0x36]	2586	1			T18	1		T22	3		T14	431
valid_sources[0x37]	2160	1			T115	1		T14	457		T61	1
valid_sources[0x38]	2354	1			T20	1		T14	449		T122	3
valid_sources[0x39]	2475	1			T115	1		T14	495		T56	1
valid_sources[0x3a]	2936	1			T7	1		T85	1		T115	1
valid_sources[0x3b]	2027	1			T10	2		T14	480		T124	9
valid_sources[0x3c]	2112	1			T36	3		T14	474		T56	1
valid_sources[0x3d]	2384	1			T4	1		T115	1		T14	543
valid_sources[0x3e]	2144	1			T115	1		T14	486		T56	1
valid_sources[0x3f]	2551	1			T85	1		T115	1		T14	454
valid_sources[0x40]	1825	1			T115	1		T14	503		T113	1
valid_sources[0x41]	2269	1			T22	2		T14	410		T56	1
valid_sources[0x42]	2237	1			T18	1		T22	2		T14	505
valid_sources[0x43]	2886	1			T10	2		T115	1		T14	477
valid_sources[0x44]	2708	1			T19	1		T85	1		T115	3
valid_sources[0x45]	2351	1			T6	1		T10	1		T14	396
valid_sources[0x46]	2501	1			T6	1		T32	2		T115	1
valid_sources[0x47]	2708	1			T32	1		T22	3		T14	532
valid_sources[0x48]	2294	1			T25	1		T14	536		T56	1
valid_sources[0x49]	2007	1			T14	417		T61	3		T124	5
valid_sources[0x4a]	2342	1			T36	1		T14	535		T56	1
valid_sources[0x4b]	2455	1			T115	1		T14	554		T61	2
valid_sources[0x4c]	2182	1			T13	1		T85	1		T115	2
valid_sources[0x4d]	2557	1			T4	1		T36	1		T14	507
valid_sources[0x4e]	2651	1			T6	1		T14	456		T56	1
valid_sources[0x4f]	2898	1			T2	1		T13	1		T18	1
valid_sources[0x50]	2698	1			T4	1		T36	1		T115	1
valid_sources[0x51]	2899	1			T2	6		T20	1		T14	526
valid_sources[0x52]	2441	1			T2	2		T31	8		T14	478
valid_sources[0x53]	2731	1			T14	516		T58	2		T61	1
valid_sources[0x54]	2029	1			T18	1		T14	445		T121	1
valid_sources[0x55]	2216	1			T115	1		T14	509		T119	1
valid_sources[0x56]	2411	1			T115	1		T14	532		T56	1
valid_sources[0x57]	2748	1			T13	1		T32	2		T85	1
valid_sources[0x58]	2256	1			T18	2		T85	1		T14	421
valid_sources[0x59]	2155	1			T115	1		T14	464		T56	2
valid_sources[0x5a]	2057	1			T18	2		T14	373		T56	1
valid_sources[0x5b]	2806	1			T14	499		T121	1		T123	1
valid_sources[0x5c]	1996	1			T20	1		T14	473		T125	1
valid_sources[0x5d]	2194	1			T32	1		T14	556		T56	1
valid_sources[0x5e]	2267	1			T32	1		T85	2		T14	554
valid_sources[0x5f]	2120	1			T18	1		T32	1		T14	403
valid_sources[0x60]	1897	1			T14	468		T56	3		T58	1
valid_sources[0x61]	2240	1			T10	1		T19	1		T14	461
valid_sources[0x62]	2077	1			T13	1		T21	1		T14	509
valid_sources[0x63]	2729	1			T6	1		T14	457		T56	1
valid_sources[0x64]	2287	1			T18	1		T85	1		T36	1
valid_sources[0x65]	2346	1			T14	435		T56	1		T61	3
valid_sources[0x66]	2638	1			T6	3		T13	1		T19	2
valid_sources[0x67]	2547	1			T14	494		T61	1		T119	3
valid_sources[0x68]	2342	1			T115	1		T14	503		T58	1
valid_sources[0x69]	2345	1			T85	1		T14	441		T41	1
valid_sources[0x6a]	2937	1			T11	128		T19	1		T115	1
valid_sources[0x6b]	2179	1			T32	1		T14	484		T61	1
valid_sources[0x6c]	2610	1			T85	1		T115	2		T14	466
valid_sources[0x6d]	1908	1			T6	1		T20	1		T13	1
valid_sources[0x6e]	2051	1			T14	501		T126	1		T127	1
valid_sources[0x6f]	2181	1			T18	2		T115	2		T14	444
valid_sources[0x70]	2266	1			T20	1		T14	524		T122	2
valid_sources[0x71]	2095	1			T8	5		T14	469		T56	1
valid_sources[0x72]	2179	1			T2	5		T19	3		T14	447
valid_sources[0x73]	2261	1			T14	427		T61	2		T128	2
valid_sources[0x74]	1965	1			T2	2		T32	1		T14	468
valid_sources[0x75]	2942	1			T10	1		T13	1		T36	1
valid_sources[0x76]	2520	1			T14	408		T129	1		T117	1
valid_sources[0x77]	2065	1			T20	1		T115	1		T14	423
valid_sources[0x78]	2215	1			T10	1		T14	527		T56	1
valid_sources[0x79]	2250	1			T115	1		T14	439		T55	1
valid_sources[0x7a]	2555	1			T20	1		T14	389		T61	1
valid_sources[0x7b]	2345	1			T2	1		T115	2		T14	475
valid_sources[0x7c]	2191	1			T14	467		T121	2		T122	1
valid_sources[0x7d]	2552	1			T2	1		T32	2		T130	1
valid_sources[0x7e]	2212	1			T4	1		T32	1		T84	7
valid_sources[0x7f]	2725	1			T32	1		T19	1		T14	549
valid_sources[0x80]	2168	1			T1	4		T13	1		T14	454

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

141092

1

T1

16

T2

36

T4

27

values[0x0]

all_enables

biggest_size

207909

1

T5

1

T8

2

T24

3

values[0x1]

all_enables

biggest_size

208207

1

T8

1

T24

1

T31

2