Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 35497 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 447077 1 T1 9 T3 144626 T6 23



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 140083 1 T1 92 T3 36831 T6 187
values[0x0] 167509 1 T3 54705 T11 3485 T12 10983
values[0x1] 174982 1 T3 57085 T11 3517 T12 11566



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 17095 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 465479 1 T1 50 T3 146387 T6 109



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1512 1 T3 169 T10 1 T19 1
valid_sources[0x01] 1251 1 T10 1 T19 2 T100 2
valid_sources[0x02] 3006 1 T3 1666 T6 6 T10 2
valid_sources[0x03] 1560 1 T1 2 T3 296 T10 1
valid_sources[0x04] 1467 1 T1 2 T3 147 T10 2
valid_sources[0x05] 2050 1 T3 725 T10 1 T19 1
valid_sources[0x06] 2387 1 T3 976 T18 2 T74 1
valid_sources[0x07] 1752 1 T3 478 T10 1 T14 2
valid_sources[0x08] 2537 1 T3 1107 T104 1 T73 10
valid_sources[0x09] 1977 1 T3 781 T19 1 T60 1
valid_sources[0x0a] 2545 1 T3 1412 T10 1 T14 5
valid_sources[0x0b] 2108 1 T1 2 T3 752 T18 1
valid_sources[0x0c] 1246 1 T60 1 T11 38 T28 3
valid_sources[0x0d] 3039 1 T3 1767 T10 1 T19 1
valid_sources[0x0e] 1502 1 T3 249 T14 1 T60 1
valid_sources[0x0f] 2256 1 T3 993 T16 1 T104 2
valid_sources[0x10] 1313 1 T10 2 T15 1 T104 4
valid_sources[0x11] 2602 1 T3 1306 T15 1 T100 1
valid_sources[0x12] 1889 1 T3 490 T10 1 T18 1
valid_sources[0x13] 1909 1 T3 532 T18 3 T14 3
valid_sources[0x14] 2166 1 T3 914 T14 1 T15 1
valid_sources[0x15] 1438 1 T3 80 T17 2 T15 1
valid_sources[0x16] 1645 1 T3 366 T10 5 T15 2
valid_sources[0x17] 1712 1 T3 436 T10 2 T60 2
valid_sources[0x18] 1825 1 T3 428 T6 22 T15 2
valid_sources[0x19] 1306 1 T15 3 T16 2 T118 1
valid_sources[0x1a] 1990 1 T3 522 T14 1 T15 1
valid_sources[0x1b] 1713 1 T1 1 T3 464 T10 1
valid_sources[0x1c] 1352 1 T10 1 T60 1 T102 38
valid_sources[0x1d] 3231 1 T3 1906 T10 1 T15 1
valid_sources[0x1e] 1380 1 T3 126 T18 2 T15 2
valid_sources[0x1f] 2426 1 T1 2 T3 1176 T6 4
valid_sources[0x20] 2206 1 T3 930 T10 2 T18 1
valid_sources[0x21] 1879 1 T3 489 T10 1 T15 2
valid_sources[0x22] 2485 1 T3 1140 T14 3 T15 1
valid_sources[0x23] 1978 1 T1 2 T3 733 T10 1
valid_sources[0x24] 1818 1 T3 520 T10 1 T18 1
valid_sources[0x25] 3164 1 T3 1812 T10 1 T15 2
valid_sources[0x26] 1845 1 T1 2 T3 579 T18 1
valid_sources[0x27] 1694 1 T3 375 T10 2 T19 1
valid_sources[0x28] 1768 1 T3 499 T15 3 T60 1
valid_sources[0x29] 1777 1 T3 479 T6 11 T10 2
valid_sources[0x2a] 1428 1 T10 1 T18 1 T60 1
valid_sources[0x2b] 2242 1 T1 1 T3 1063 T10 1
valid_sources[0x2c] 3026 1 T1 3 T3 1686 T100 3
valid_sources[0x2d] 2007 1 T1 1 T3 575 T10 1
valid_sources[0x2e] 1470 1 T1 2 T3 184 T10 2
valid_sources[0x2f] 1550 1 T1 1 T3 315 T10 2
valid_sources[0x30] 2205 1 T1 2 T3 904 T10 1
valid_sources[0x31] 2476 1 T3 1090 T10 1 T60 4
valid_sources[0x32] 1720 1 T1 1 T3 445 T6 1
valid_sources[0x33] 1800 1 T3 556 T60 1 T100 1
valid_sources[0x34] 1344 1 T1 1 T15 1 T60 2
valid_sources[0x35] 1580 1 T3 95 T19 1 T14 1
valid_sources[0x36] 1271 1 T14 1 T15 1 T74 1
valid_sources[0x37] 2151 1 T3 749 T10 2 T18 1
valid_sources[0x38] 1767 1 T3 463 T10 3 T18 1
valid_sources[0x39] 1693 1 T3 357 T15 1 T119 1
valid_sources[0x3a] 1349 1 T3 42 T16 2 T105 15
valid_sources[0x3b] 2106 1 T3 743 T10 2 T15 1
valid_sources[0x3c] 1573 1 T3 302 T10 1 T18 1
valid_sources[0x3d] 1870 1 T3 624 T18 1 T19 1
valid_sources[0x3e] 1312 1 T1 1 T10 1 T19 1
valid_sources[0x3f] 1783 1 T3 440 T14 2 T100 1
valid_sources[0x40] 1673 1 T3 318 T10 2 T60 1
valid_sources[0x41] 2012 1 T3 749 T10 2 T14 5
valid_sources[0x42] 2263 1 T3 991 T10 4 T14 4
valid_sources[0x43] 1507 1 T3 255 T100 2 T104 2
valid_sources[0x44] 2050 1 T3 589 T10 2 T19 1
valid_sources[0x45] 1435 1 T3 70 T10 2 T18 1
valid_sources[0x46] 2010 1 T3 661 T60 1 T100 1
valid_sources[0x47] 2103 1 T3 860 T100 1 T103 2
valid_sources[0x48] 1678 1 T3 414 T104 4 T119 1
valid_sources[0x49] 1394 1 T3 120 T16 1 T118 1
valid_sources[0x4a] 1395 1 T3 198 T10 2 T15 1
valid_sources[0x4b] 1776 1 T3 420 T10 1 T14 2
valid_sources[0x4c] 2059 1 T3 861 T10 1 T15 2
valid_sources[0x4d] 1806 1 T1 1 T3 516 T119 3
valid_sources[0x4e] 2176 1 T3 929 T10 2 T19 1
valid_sources[0x4f] 1367 1 T3 24 T10 1 T15 1
valid_sources[0x50] 1708 1 T1 1 T3 296 T10 1
valid_sources[0x51] 1706 1 T3 293 T10 1 T100 1
valid_sources[0x52] 1997 1 T1 1 T3 581 T10 1
valid_sources[0x53] 1508 1 T3 279 T6 1 T10 1
valid_sources[0x54] 1405 1 T3 109 T18 1 T15 1
valid_sources[0x55] 1559 1 T3 237 T100 4 T118 1
valid_sources[0x56] 2300 1 T1 1 T3 1075 T10 2
valid_sources[0x57] 1998 1 T3 688 T10 1 T19 1
valid_sources[0x58] 1353 1 T1 1 T3 50 T10 2
valid_sources[0x59] 2028 1 T3 790 T6 4 T10 1
valid_sources[0x5a] 1781 1 T3 495 T14 3 T15 2
valid_sources[0x5b] 1643 1 T3 361 T18 1 T14 4
valid_sources[0x5c] 1542 1 T3 328 T10 1 T18 1
valid_sources[0x5d] 2092 1 T3 810 T19 1 T15 1
valid_sources[0x5e] 1867 1 T3 631 T18 3 T19 1
valid_sources[0x5f] 1919 1 T3 649 T10 2 T100 1
valid_sources[0x60] 2361 1 T3 1115 T10 2 T19 3
valid_sources[0x61] 2015 1 T1 1 T3 855 T10 1
valid_sources[0x62] 1451 1 T3 172 T10 1 T14 3
valid_sources[0x63] 1328 1 T1 1 T3 43 T10 2
valid_sources[0x64] 2335 1 T3 1025 T14 5 T60 1
valid_sources[0x65] 2078 1 T3 812 T14 2 T16 2
valid_sources[0x66] 2087 1 T3 687 T10 2 T16 2
valid_sources[0x67] 2606 1 T3 1375 T15 3 T60 1
valid_sources[0x68] 2042 1 T3 833 T72 13 T118 1
valid_sources[0x69] 2496 1 T3 1025 T100 1 T74 2
valid_sources[0x6a] 1457 1 T1 1 T3 176 T60 1
valid_sources[0x6b] 1386 1 T3 196 T10 1 T19 1
valid_sources[0x6c] 1850 1 T3 529 T10 1 T60 1
valid_sources[0x6d] 1825 1 T1 2 T3 485 T14 3
valid_sources[0x6e] 2678 1 T3 1417 T10 2 T17 1
valid_sources[0x6f] 1590 1 T3 214 T100 1 T120 4
valid_sources[0x70] 1497 1 T3 195 T10 1 T18 1
valid_sources[0x71] 1502 1 T1 1 T3 102 T10 2
valid_sources[0x72] 1374 1 T3 49 T10 1 T19 1
valid_sources[0x73] 1955 1 T1 2 T3 686 T6 1
valid_sources[0x74] 1773 1 T1 1 T3 492 T10 1
valid_sources[0x75] 2119 1 T3 731 T10 1 T118 2
valid_sources[0x76] 3673 1 T3 2434 T15 1 T60 1
valid_sources[0x77] 1542 1 T1 1 T3 195 T10 2
valid_sources[0x78] 1490 1 T3 140 T6 6 T10 1
valid_sources[0x79] 1734 1 T3 415 T10 1 T15 2
valid_sources[0x7a] 1494 1 T1 2 T3 158 T14 2
valid_sources[0x7b] 2338 1 T1 1 T3 1064 T14 1
valid_sources[0x7c] 2650 1 T1 2 T3 1250 T100 1
valid_sources[0x7d] 2103 1 T3 839 T10 1 T18 1
valid_sources[0x7e] 1540 1 T3 205 T60 3 T104 5
valid_sources[0x7f] 1283 1 T6 7 T10 1 T14 1
valid_sources[0x80] 2321 1 T3 971 T18 1 T100 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 113723 1 T1 9 T3 35838 T6 23
values[0x0] all_enables biggest_size 166050 1 T3 54226 T11 3449 T12 10890
values[0x1] all_enables biggest_size 167304 1 T3 54562 T11 3375 T12 11024


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 39047 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 347557 1 T1 19 T3 105469 T4 24



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 101281 1 T1 32 T2 1 T3 28587
values[0x0] 132440 1 T3 40132 T5 10 T9 1
values[0x1] 152883 1 T3 46687 T5 8 T9 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 19516 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 367088 1 T1 23 T2 1 T3 111128



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 911 1 T3 107 T60 2 T74 2
valid_sources[0x01] 1843 1 T3 304 T6 2 T14 1
valid_sources[0x02] 1817 1 T3 488 T73 3 T74 2
valid_sources[0x03] 1308 1 T1 2 T3 138 T102 1
valid_sources[0x04] 1393 1 T3 449 T8 1 T73 2
valid_sources[0x05] 2073 1 T3 1058 T4 4 T6 1
valid_sources[0x06] 1278 1 T3 278 T8 3 T14 2
valid_sources[0x07] 1264 1 T3 335 T14 1 T20 1
valid_sources[0x08] 1008 1 T3 232 T14 6 T73 1
valid_sources[0x09] 1457 1 T3 593 T120 1 T39 1
valid_sources[0x0a] 1423 1 T3 293 T60 1 T73 2
valid_sources[0x0b] 1321 1 T3 364 T24 9 T73 1
valid_sources[0x0c] 1660 1 T3 925 T14 1 T20 1
valid_sources[0x0d] 1079 1 T3 329 T58 1 T121 1
valid_sources[0x0e] 1735 1 T3 389 T11 256 T122 1
valid_sources[0x0f] 1554 1 T3 167 T102 2 T35 1
valid_sources[0x10] 1448 1 T3 499 T6 4 T102 1
valid_sources[0x11] 1468 1 T3 423 T38 4 T120 2
valid_sources[0x12] 1639 1 T3 736 T123 10 T124 1
valid_sources[0x13] 1760 1 T3 654 T60 1 T16 2
valid_sources[0x14] 1651 1 T3 322 T6 1 T18 1
valid_sources[0x15] 1323 1 T1 2 T3 167 T19 1
valid_sources[0x16] 1158 1 T3 204 T16 2 T46 3
valid_sources[0x17] 1518 1 T1 1 T3 757 T6 1
valid_sources[0x18] 1904 1 T3 511 T60 1 T103 13
valid_sources[0x19] 1208 1 T3 43 T6 5 T18 6
valid_sources[0x1a] 1632 1 T3 426 T102 2 T39 1
valid_sources[0x1b] 1492 1 T3 712 T6 9 T60 1
valid_sources[0x1c] 1064 1 T3 358 T18 1 T122 2
valid_sources[0x1d] 2012 1 T3 626 T60 1 T102 1
valid_sources[0x1e] 845 1 T3 220 T74 2 T11 2
valid_sources[0x1f] 2069 1 T1 1 T3 922 T125 1
valid_sources[0x20] 1471 1 T3 413 T102 1 T40 3
valid_sources[0x21] 1953 1 T3 336 T4 6 T11 2
valid_sources[0x22] 1746 1 T3 766 T14 2 T102 2
valid_sources[0x23] 1306 1 T1 2 T3 599 T11 3
valid_sources[0x24] 1432 1 T3 338 T18 1 T102 1
valid_sources[0x25] 1616 1 T3 1048 T6 4 T60 3
valid_sources[0x26] 963 1 T1 1 T3 128 T6 1
valid_sources[0x27] 1459 1 T3 363 T16 1 T46 1
valid_sources[0x28] 1925 1 T1 1 T3 332 T6 2
valid_sources[0x29] 1391 1 T3 682 T60 1 T73 6
valid_sources[0x2a] 1734 1 T3 761 T14 1 T122 1
valid_sources[0x2b] 1735 1 T3 886 T14 1 T21 1
valid_sources[0x2c] 1345 1 T3 167 T74 1 T124 2
valid_sources[0x2d] 1941 1 T1 2 T3 546 T16 1
valid_sources[0x2e] 1573 1 T3 620 T18 1 T74 1
valid_sources[0x2f] 932 1 T1 1 T3 239 T19 4
valid_sources[0x30] 1794 1 T3 1138 T6 1 T73 2
valid_sources[0x31] 903 1 T3 243 T102 2 T40 1
valid_sources[0x32] 1187 1 T3 360 T60 2 T73 1
valid_sources[0x33] 839 1 T3 48 T60 2 T102 1
valid_sources[0x34] 1600 1 T3 368 T122 1 T40 3
valid_sources[0x35] 2263 1 T1 2 T3 483 T4 1
valid_sources[0x36] 1771 1 T3 660 T74 1 T121 1
valid_sources[0x37] 1674 1 T3 212 T6 1 T60 1
valid_sources[0x38] 1534 1 T3 555 T4 1 T18 1
valid_sources[0x39] 1651 1 T3 269 T15 64 T102 2
valid_sources[0x3a] 1724 1 T3 279 T20 1 T102 1
valid_sources[0x3b] 2046 1 T3 1061 T6 1 T102 1
valid_sources[0x3c] 1565 1 T3 576 T19 2 T102 1
valid_sources[0x3d] 1812 1 T3 293 T60 1 T11 294
valid_sources[0x3e] 1229 1 T3 165 T74 1 T126 1
valid_sources[0x3f] 1219 1 T3 280 T60 1 T102 1
valid_sources[0x40] 1297 1 T3 479 T6 1 T60 1
valid_sources[0x41] 1831 1 T3 786 T60 1 T73 5
valid_sources[0x42] 1479 1 T3 245 T73 2 T34 2
valid_sources[0x43] 1183 1 T3 302 T12 136 T127 1
valid_sources[0x44] 1465 1 T3 568 T128 1 T40 1
valid_sources[0x45] 1454 1 T3 234 T6 3 T16 4
valid_sources[0x46] 1783 1 T3 570 T11 230 T34 1
valid_sources[0x47] 2314 1 T3 656 T60 1 T102 2
valid_sources[0x48] 1719 1 T3 379 T122 1 T12 151
valid_sources[0x49] 900 1 T3 303 T102 1 T121 1
valid_sources[0x4a] 1913 1 T3 434 T74 2 T128 1
valid_sources[0x4b] 1737 1 T3 553 T6 1 T14 6
valid_sources[0x4c] 2085 1 T3 649 T11 143 T12 225
valid_sources[0x4d] 1138 1 T3 336 T105 2 T21 1
valid_sources[0x4e] 1574 1 T3 482 T14 1 T20 1
valid_sources[0x4f] 1313 1 T3 501 T12 84 T129 1
valid_sources[0x50] 2297 1 T3 910 T5 18 T11 453
valid_sources[0x51] 1705 1 T3 549 T12 7 T130 1
valid_sources[0x52] 1130 1 T3 37 T6 1 T19 2
valid_sources[0x53] 1305 1 T1 1 T3 468 T20 1
valid_sources[0x54] 1378 1 T3 282 T74 2 T21 1
valid_sources[0x55] 1287 1 T3 357 T6 1 T105 1
valid_sources[0x56] 1092 1 T3 484 T20 2 T102 1
valid_sources[0x57] 1239 1 T3 81 T6 1 T120 1
valid_sources[0x58] 1868 1 T3 681 T12 114 T131 1
valid_sources[0x59] 1445 1 T3 62 T102 1 T38 2
valid_sources[0x5a] 1430 1 T3 349 T102 1 T11 175
valid_sources[0x5b] 1701 1 T3 389 T128 1 T12 8
valid_sources[0x5c] 1118 1 T3 413 T12 5 T127 1
valid_sources[0x5d] 1818 1 T3 794 T8 4 T18 1
valid_sources[0x5e] 1326 1 T3 344 T6 1 T74 2
valid_sources[0x5f] 1493 1 T3 656 T14 1 T73 5
valid_sources[0x60] 1263 1 T3 80 T14 2 T73 1
valid_sources[0x61] 1292 1 T3 637 T60 1 T34 1
valid_sources[0x62] 1233 1 T3 485 T60 2 T105 2
valid_sources[0x63] 1975 1 T3 741 T46 1 T74 1
valid_sources[0x64] 1422 1 T3 460 T102 2 T74 1
valid_sources[0x65] 1757 1 T3 465 T102 1 T128 5
valid_sources[0x66] 1773 1 T3 740 T102 2 T73 1
valid_sources[0x67] 2001 1 T3 780 T6 1 T126 1
valid_sources[0x68] 1170 1 T3 261 T14 1 T125 1
valid_sources[0x69] 1293 1 T3 368 T20 1 T73 1
valid_sources[0x6a] 1917 1 T3 611 T74 2 T121 1
valid_sources[0x6b] 1597 1 T3 563 T12 188 T132 3
valid_sources[0x6c] 1418 1 T3 384 T6 1 T20 1
valid_sources[0x6d] 1460 1 T3 599 T6 1 T60 2
valid_sources[0x6e] 1447 1 T3 540 T16 6 T21 1
valid_sources[0x6f] 1312 1 T3 425 T20 1 T46 3
valid_sources[0x70] 2283 1 T2 1 T3 1191 T18 2
valid_sources[0x71] 1432 1 T3 335 T6 2 T46 1
valid_sources[0x72] 1387 1 T3 183 T6 3 T60 1
valid_sources[0x73] 1394 1 T3 534 T60 1 T73 2
valid_sources[0x74] 1272 1 T3 194 T18 1 T73 3
valid_sources[0x75] 1203 1 T3 346 T102 1 T74 2
valid_sources[0x76] 1487 1 T3 265 T18 1 T73 1
valid_sources[0x77] 1430 1 T3 327 T14 1 T102 2
valid_sources[0x78] 1582 1 T3 355 T18 1 T14 2
valid_sources[0x79] 1601 1 T1 1 T3 598 T60 1
valid_sources[0x7a] 1766 1 T1 1 T3 539 T14 2
valid_sources[0x7b] 2070 1 T3 871 T73 1 T133 1
valid_sources[0x7c] 1700 1 T3 713 T11 1 T21 1
valid_sources[0x7d] 1874 1 T3 297 T20 1 T25 1
valid_sources[0x7e] 1343 1 T3 278 T74 1 T128 1
valid_sources[0x7f] 1639 1 T3 517 T6 2 T16 2
valid_sources[0x80] 1597 1 T3 411 T74 1 T58 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 88984 1 T1 19 T3 26706 T4 24
values[0x0] all_enables biggest_size 129198 1 T3 39344 T5 2 T56 1
values[0x1] all_enables biggest_size 129375 1 T3 39419 T5 1 T9 1

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