Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	42734	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

726865

1

T1

9

T3

3

T5

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	212378	1			T1	86		T3	55		T5	57
values[0x0]	274063	1			T7	46592		T12	13389		T13	53450
values[0x1]	283158	1			T7	48610		T12	13753		T13	55310

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21151	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

748448

1

T1

52

T3

27

T5

39

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3036	1			T7	520		T12	165		T37	6
valid_sources[0x01]	2931	1			T7	370		T12	177		T43	6
valid_sources[0x02]	2883	1			T5	3		T7	416		T12	147
valid_sources[0x03]	3092	1			T3	1		T5	1		T7	515
valid_sources[0x04]	3051	1			T7	603		T9	1		T10	1
valid_sources[0x05]	3052	1			T7	403		T9	7		T12	129
valid_sources[0x06]	3057	1			T7	510		T9	1		T12	149
valid_sources[0x07]	2890	1			T1	22		T7	429		T9	2
valid_sources[0x08]	2962	1			T7	485		T10	2		T12	126
valid_sources[0x09]	2877	1			T1	3		T6	2		T7	415
valid_sources[0x0a]	2846	1			T7	402		T12	136		T69	1
valid_sources[0x0b]	2686	1			T7	379		T10	1		T12	135
valid_sources[0x0c]	2906	1			T7	524		T9	2		T10	1
valid_sources[0x0d]	3011	1			T3	1		T7	482		T10	2
valid_sources[0x0e]	2908	1			T3	1		T7	440		T9	3
valid_sources[0x0f]	3040	1			T7	558		T12	121		T122	1
valid_sources[0x10]	2953	1			T5	1		T7	459		T12	141
valid_sources[0x11]	2946	1			T3	1		T7	356		T12	146
valid_sources[0x12]	2977	1			T7	511		T12	134		T107	1
valid_sources[0x13]	3099	1			T3	1		T7	440		T9	1
valid_sources[0x14]	3044	1			T7	415		T10	2		T12	142
valid_sources[0x15]	2830	1			T7	385		T11	7		T12	152
valid_sources[0x16]	2957	1			T1	4		T5	1		T7	447
valid_sources[0x17]	3082	1			T7	593		T11	6		T12	132
valid_sources[0x18]	2936	1			T7	539		T9	2		T11	3
valid_sources[0x19]	2956	1			T7	426		T12	136		T69	3
valid_sources[0x1a]	3074	1			T7	555		T11	1		T12	140
valid_sources[0x1b]	2944	1			T7	460		T11	8		T12	132
valid_sources[0x1c]	2864	1			T7	465		T11	3		T12	138
valid_sources[0x1d]	2850	1			T5	1		T7	444		T11	4
valid_sources[0x1e]	3186	1			T5	2		T7	705		T12	150
valid_sources[0x1f]	3308	1			T7	713		T11	3		T12	137
valid_sources[0x20]	3120	1			T7	540		T11	1		T12	126
valid_sources[0x21]	3105	1			T7	672		T12	135		T123	1
valid_sources[0x22]	2950	1			T3	1		T7	483		T10	1
valid_sources[0x23]	2867	1			T7	413		T9	2		T12	159
valid_sources[0x24]	2884	1			T7	398		T11	1		T12	153
valid_sources[0x25]	3095	1			T1	12		T7	598		T9	1
valid_sources[0x26]	3011	1			T7	487		T10	1		T11	5
valid_sources[0x27]	2908	1			T6	1		T7	467		T10	1
valid_sources[0x28]	2884	1			T7	496		T12	148		T124	4
valid_sources[0x29]	3016	1			T3	1		T7	518		T10	1
valid_sources[0x2a]	3068	1			T7	502		T12	151		T106	38
valid_sources[0x2b]	2961	1			T7	520		T12	147		T107	1
valid_sources[0x2c]	2999	1			T7	520		T12	128		T14	5
valid_sources[0x2d]	3060	1			T7	498		T10	3		T12	141
valid_sources[0x2e]	2983	1			T1	2		T7	546		T12	138
valid_sources[0x2f]	2927	1			T7	521		T11	3		T12	140
valid_sources[0x30]	2903	1			T7	440		T9	2		T12	152
valid_sources[0x31]	3038	1			T7	494		T9	2		T10	1
valid_sources[0x32]	2974	1			T7	496		T12	120		T69	1
valid_sources[0x33]	3009	1			T6	1		T7	555		T9	1
valid_sources[0x34]	2789	1			T7	345		T12	122		T107	1
valid_sources[0x35]	3150	1			T3	1		T5	1		T7	573
valid_sources[0x36]	2991	1			T7	485		T12	148		T107	3
valid_sources[0x37]	3047	1			T7	540		T9	6		T12	126
valid_sources[0x38]	3144	1			T7	613		T12	178		T69	3
valid_sources[0x39]	2737	1			T7	390		T10	2		T12	141
valid_sources[0x3a]	2906	1			T7	461		T10	1		T11	1
valid_sources[0x3b]	3023	1			T3	2		T7	516		T9	1
valid_sources[0x3c]	3082	1			T7	491		T12	155		T15	1
valid_sources[0x3d]	2903	1			T1	1		T3	2		T7	534
valid_sources[0x3e]	2921	1			T5	1		T7	565		T9	1
valid_sources[0x3f]	2969	1			T7	471		T12	139		T123	1
valid_sources[0x40]	3114	1			T3	1		T7	484		T9	1
valid_sources[0x41]	2796	1			T7	378		T9	1		T10	1
valid_sources[0x42]	2743	1			T7	357		T12	130		T123	1
valid_sources[0x43]	2895	1			T7	480		T12	141		T123	1
valid_sources[0x44]	2920	1			T7	525		T10	3		T12	129
valid_sources[0x45]	3079	1			T7	531		T12	137		T123	1
valid_sources[0x46]	2785	1			T3	2		T5	1		T7	378
valid_sources[0x47]	2929	1			T7	455		T9	2		T12	159
valid_sources[0x48]	3145	1			T7	667		T10	1		T12	164
valid_sources[0x49]	3176	1			T5	1		T7	593		T12	148
valid_sources[0x4a]	2888	1			T3	2		T7	469		T9	2
valid_sources[0x4b]	3009	1			T7	564		T12	148		T69	4
valid_sources[0x4c]	3038	1			T1	1		T7	510		T12	147
valid_sources[0x4d]	2921	1			T3	1		T7	419		T11	6
valid_sources[0x4e]	2944	1			T5	1		T7	439		T10	1
valid_sources[0x4f]	2975	1			T7	461		T10	1		T12	122
valid_sources[0x50]	3057	1			T7	534		T10	2		T12	131
valid_sources[0x51]	3113	1			T5	1		T7	534		T9	3
valid_sources[0x52]	2958	1			T5	1		T7	608		T9	2
valid_sources[0x53]	2863	1			T7	347		T10	1		T12	130
valid_sources[0x54]	2977	1			T7	529		T12	122		T122	1
valid_sources[0x55]	3116	1			T3	1		T7	668		T12	143
valid_sources[0x56]	3180	1			T7	384		T9	1		T12	159
valid_sources[0x57]	2966	1			T7	469		T11	7		T12	136
valid_sources[0x58]	3062	1			T7	488		T10	4		T12	147
valid_sources[0x59]	2897	1			T7	451		T10	2		T12	176
valid_sources[0x5a]	2988	1			T7	480		T9	1		T10	1
valid_sources[0x5b]	2879	1			T7	453		T11	4		T12	154
valid_sources[0x5c]	2878	1			T7	483		T10	1		T12	135
valid_sources[0x5d]	3035	1			T5	2		T7	603		T12	156
valid_sources[0x5e]	3085	1			T7	625		T12	142		T69	1
valid_sources[0x5f]	2966	1			T7	446		T12	147		T107	2
valid_sources[0x60]	3150	1			T3	1		T7	504		T10	3
valid_sources[0x61]	3003	1			T7	479		T9	1		T12	127
valid_sources[0x62]	2924	1			T7	476		T12	155		T125	1
valid_sources[0x63]	2974	1			T5	1		T7	444		T9	1
valid_sources[0x64]	3206	1			T3	1		T7	492		T12	128
valid_sources[0x65]	3084	1			T7	512		T12	157		T69	1
valid_sources[0x66]	3007	1			T3	1		T7	534		T9	1
valid_sources[0x67]	3000	1			T3	1		T7	408		T10	1
valid_sources[0x68]	3044	1			T5	1		T7	471		T10	1
valid_sources[0x69]	3058	1			T7	531		T12	139		T122	1
valid_sources[0x6a]	2941	1			T7	592		T9	1		T12	122
valid_sources[0x6b]	3075	1			T7	574		T12	124		T122	3
valid_sources[0x6c]	2915	1			T7	477		T12	142		T69	2
valid_sources[0x6d]	3163	1			T3	1		T7	524		T9	1
valid_sources[0x6e]	2955	1			T7	508		T10	1		T12	141
valid_sources[0x6f]	3035	1			T7	439		T9	3		T12	128
valid_sources[0x70]	3114	1			T5	3		T7	495		T10	3
valid_sources[0x71]	2786	1			T3	1		T7	479		T12	134
valid_sources[0x72]	3044	1			T7	604		T12	149		T49	3
valid_sources[0x73]	3016	1			T7	455		T10	1		T12	150
valid_sources[0x74]	2952	1			T3	2		T7	495		T9	2
valid_sources[0x75]	2946	1			T7	590		T12	136		T107	1
valid_sources[0x76]	3068	1			T6	5		T7	545		T10	1
valid_sources[0x77]	3065	1			T7	501		T12	145		T107	2
valid_sources[0x78]	3025	1			T7	559		T12	138		T107	1
valid_sources[0x79]	3052	1			T7	459		T12	149		T69	1
valid_sources[0x7a]	2999	1			T1	3		T5	2		T7	561
valid_sources[0x7b]	3179	1			T3	1		T7	605		T10	2
valid_sources[0x7c]	3034	1			T7	491		T12	146		T123	1
valid_sources[0x7d]	3063	1			T3	1		T7	525		T10	2
valid_sources[0x7e]	3283	1			T5	1		T7	661		T9	2
valid_sources[0x7f]	3204	1			T5	1		T7	526		T11	8
valid_sources[0x80]	2872	1			T7	450		T9	2		T10	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

184266

1

T1

9

T3

3

T5

9

values[0x0]

all_enables

biggest_size

271706

1

T7

46191

T12

13291

T13

52976

values[0x1]

all_enables

biggest_size

270893

1

T7

46505

T12

13208

T13

52925

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	58849	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

560272

1

T1

15

T3

20

T5

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	158704	1			T1	32		T2	1		T3	32
values[0x0]	212919	1			T4	1		T7	34643		T12	9667
values[0x1]	247498	1			T4	1		T7	40972		T12	11478

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28070	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

591051

1

T1

19

T2

1

T3

22

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2233	1			T7	380		T12	98		T37	3
valid_sources[0x01]	2531	1			T7	359		T12	110		T36	1
valid_sources[0x02]	2306	1			T7	454		T12	99		T126	1
valid_sources[0x03]	2322	1			T5	1		T7	406		T12	98
valid_sources[0x04]	2423	1			T1	3		T7	364		T12	117
valid_sources[0x05]	2260	1			T7	378		T12	111		T13	466
valid_sources[0x06]	2363	1			T7	446		T12	108		T63	1
valid_sources[0x07]	2409	1			T7	308		T12	90		T13	473
valid_sources[0x08]	2625	1			T7	400		T12	102		T13	481
valid_sources[0x09]	2266	1			T7	315		T12	105		T13	470
valid_sources[0x0a]	2473	1			T7	377		T12	116		T108	1
valid_sources[0x0b]	2465	1			T7	406		T12	109		T16	2
valid_sources[0x0c]	2578	1			T7	433		T12	118		T36	1
valid_sources[0x0d]	2363	1			T2	1		T7	469		T12	95
valid_sources[0x0e]	2354	1			T7	364		T12	120		T69	2
valid_sources[0x0f]	2299	1			T7	409		T12	89		T13	453
valid_sources[0x10]	2391	1			T7	439		T12	124		T108	4
valid_sources[0x11]	2418	1			T7	418		T12	104		T49	2
valid_sources[0x12]	2281	1			T7	310		T12	115		T36	1
valid_sources[0x13]	2592	1			T7	372		T12	109		T37	3
valid_sources[0x14]	2525	1			T7	371		T12	103		T40	2
valid_sources[0x15]	2516	1			T7	427		T12	117		T37	2
valid_sources[0x16]	2385	1			T7	458		T12	111		T36	1
valid_sources[0x17]	2319	1			T7	361		T12	113		T126	1
valid_sources[0x18]	2279	1			T7	348		T12	118		T13	442
valid_sources[0x19]	2504	1			T7	514		T12	95		T35	4
valid_sources[0x1a]	2795	1			T7	444		T12	127		T13	469
valid_sources[0x1b]	2168	1			T7	321		T12	126		T13	485
valid_sources[0x1c]	2464	1			T7	432		T12	108		T37	1
valid_sources[0x1d]	2400	1			T7	460		T12	127		T13	434
valid_sources[0x1e]	2618	1			T7	436		T12	127		T14	13
valid_sources[0x1f]	2423	1			T7	453		T8	1		T12	93
valid_sources[0x20]	2341	1			T7	372		T12	118		T37	4
valid_sources[0x21]	2265	1			T5	1		T7	457		T12	126
valid_sources[0x22]	2447	1			T7	373		T12	113		T35	3
valid_sources[0x23]	2416	1			T7	408		T8	1		T12	110
valid_sources[0x24]	2374	1			T7	385		T12	129		T127	5
valid_sources[0x25]	2399	1			T7	464		T12	113		T69	1
valid_sources[0x26]	2505	1			T7	310		T12	108		T108	3
valid_sources[0x27]	2466	1			T7	334		T12	104		T13	477
valid_sources[0x28]	2375	1			T7	319		T12	117		T40	3
valid_sources[0x29]	2230	1			T7	438		T12	110		T35	1
valid_sources[0x2a]	2311	1			T7	313		T12	95		T37	1
valid_sources[0x2b]	2462	1			T7	430		T12	110		T39	1
valid_sources[0x2c]	2445	1			T7	364		T12	104		T108	2
valid_sources[0x2d]	2154	1			T7	345		T12	128		T41	1
valid_sources[0x2e]	2565	1			T5	2		T7	529		T12	116
valid_sources[0x2f]	2597	1			T5	2		T7	412		T12	106
valid_sources[0x30]	2303	1			T7	501		T8	1		T12	108
valid_sources[0x31]	2377	1			T7	348		T12	114		T16	6
valid_sources[0x32]	2281	1			T7	386		T12	112		T69	4
valid_sources[0x33]	2469	1			T7	368		T12	123		T13	448
valid_sources[0x34]	2225	1			T7	331		T8	1		T12	119
valid_sources[0x35]	2685	1			T7	377		T12	131		T16	5
valid_sources[0x36]	2639	1			T7	445		T12	114		T49	1
valid_sources[0x37]	2565	1			T1	5		T7	503		T12	106
valid_sources[0x38]	2306	1			T7	333		T8	2		T12	109
valid_sources[0x39]	2324	1			T7	445		T12	117		T36	1
valid_sources[0x3a]	2468	1			T7	493		T12	122		T13	464
valid_sources[0x3b]	2796	1			T7	629		T12	95		T38	1
valid_sources[0x3c]	2309	1			T1	4		T7	363		T12	102
valid_sources[0x3d]	2443	1			T5	1		T7	390		T12	111
valid_sources[0x3e]	2201	1			T7	357		T12	107		T128	1
valid_sources[0x3f]	2434	1			T7	393		T8	1		T12	116
valid_sources[0x40]	2352	1			T7	392		T12	95		T39	1
valid_sources[0x41]	2521	1			T7	381		T12	107		T13	473
valid_sources[0x42]	2308	1			T7	261		T12	104		T40	1
valid_sources[0x43]	2481	1			T7	458		T12	113		T37	4
valid_sources[0x44]	2396	1			T7	364		T12	97		T23	1
valid_sources[0x45]	2293	1			T7	382		T12	116		T126	2
valid_sources[0x46]	2436	1			T7	346		T12	120		T65	1
valid_sources[0x47]	2381	1			T7	392		T12	119		T37	3
valid_sources[0x48]	2315	1			T7	338		T12	107		T43	1
valid_sources[0x49]	2316	1			T7	397		T12	118		T14	5
valid_sources[0x4a]	2457	1			T7	418		T12	106		T69	4
valid_sources[0x4b]	2199	1			T7	379		T12	100		T36	1
valid_sources[0x4c]	2393	1			T1	2		T7	424		T12	114
valid_sources[0x4d]	2623	1			T1	3		T5	1		T7	479
valid_sources[0x4e]	2516	1			T7	382		T8	1		T12	121
valid_sources[0x4f]	2499	1			T5	1		T7	356		T12	111
valid_sources[0x50]	2537	1			T7	488		T12	111		T13	457
valid_sources[0x51]	2345	1			T7	402		T12	100		T37	1
valid_sources[0x52]	2298	1			T5	1		T7	433		T12	120
valid_sources[0x53]	2340	1			T7	373		T12	107		T13	425
valid_sources[0x54]	2531	1			T7	360		T12	110		T13	456
valid_sources[0x55]	2214	1			T1	1		T7	340		T12	128
valid_sources[0x56]	2271	1			T5	1		T7	417		T12	109
valid_sources[0x57]	2404	1			T7	393		T12	113		T13	468
valid_sources[0x58]	2295	1			T7	293		T12	118		T22	1
valid_sources[0x59]	2368	1			T7	436		T12	94		T38	1
valid_sources[0x5a]	2309	1			T5	2		T7	349		T12	94
valid_sources[0x5b]	2552	1			T7	442		T8	1		T12	103
valid_sources[0x5c]	2383	1			T7	432		T12	122		T13	484
valid_sources[0x5d]	2321	1			T7	300		T12	102		T35	6
valid_sources[0x5e]	2451	1			T7	345		T12	104		T13	416
valid_sources[0x5f]	2489	1			T7	384		T8	1		T12	102
valid_sources[0x60]	2421	1			T5	1		T7	321		T12	115
valid_sources[0x61]	2421	1			T7	378		T8	1		T12	111
valid_sources[0x62]	2406	1			T7	369		T12	100		T14	5
valid_sources[0x63]	2678	1			T5	1		T7	426		T12	133
valid_sources[0x64]	2328	1			T7	391		T12	122		T129	2
valid_sources[0x65]	2406	1			T1	1		T7	383		T12	92
valid_sources[0x66]	2473	1			T7	404		T12	127		T13	430
valid_sources[0x67]	2494	1			T7	429		T12	109		T38	1
valid_sources[0x68]	2359	1			T7	373		T12	100		T108	4
valid_sources[0x69]	2467	1			T7	425		T12	109		T13	432
valid_sources[0x6a]	2402	1			T7	480		T12	96		T69	1
valid_sources[0x6b]	2415	1			T7	415		T12	95		T13	485
valid_sources[0x6c]	2474	1			T7	397		T12	103		T35	1
valid_sources[0x6d]	2630	1			T7	420		T12	124		T37	4
valid_sources[0x6e]	2339	1			T7	413		T12	93		T62	1
valid_sources[0x6f]	2438	1			T7	436		T12	110		T13	458
valid_sources[0x70]	2795	1			T7	489		T12	106		T69	1
valid_sources[0x71]	2762	1			T7	427		T12	96		T130	1
valid_sources[0x72]	2392	1			T7	434		T12	112		T36	1
valid_sources[0x73]	2658	1			T7	472		T12	104		T13	434
valid_sources[0x74]	2395	1			T7	399		T12	101		T36	1
valid_sources[0x75]	2500	1			T7	359		T12	119		T43	1
valid_sources[0x76]	2280	1			T7	447		T12	119		T13	452
valid_sources[0x77]	2306	1			T7	409		T12	120		T13	485
valid_sources[0x78]	2715	1			T5	1		T7	325		T12	99
valid_sources[0x79]	2379	1			T7	455		T12	100		T38	2
valid_sources[0x7a]	2173	1			T7	395		T12	114		T14	9
valid_sources[0x7b]	2488	1			T7	410		T12	126		T13	477
valid_sources[0x7c]	2490	1			T7	454		T12	129		T41	1
valid_sources[0x7d]	2246	1			T7	363		T12	115		T45	1
valid_sources[0x7e]	2262	1			T7	328		T12	121		T13	453
valid_sources[0x7f]	2588	1			T7	388		T12	105		T126	1
valid_sources[0x80]	2592	1			T7	444		T12	109		T35	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

142736

1

T1

15

T3

20

T5

15

values[0x0]

all_enables

biggest_size

208243

1

T7

33938

T12

9495

T21

1

values[0x1]

all_enables

biggest_size

209293

1

T7

34434

T12

9606

T64

2