Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	49963	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1010410

1

T1

9

T2

12

T3

26

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	284376	1			T1	9		T2	12		T3	210
values[0x0]	380883	1			T12	22745		T13	20660		T14	85331
values[0x1]	395114	1			T12	23404		T13	21517		T14	88271

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25437	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1034936

1

T1

9

T2

12

T3

120

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4118	1			T9	1		T63	2		T77	3
valid_sources[0x01]	4028	1			T18	1		T63	3		T12	257
valid_sources[0x02]	3857	1			T18	2		T63	1		T107	1
valid_sources[0x03]	4361	1			T3	2		T18	2		T11	2
valid_sources[0x04]	4033	1			T6	3		T18	3		T63	1
valid_sources[0x05]	4012	1			T6	2		T63	2		T12	137
valid_sources[0x06]	4192	1			T3	3		T18	1		T63	1
valid_sources[0x07]	3791	1			T3	2		T63	2		T13	227
valid_sources[0x08]	3796	1			T107	1		T77	3		T16	1
valid_sources[0x09]	3967	1			T6	2		T18	1		T63	1
valid_sources[0x0a]	5181	1			T6	1		T18	1		T11	9
valid_sources[0x0b]	5204	1			T6	1		T18	2		T63	2
valid_sources[0x0c]	4053	1			T6	1		T18	1		T63	4
valid_sources[0x0d]	4011	1			T3	7		T63	1		T12	170
valid_sources[0x0e]	3910	1			T18	1		T63	1		T12	8
valid_sources[0x0f]	3658	1			T18	5		T11	3		T63	1
valid_sources[0x10]	3886	1			T3	2		T6	1		T18	2
valid_sources[0x11]	3760	1			T18	4		T11	5		T63	1
valid_sources[0x12]	4088	1			T18	1		T11	5		T63	2
valid_sources[0x13]	4086	1			T3	2		T4	37		T9	1
valid_sources[0x14]	5996	1			T3	5		T7	10		T15	5
valid_sources[0x15]	3941	1			T3	3		T18	3		T63	1
valid_sources[0x16]	4154	1			T18	2		T63	1		T107	4
valid_sources[0x17]	4856	1			T18	4		T63	2		T12	1068
valid_sources[0x18]	3921	1			T6	1		T11	7		T63	2
valid_sources[0x19]	4037	1			T18	2		T63	1		T77	1
valid_sources[0x1a]	3660	1			T6	3		T18	3		T63	2
valid_sources[0x1b]	3897	1			T6	1		T9	2		T18	3
valid_sources[0x1c]	3979	1			T9	1		T63	3		T59	1
valid_sources[0x1d]	4383	1			T6	2		T18	1		T107	3
valid_sources[0x1e]	4044	1			T6	1		T18	1		T77	1
valid_sources[0x1f]	3835	1			T3	18		T18	1		T63	2
valid_sources[0x20]	3752	1			T6	3		T18	1		T11	6
valid_sources[0x21]	3869	1			T63	3		T56	3		T13	214
valid_sources[0x22]	4811	1			T3	1		T6	4		T9	1
valid_sources[0x23]	5819	1			T3	4		T6	1		T18	1
valid_sources[0x24]	4029	1			T11	1		T63	2		T12	143
valid_sources[0x25]	4603	1			T3	4		T18	1		T12	596
valid_sources[0x26]	3959	1			T6	1		T11	4		T63	2
valid_sources[0x27]	4674	1			T12	535		T56	1		T13	231
valid_sources[0x28]	4327	1			T9	1		T12	415		T13	225
valid_sources[0x29]	4567	1			T6	1		T18	1		T63	2
valid_sources[0x2a]	3775	1			T6	4		T18	1		T12	6
valid_sources[0x2b]	4314	1			T18	3		T12	411		T56	1
valid_sources[0x2c]	4053	1			T3	5		T6	1		T7	4
valid_sources[0x2d]	4584	1			T6	1		T11	3		T63	1
valid_sources[0x2e]	4236	1			T6	1		T18	2		T63	2
valid_sources[0x2f]	3872	1			T6	3		T18	1		T15	3
valid_sources[0x30]	3861	1			T9	4		T63	1		T107	7
valid_sources[0x31]	4053	1			T6	1		T18	4		T77	2
valid_sources[0x32]	4100	1			T6	1		T18	2		T63	4
valid_sources[0x33]	3952	1			T3	2		T6	1		T18	1
valid_sources[0x34]	4252	1			T3	3		T4	10		T18	1
valid_sources[0x35]	4249	1			T11	6		T63	3		T77	1
valid_sources[0x36]	4251	1			T6	1		T18	1		T63	1
valid_sources[0x37]	3905	1			T6	1		T18	3		T63	2
valid_sources[0x38]	3997	1			T6	1		T63	2		T13	215
valid_sources[0x39]	4140	1			T3	10		T18	2		T63	3
valid_sources[0x3a]	4051	1			T18	3		T107	2		T56	1
valid_sources[0x3b]	5288	1			T6	2		T63	2		T107	1
valid_sources[0x3c]	3840	1			T4	23		T6	1		T63	1
valid_sources[0x3d]	4184	1			T6	1		T7	1		T63	1
valid_sources[0x3e]	3832	1			T6	2		T18	1		T11	21
valid_sources[0x3f]	4324	1			T18	1		T12	279		T13	221
valid_sources[0x40]	4259	1			T18	3		T12	344		T13	220
valid_sources[0x41]	4142	1			T3	4		T6	2		T18	1
valid_sources[0x42]	3980	1			T11	3		T15	1		T63	3
valid_sources[0x43]	3806	1			T2	12		T6	3		T9	2
valid_sources[0x44]	3885	1			T18	1		T77	1		T12	274
valid_sources[0x45]	4188	1			T6	2		T11	7		T63	2
valid_sources[0x46]	3923	1			T18	2		T63	2		T12	118
valid_sources[0x47]	4155	1			T3	4		T18	2		T11	3
valid_sources[0x48]	4248	1			T3	9		T9	3		T18	3
valid_sources[0x49]	3899	1			T3	1		T6	1		T11	1
valid_sources[0x4a]	3708	1			T6	4		T63	2		T12	14
valid_sources[0x4b]	3771	1			T18	5		T63	3		T107	3
valid_sources[0x4c]	3905	1			T6	3		T18	2		T63	1
valid_sources[0x4d]	4451	1			T6	1		T18	2		T63	1
valid_sources[0x4e]	4005	1			T3	4		T18	2		T63	1
valid_sources[0x4f]	4044	1			T18	2		T63	3		T12	19
valid_sources[0x50]	4119	1			T3	6		T11	10		T63	1
valid_sources[0x51]	4678	1			T3	3		T18	4		T77	1
valid_sources[0x52]	4489	1			T6	1		T18	1		T63	1
valid_sources[0x53]	4296	1			T12	354		T56	1		T13	241
valid_sources[0x54]	4462	1			T6	1		T11	1		T12	709
valid_sources[0x55]	4455	1			T18	1		T63	1		T12	562
valid_sources[0x56]	4471	1			T6	3		T11	2		T63	1
valid_sources[0x57]	4090	1			T9	1		T18	1		T11	2
valid_sources[0x58]	3785	1			T6	1		T63	1		T107	5
valid_sources[0x59]	4204	1			T3	2		T63	3		T107	1
valid_sources[0x5a]	3904	1			T6	1		T11	1		T56	1
valid_sources[0x5b]	3936	1			T18	1		T12	15		T16	1
valid_sources[0x5c]	4054	1			T6	1		T63	1		T12	178
valid_sources[0x5d]	3937	1			T3	5		T6	4		T18	1
valid_sources[0x5e]	4624	1			T18	4		T63	1		T77	4
valid_sources[0x5f]	3984	1			T6	1		T7	2		T18	1
valid_sources[0x60]	3835	1			T18	2		T107	3		T56	1
valid_sources[0x61]	4537	1			T18	3		T63	1		T107	1
valid_sources[0x62]	3958	1			T1	9		T63	2		T12	104
valid_sources[0x63]	3972	1			T107	1		T13	220		T29	1
valid_sources[0x64]	3842	1			T6	2		T11	3		T77	2
valid_sources[0x65]	3836	1			T18	2		T15	8		T107	6
valid_sources[0x66]	4147	1			T6	1		T18	1		T11	4
valid_sources[0x67]	3748	1			T3	2		T6	1		T12	104
valid_sources[0x68]	3944	1			T6	1		T9	1		T18	1
valid_sources[0x69]	3872	1			T6	3		T9	2		T18	2
valid_sources[0x6a]	4942	1			T6	1		T18	2		T12	972
valid_sources[0x6b]	4016	1			T9	3		T63	4		T12	219
valid_sources[0x6c]	4265	1			T63	2		T12	546		T56	2
valid_sources[0x6d]	4623	1			T6	1		T12	737		T56	3
valid_sources[0x6e]	3990	1			T6	1		T18	2		T63	1
valid_sources[0x6f]	4833	1			T18	2		T11	1		T15	3
valid_sources[0x70]	3728	1			T6	4		T18	1		T13	232
valid_sources[0x71]	4285	1			T6	1		T7	3		T18	1
valid_sources[0x72]	4040	1			T63	2		T13	221		T30	1
valid_sources[0x73]	4521	1			T6	1		T18	1		T77	1
valid_sources[0x74]	4448	1			T63	1		T12	620		T13	243
valid_sources[0x75]	4021	1			T18	1		T11	9		T63	1
valid_sources[0x76]	4615	1			T15	12		T63	1		T107	3
valid_sources[0x77]	4737	1			T6	2		T18	2		T63	6
valid_sources[0x78]	4779	1			T6	2		T18	3		T11	16
valid_sources[0x79]	3992	1			T3	4		T18	3		T11	7
valid_sources[0x7a]	4289	1			T4	34		T18	1		T11	5
valid_sources[0x7b]	4053	1			T9	1		T63	1		T107	4
valid_sources[0x7c]	3933	1			T9	3		T63	1		T107	1
valid_sources[0x7d]	4693	1			T18	2		T63	2		T12	694
valid_sources[0x7e]	3919	1			T6	1		T18	3		T11	4
valid_sources[0x7f]	4293	1			T18	4		T12	224		T56	2
valid_sources[0x80]	4007	1			T6	1		T15	5		T107	6

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

254832

1

T1

9

T2

12

T3

26

values[0x0]

all_enables

biggest_size

377571

1

T12

22550

T13

20457

T14

84629

values[0x1]

all_enables

biggest_size

378007

1

T12

22394

T13

20473

T14

84483

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	79508	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

762665

1

T1

13

T2

14

T3

43

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	213214	1			T1	19		T2	24		T3	96
values[0x0]	291091	1			T10	5		T22	1		T12	16289
values[0x1]	337868	1			T10	2		T22	3		T12	19010

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36671	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

805502

1

T1

14

T2

16

T3

55

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2894	1			T1	1		T12	217		T13	3
valid_sources[0x01]	3416	1			T3	1		T15	1		T12	182
valid_sources[0x02]	3009	1			T12	175		T13	235		T14	735
valid_sources[0x03]	2575	1			T3	1		T12	182		T59	2
valid_sources[0x04]	3155	1			T4	1		T12	179		T13	529
valid_sources[0x05]	3160	1			T3	1		T12	214		T13	69
valid_sources[0x06]	3371	1			T12	212		T13	183		T78	3
valid_sources[0x07]	2934	1			T77	4		T12	154		T121	1
valid_sources[0x08]	3335	1			T4	1		T12	199		T13	316
valid_sources[0x09]	2665	1			T3	1		T77	1		T12	243
valid_sources[0x0a]	3206	1			T12	183		T13	231		T122	1
valid_sources[0x0b]	2398	1			T77	1		T12	153		T59	1
valid_sources[0x0c]	4227	1			T12	138		T13	747		T79	5
valid_sources[0x0d]	2951	1			T12	205		T13	241		T81	3
valid_sources[0x0e]	3547	1			T4	3		T12	170		T13	167
valid_sources[0x0f]	2810	1			T3	1		T15	1		T12	188
valid_sources[0x10]	3026	1			T12	236		T13	18		T123	1
valid_sources[0x11]	4036	1			T12	214		T13	464		T122	1
valid_sources[0x12]	2985	1			T4	2		T12	137		T13	238
valid_sources[0x13]	3133	1			T12	177		T59	1		T13	8
valid_sources[0x14]	2700	1			T3	1		T12	207		T13	5
valid_sources[0x15]	3168	1			T12	196		T59	2		T13	8
valid_sources[0x16]	3536	1			T2	1		T12	204		T13	145
valid_sources[0x17]	2828	1			T12	170		T13	2		T80	1
valid_sources[0x18]	2864	1			T3	1		T4	2		T12	223
valid_sources[0x19]	3886	1			T3	2		T12	223		T13	258
valid_sources[0x1a]	3632	1			T12	171		T13	45		T34	1
valid_sources[0x1b]	3760	1			T3	2		T12	173		T13	151
valid_sources[0x1c]	4543	1			T15	1		T12	204		T13	532
valid_sources[0x1d]	4078	1			T12	205		T13	846		T124	1
valid_sources[0x1e]	2830	1			T3	2		T4	2		T15	1
valid_sources[0x1f]	3238	1			T2	2		T77	1		T12	200
valid_sources[0x20]	3327	1			T3	2		T12	157		T13	151
valid_sources[0x21]	2905	1			T12	183		T39	1		T14	611
valid_sources[0x22]	2998	1			T15	1		T12	213		T13	103
valid_sources[0x23]	2988	1			T12	175		T13	222		T81	1
valid_sources[0x24]	3410	1			T12	226		T13	306		T78	1
valid_sources[0x25]	3769	1			T2	1		T3	1		T12	164
valid_sources[0x26]	2908	1			T6	32		T12	208		T13	8
valid_sources[0x27]	2540	1			T12	165		T125	2		T14	804
valid_sources[0x28]	3424	1			T6	23		T12	253		T59	1
valid_sources[0x29]	3325	1			T12	208		T13	3		T79	1
valid_sources[0x2a]	3639	1			T1	1		T3	1		T12	163
valid_sources[0x2b]	2405	1			T3	1		T12	170		T13	189
valid_sources[0x2c]	2932	1			T15	1		T12	187		T13	119
valid_sources[0x2d]	2908	1			T12	174		T13	2		T32	1
valid_sources[0x2e]	3324	1			T9	32		T12	209		T13	228
valid_sources[0x2f]	3304	1			T4	4		T77	1		T12	203
valid_sources[0x30]	2649	1			T3	1		T12	187		T78	2
valid_sources[0x31]	3044	1			T15	1		T12	222		T13	2
valid_sources[0x32]	3801	1			T12	210		T80	1		T14	773
valid_sources[0x33]	2918	1			T15	1		T12	175		T59	1
valid_sources[0x34]	3202	1			T12	213		T13	38		T125	1
valid_sources[0x35]	2889	1			T15	2		T12	171		T13	305
valid_sources[0x36]	3638	1			T12	146		T13	309		T31	1
valid_sources[0x37]	3613	1			T15	2		T12	150		T13	259
valid_sources[0x38]	3931	1			T12	187		T13	325		T66	1
valid_sources[0x39]	2912	1			T4	1		T12	171		T13	72
valid_sources[0x3a]	3865	1			T77	1		T12	194		T13	305
valid_sources[0x3b]	3434	1			T3	1		T12	236		T13	2
valid_sources[0x3c]	3122	1			T12	158		T13	443		T125	1
valid_sources[0x3d]	2665	1			T3	1		T4	4		T12	194
valid_sources[0x3e]	3614	1			T1	2		T3	1		T12	152
valid_sources[0x3f]	3593	1			T12	165		T59	3		T19	8
valid_sources[0x40]	2965	1			T12	142		T13	163		T44	96
valid_sources[0x41]	2999	1			T2	1		T3	1		T12	200
valid_sources[0x42]	3014	1			T12	208		T13	455		T126	1
valid_sources[0x43]	3270	1			T12	215		T13	110		T126	2
valid_sources[0x44]	3069	1			T12	186		T59	2		T13	134
valid_sources[0x45]	3228	1			T4	5		T12	122		T13	247
valid_sources[0x46]	4085	1			T3	1		T12	202		T13	605
valid_sources[0x47]	2448	1			T3	1		T12	154		T123	1
valid_sources[0x48]	3325	1			T12	218		T78	5		T81	1
valid_sources[0x49]	3853	1			T12	153		T13	534		T33	3
valid_sources[0x4a]	3389	1			T12	204		T19	1		T13	79
valid_sources[0x4b]	3300	1			T12	181		T13	2		T78	1
valid_sources[0x4c]	2674	1			T12	151		T13	7		T81	1
valid_sources[0x4d]	4381	1			T3	1		T12	211		T13	376
valid_sources[0x4e]	2931	1			T77	1		T12	192		T13	100
valid_sources[0x4f]	3184	1			T3	1		T12	201		T13	361
valid_sources[0x50]	3351	1			T77	1		T12	173		T13	401
valid_sources[0x51]	2626	1			T12	217		T13	90		T80	1
valid_sources[0x52]	3167	1			T12	196		T59	2		T33	8
valid_sources[0x53]	3673	1			T12	202		T13	375		T21	1
valid_sources[0x54]	3655	1			T12	173		T13	465		T32	1
valid_sources[0x55]	3060	1			T12	195		T59	1		T13	6
valid_sources[0x56]	3073	1			T12	149		T122	1		T14	630
valid_sources[0x57]	2837	1			T2	1		T3	1		T12	203
valid_sources[0x58]	4438	1			T47	1		T12	172		T13	403
valid_sources[0x59]	3327	1			T3	1		T12	178		T13	222
valid_sources[0x5a]	3047	1			T12	152		T13	466		T31	1
valid_sources[0x5b]	2566	1			T3	1		T6	23		T12	193
valid_sources[0x5c]	3262	1			T3	1		T12	181		T13	104
valid_sources[0x5d]	2724	1			T12	220		T13	1		T125	1
valid_sources[0x5e]	3047	1			T10	7		T12	172		T13	152
valid_sources[0x5f]	3536	1			T12	159		T13	225		T78	3
valid_sources[0x60]	3429	1			T3	2		T4	1		T12	171
valid_sources[0x61]	3948	1			T12	220		T13	288		T31	1
valid_sources[0x62]	3798	1			T12	204		T13	140		T127	1
valid_sources[0x63]	2868	1			T77	2		T12	170		T80	1
valid_sources[0x64]	3169	1			T4	1		T12	201		T13	3
valid_sources[0x65]	3076	1			T6	16		T15	1		T12	216
valid_sources[0x66]	3204	1			T77	2		T12	211		T59	1
valid_sources[0x67]	3695	1			T2	1		T15	2		T12	179
valid_sources[0x68]	3326	1			T12	161		T13	246		T78	3
valid_sources[0x69]	2969	1			T22	2		T12	196		T59	3
valid_sources[0x6a]	3928	1			T12	174		T13	294		T81	1
valid_sources[0x6b]	2959	1			T3	1		T12	181		T13	5
valid_sources[0x6c]	3146	1			T4	6		T12	160		T13	231
valid_sources[0x6d]	3744	1			T12	151		T41	1		T13	264
valid_sources[0x6e]	3302	1			T4	3		T7	32		T26	1
valid_sources[0x6f]	3208	1			T3	1		T12	168		T13	157
valid_sources[0x70]	2898	1			T3	1		T17	2		T12	163
valid_sources[0x71]	3091	1			T3	1		T4	2		T15	1
valid_sources[0x72]	4063	1			T3	1		T12	190		T13	756
valid_sources[0x73]	3886	1			T12	208		T13	165		T122	1
valid_sources[0x74]	2832	1			T3	1		T4	2		T12	156
valid_sources[0x75]	3043	1			T12	178		T59	1		T13	425
valid_sources[0x76]	3187	1			T3	1		T77	1		T12	143
valid_sources[0x77]	2981	1			T15	1		T12	151		T13	2
valid_sources[0x78]	2850	1			T3	1		T4	5		T12	215
valid_sources[0x79]	3420	1			T4	1		T25	1		T77	1
valid_sources[0x7a]	3035	1			T4	1		T12	185		T13	436
valid_sources[0x7b]	3068	1			T12	188		T32	1		T125	1
valid_sources[0x7c]	3396	1			T3	1		T12	178		T13	233
valid_sources[0x7d]	2882	1			T4	4		T12	159		T78	1
valid_sources[0x7e]	3866	1			T12	187		T13	151		T39	1
valid_sources[0x7f]	2947	1			T3	1		T12	172		T13	187
valid_sources[0x80]	3614	1			T3	1		T4	3		T77	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

193667

1

T1

13

T2

14

T3

43

values[0x0]

all_enables

biggest_size

284668

1

T10

3

T12

15967

T24

2

values[0x1]

all_enables

biggest_size

284330

1

T12

16235

T24

4

T13

16619