Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	60977	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1352541

1

T1

4

T2

5

T3

9

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	373188	1			T1	68		T2	55		T3	97
values[0x0]	509865	1			T11	44805		T13	42310		T14	37884
values[0x1]	530465	1			T11	46674		T13	44280		T14	39438

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31282	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1382236

1

T1

36

T2

33

T3

57

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5863	1			T3	1		T15	1		T11	288
valid_sources[0x01]	6399	1			T3	1		T11	640		T32	1
valid_sources[0x02]	5931	1			T15	1		T11	794		T30	7
valid_sources[0x03]	5934	1			T2	2		T11	357		T34	1
valid_sources[0x04]	4991	1			T11	462		T113	1		T114	2
valid_sources[0x05]	6277	1			T15	2		T11	213		T52	1
valid_sources[0x06]	5093	1			T3	3		T7	1		T15	1
valid_sources[0x07]	6325	1			T15	1		T11	210		T115	1
valid_sources[0x08]	4982	1			T2	1		T11	622		T16	6
valid_sources[0x09]	5643	1			T3	1		T11	741		T73	2
valid_sources[0x0a]	5285	1			T3	1		T11	592		T77	2
valid_sources[0x0b]	7386	1			T3	3		T11	217		T52	4
valid_sources[0x0c]	5226	1			T11	263		T32	1		T77	3
valid_sources[0x0d]	5936	1			T2	2		T3	1		T11	706
valid_sources[0x0e]	4585	1			T15	1		T11	334		T16	2
valid_sources[0x0f]	6081	1			T11	203		T113	3		T116	1
valid_sources[0x10]	5069	1			T2	1		T15	3		T11	362
valid_sources[0x11]	6550	1			T11	736		T16	1		T117	1
valid_sources[0x12]	4191	1			T11	826		T32	1		T76	2
valid_sources[0x13]	6079	1			T11	428		T115	6		T113	3
valid_sources[0x14]	5058	1			T6	4		T11	536		T32	1
valid_sources[0x15]	6106	1			T2	1		T3	1		T11	465
valid_sources[0x16]	5563	1			T11	430		T113	3		T77	1
valid_sources[0x17]	5069	1			T11	558		T32	1		T113	3
valid_sources[0x18]	4855	1			T15	2		T11	150		T73	4
valid_sources[0x19]	5100	1			T11	368		T32	1		T113	3
valid_sources[0x1a]	6860	1			T2	2		T3	1		T11	786
valid_sources[0x1b]	4340	1			T3	3		T11	439		T52	3
valid_sources[0x1c]	6196	1			T3	2		T15	1		T11	591
valid_sources[0x1d]	4582	1			T15	1		T11	411		T30	10
valid_sources[0x1e]	5181	1			T2	1		T11	507		T73	2
valid_sources[0x1f]	7486	1			T11	391		T118	1		T13	471
valid_sources[0x20]	5504	1			T2	2		T11	569		T32	1
valid_sources[0x21]	4664	1			T11	311		T113	2		T76	10
valid_sources[0x22]	6377	1			T3	2		T11	332		T33	5
valid_sources[0x23]	4035	1			T3	1		T15	2		T11	481
valid_sources[0x24]	7784	1			T2	1		T15	1		T11	297
valid_sources[0x25]	6127	1			T11	510		T32	1		T73	3
valid_sources[0x26]	5454	1			T11	458		T73	1		T115	1
valid_sources[0x27]	7036	1			T3	5		T11	509		T33	1
valid_sources[0x28]	5665	1			T15	2		T11	645		T74	1
valid_sources[0x29]	5872	1			T2	1		T3	2		T11	585
valid_sources[0x2a]	5806	1			T11	518		T27	5		T74	1
valid_sources[0x2b]	5550	1			T1	22		T11	268		T52	1
valid_sources[0x2c]	5119	1			T2	2		T3	1		T10	6
valid_sources[0x2d]	4792	1			T3	1		T11	469		T115	5
valid_sources[0x2e]	4433	1			T11	308		T27	2		T16	1
valid_sources[0x2f]	5323	1			T11	409		T52	3		T119	1
valid_sources[0x30]	6929	1			T11	920		T27	3		T74	1
valid_sources[0x31]	5650	1			T11	476		T113	4		T77	1
valid_sources[0x32]	5554	1			T11	439		T16	7		T113	1
valid_sources[0x33]	6500	1			T11	1039		T30	9		T115	2
valid_sources[0x34]	5033	1			T2	1		T15	1		T11	659
valid_sources[0x35]	5565	1			T3	1		T11	1000		T16	1
valid_sources[0x36]	5286	1			T9	37		T15	1		T11	368
valid_sources[0x37]	7364	1			T11	753		T27	3		T113	2
valid_sources[0x38]	5000	1			T3	1		T11	565		T32	1
valid_sources[0x39]	4504	1			T11	389		T27	1		T16	10
valid_sources[0x3a]	4650	1			T11	523		T74	2		T116	1
valid_sources[0x3b]	5314	1			T11	354		T52	5		T32	1
valid_sources[0x3c]	5796	1			T2	1		T3	1		T11	201
valid_sources[0x3d]	5498	1			T15	2		T11	555		T27	1
valid_sources[0x3e]	5312	1			T3	1		T15	1		T11	707
valid_sources[0x3f]	5125	1			T5	1		T11	543		T27	4
valid_sources[0x40]	5640	1			T11	646		T32	1		T117	7
valid_sources[0x41]	5287	1			T3	4		T6	1		T11	206
valid_sources[0x42]	5733	1			T3	1		T11	645		T32	1
valid_sources[0x43]	4701	1			T15	1		T11	435		T52	2
valid_sources[0x44]	8152	1			T2	1		T15	1		T11	395
valid_sources[0x45]	7754	1			T9	28		T11	369		T16	1
valid_sources[0x46]	6896	1			T1	35		T3	3		T11	473
valid_sources[0x47]	5280	1			T3	2		T11	624		T32	2
valid_sources[0x48]	4623	1			T15	1		T11	391		T73	10
valid_sources[0x49]	4830	1			T15	1		T11	333		T30	2
valid_sources[0x4a]	4888	1			T11	420		T27	3		T115	1
valid_sources[0x4b]	4652	1			T1	11		T11	341		T16	4
valid_sources[0x4c]	4767	1			T3	3		T11	641		T32	1
valid_sources[0x4d]	5180	1			T15	1		T11	457		T32	3
valid_sources[0x4e]	6130	1			T2	1		T11	152		T27	2
valid_sources[0x4f]	5434	1			T3	2		T11	624		T30	1
valid_sources[0x50]	5294	1			T6	3		T15	2		T11	296
valid_sources[0x51]	4533	1			T3	1		T11	615		T27	2
valid_sources[0x52]	8407	1			T2	2		T15	1		T11	648
valid_sources[0x53]	5536	1			T15	1		T11	499		T115	1
valid_sources[0x54]	6025	1			T2	2		T11	812		T27	1
valid_sources[0x55]	6599	1			T7	4		T11	508		T113	1
valid_sources[0x56]	3797	1			T2	4		T11	315		T115	1
valid_sources[0x57]	5014	1			T3	1		T11	351		T73	2
valid_sources[0x58]	7173	1			T2	2		T15	1		T11	278
valid_sources[0x59]	7441	1			T3	1		T11	624		T32	1
valid_sources[0x5a]	5072	1			T11	435		T16	4		T117	1
valid_sources[0x5b]	4168	1			T11	326		T52	1		T16	4
valid_sources[0x5c]	5334	1			T11	439		T115	2		T76	5
valid_sources[0x5d]	4151	1			T11	516		T30	5		T115	1
valid_sources[0x5e]	5449	1			T3	3		T11	202		T16	18
valid_sources[0x5f]	5848	1			T2	1		T11	440		T76	1
valid_sources[0x60]	4893	1			T11	287		T30	42		T76	1
valid_sources[0x61]	4585	1			T2	1		T11	212		T16	1
valid_sources[0x62]	5150	1			T15	1		T11	405		T27	1
valid_sources[0x63]	5216	1			T3	1		T11	168		T76	1
valid_sources[0x64]	5620	1			T3	1		T11	123		T115	7
valid_sources[0x65]	5152	1			T15	1		T11	763		T30	14
valid_sources[0x66]	5144	1			T3	3		T11	113		T16	3
valid_sources[0x67]	4412	1			T11	363		T113	1		T76	1
valid_sources[0x68]	4437	1			T3	1		T15	4		T11	340
valid_sources[0x69]	5599	1			T15	1		T11	485		T52	7
valid_sources[0x6a]	5612	1			T11	569		T16	3		T113	1
valid_sources[0x6b]	6049	1			T9	42		T11	954		T32	1
valid_sources[0x6c]	6351	1			T3	2		T7	2		T11	853
valid_sources[0x6d]	6137	1			T11	475		T31	2		T16	2
valid_sources[0x6e]	5143	1			T11	372		T16	7		T113	2
valid_sources[0x6f]	5048	1			T2	3		T11	749		T35	1
valid_sources[0x70]	4881	1			T11	560		T115	2		T113	2
valid_sources[0x71]	6417	1			T2	1		T11	511		T32	3
valid_sources[0x72]	5029	1			T15	1		T17	1		T11	291
valid_sources[0x73]	6777	1			T11	226		T30	1		T16	1
valid_sources[0x74]	5069	1			T11	680		T76	6		T13	420
valid_sources[0x75]	5313	1			T11	444		T52	1		T34	1
valid_sources[0x76]	5574	1			T11	710		T52	2		T32	1
valid_sources[0x77]	5506	1			T11	661		T52	1		T30	3
valid_sources[0x78]	6119	1			T3	1		T11	712		T30	12
valid_sources[0x79]	4713	1			T3	1		T5	1		T15	1
valid_sources[0x7a]	4868	1			T2	1		T15	1		T11	734
valid_sources[0x7b]	5979	1			T11	169		T30	13		T76	7
valid_sources[0x7c]	5234	1			T2	1		T11	832		T32	1
valid_sources[0x7d]	5753	1			T15	1		T11	507		T27	2
valid_sources[0x7e]	5723	1			T2	1		T11	436		T27	1
valid_sources[0x7f]	4014	1			T3	2		T5	2		T11	164
valid_sources[0x80]	4619	1			T11	497		T113	1		T76	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

340333

1

T1

4

T2

5

T3

9

values[0x0]

all_enables

biggest_size

505317

1

T11

44381

T13

41976

T14

37520

values[0x1]

all_enables

biggest_size

506891

1

T11

44608

T13

42332

T14

37572

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	104359	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1055809

1

T1

15

T2

14

T3

15

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	290316	1			T1	32		T2	32		T3	32
values[0x0]	402782	1			T11	34031		T21	10		T22	10
values[0x1]	467070	1			T11	39833		T21	13		T22	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47282	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1112886

1

T1

22

T2

17

T3

18

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	4191	1			T11	405		T16	1		T76	1
valid_sources[0x01]	4505	1			T15	1		T11	376		T115	1
valid_sources[0x02]	4803	1			T11	343		T75	1		T76	1
valid_sources[0x03]	4390	1			T11	480		T115	1		T13	368
valid_sources[0x04]	4468	1			T11	397		T27	32		T36	1
valid_sources[0x05]	4708	1			T11	328		T76	1		T13	397
valid_sources[0x06]	4634	1			T6	2		T11	403		T77	12
valid_sources[0x07]	4385	1			T11	322		T75	1		T13	353
valid_sources[0x08]	4162	1			T9	2		T11	321		T114	1
valid_sources[0x09]	5697	1			T11	386		T114	10		T13	406
valid_sources[0x0a]	4263	1			T11	410		T52	1		T115	1
valid_sources[0x0b]	4668	1			T11	356		T75	1		T76	5
valid_sources[0x0c]	4210	1			T11	320		T52	3		T113	2
valid_sources[0x0d]	4679	1			T9	2		T11	373		T115	1
valid_sources[0x0e]	4975	1			T11	475		T115	1		T76	1
valid_sources[0x0f]	4320	1			T5	1		T9	4		T11	372
valid_sources[0x10]	4705	1			T9	8		T11	415		T31	4
valid_sources[0x11]	4657	1			T11	369		T13	358		T14	369
valid_sources[0x12]	4611	1			T11	328		T35	1		T114	3
valid_sources[0x13]	4871	1			T9	2		T15	2		T11	336
valid_sources[0x14]	4470	1			T11	448		T73	6		T35	1
valid_sources[0x15]	4800	1			T11	361		T114	1		T13	329
valid_sources[0x16]	5031	1			T6	1		T9	1		T11	373
valid_sources[0x17]	4722	1			T11	386		T75	1		T77	21
valid_sources[0x18]	4655	1			T9	3		T11	392		T33	1
valid_sources[0x19]	4211	1			T11	342		T35	1		T113	1
valid_sources[0x1a]	4757	1			T9	3		T10	5		T11	378
valid_sources[0x1b]	4476	1			T11	408		T13	333		T120	1
valid_sources[0x1c]	4682	1			T11	394		T34	1		T114	16
valid_sources[0x1d]	4634	1			T15	2		T11	358		T115	1
valid_sources[0x1e]	4148	1			T11	416		T115	3		T36	1
valid_sources[0x1f]	4583	1			T11	351		T16	1		T35	2
valid_sources[0x20]	4623	1			T11	394		T34	1		T76	1
valid_sources[0x21]	4485	1			T11	348		T16	1		T19	6
valid_sources[0x22]	4738	1			T5	4		T9	1		T15	2
valid_sources[0x23]	4502	1			T9	1		T11	368		T115	1
valid_sources[0x24]	4635	1			T11	385		T115	1		T113	1
valid_sources[0x25]	4308	1			T10	1		T11	326		T35	2
valid_sources[0x26]	4884	1			T11	437		T113	1		T13	387
valid_sources[0x27]	4784	1			T7	7		T11	338		T73	6
valid_sources[0x28]	4521	1			T11	402		T31	1		T75	1
valid_sources[0x29]	4665	1			T2	2		T11	380		T76	1
valid_sources[0x2a]	4169	1			T2	4		T11	369		T16	2
valid_sources[0x2b]	4299	1			T11	469		T115	1		T75	1
valid_sources[0x2c]	5084	1			T10	1		T11	485		T76	1
valid_sources[0x2d]	4194	1			T9	2		T11	298		T13	399
valid_sources[0x2e]	4317	1			T11	404		T13	386		T121	1
valid_sources[0x2f]	4469	1			T11	439		T16	1		T115	1
valid_sources[0x30]	4113	1			T10	1		T11	460		T31	1
valid_sources[0x31]	4741	1			T15	1		T11	439		T75	1
valid_sources[0x32]	4385	1			T11	369		T115	2		T13	437
valid_sources[0x33]	4209	1			T9	1		T11	391		T52	2
valid_sources[0x34]	5498	1			T11	392		T35	1		T13	418
valid_sources[0x35]	4455	1			T11	502		T16	2		T13	354
valid_sources[0x36]	3990	1			T2	2		T11	281		T16	1
valid_sources[0x37]	4957	1			T11	407		T16	1		T35	1
valid_sources[0x38]	4887	1			T11	339		T76	1		T13	376
valid_sources[0x39]	4794	1			T11	465		T52	2		T73	2
valid_sources[0x3a]	4454	1			T15	3		T11	339		T16	1
valid_sources[0x3b]	5001	1			T5	1		T15	4		T11	361
valid_sources[0x3c]	4515	1			T11	451		T113	1		T77	7
valid_sources[0x3d]	4740	1			T11	348		T115	1		T113	2
valid_sources[0x3e]	4561	1			T11	410		T113	2		T114	2
valid_sources[0x3f]	5304	1			T15	1		T11	411		T113	2
valid_sources[0x40]	4743	1			T10	2		T11	437		T115	1
valid_sources[0x41]	4731	1			T11	480		T114	13		T13	386
valid_sources[0x42]	4573	1			T11	435		T75	1		T76	3
valid_sources[0x43]	4290	1			T2	2		T11	382		T114	16
valid_sources[0x44]	4266	1			T11	317		T115	1		T113	1
valid_sources[0x45]	4562	1			T9	2		T11	346		T52	1
valid_sources[0x46]	4493	1			T9	2		T11	460		T73	2
valid_sources[0x47]	4570	1			T11	372		T75	1		T13	393
valid_sources[0x48]	4564	1			T11	386		T16	4		T122	1
valid_sources[0x49]	5114	1			T11	394		T13	408		T121	1
valid_sources[0x4a]	4330	1			T2	3		T9	1		T15	1
valid_sources[0x4b]	4811	1			T11	325		T115	1		T113	2
valid_sources[0x4c]	4374	1			T6	3		T9	1		T11	403
valid_sources[0x4d]	4856	1			T11	428		T16	1		T113	1
valid_sources[0x4e]	4235	1			T11	401		T52	1		T115	1
valid_sources[0x4f]	4576	1			T2	1		T6	2		T11	331
valid_sources[0x50]	4309	1			T9	2		T10	1		T11	376
valid_sources[0x51]	4782	1			T11	439		T36	1		T13	407
valid_sources[0x52]	4468	1			T11	414		T33	1		T115	1
valid_sources[0x53]	3990	1			T5	2		T15	2		T11	374
valid_sources[0x54]	4750	1			T11	334		T52	1		T31	3
valid_sources[0x55]	3961	1			T11	286		T75	1		T13	396
valid_sources[0x56]	4292	1			T11	342		T16	1		T76	1
valid_sources[0x57]	4395	1			T11	354		T33	1		T115	1
valid_sources[0x58]	5074	1			T9	3		T10	1		T11	390
valid_sources[0x59]	4007	1			T6	1		T11	393		T115	1
valid_sources[0x5a]	4563	1			T11	442		T13	413		T121	2
valid_sources[0x5b]	4326	1			T11	399		T73	1		T113	1
valid_sources[0x5c]	4326	1			T6	3		T15	1		T11	313
valid_sources[0x5d]	4671	1			T9	3		T11	370		T16	1
valid_sources[0x5e]	4280	1			T11	307		T76	1		T36	1
valid_sources[0x5f]	4294	1			T11	330		T115	2		T113	1
valid_sources[0x60]	4700	1			T11	338		T36	1		T13	382
valid_sources[0x61]	4288	1			T6	3		T11	332		T16	1
valid_sources[0x62]	4548	1			T11	276		T33	1		T16	1
valid_sources[0x63]	4503	1			T11	474		T16	1		T13	412
valid_sources[0x64]	4110	1			T11	257		T16	1		T74	4
valid_sources[0x65]	4478	1			T15	2		T11	400		T115	2
valid_sources[0x66]	4192	1			T10	2		T11	366		T31	1
valid_sources[0x67]	5035	1			T9	2		T15	2		T11	400
valid_sources[0x68]	5437	1			T9	2		T11	366		T59	2
valid_sources[0x69]	4336	1			T11	452		T113	1		T13	335
valid_sources[0x6a]	4464	1			T10	1		T11	301		T16	1
valid_sources[0x6b]	4636	1			T11	406		T113	1		T13	413
valid_sources[0x6c]	4428	1			T11	390		T115	2		T13	338
valid_sources[0x6d]	4544	1			T11	388		T115	3		T75	1
valid_sources[0x6e]	4296	1			T9	2		T11	392		T13	318
valid_sources[0x6f]	4203	1			T11	335		T73	1		T115	1
valid_sources[0x70]	5532	1			T11	447		T115	1		T13	359
valid_sources[0x71]	4603	1			T11	376		T16	2		T34	1
valid_sources[0x72]	4881	1			T9	1		T11	358		T35	1
valid_sources[0x73]	4417	1			T11	399		T73	3		T115	1
valid_sources[0x74]	4394	1			T11	328		T16	1		T13	368
valid_sources[0x75]	4450	1			T9	2		T11	384		T16	1
valid_sources[0x76]	4409	1			T10	1		T11	393		T123	1
valid_sources[0x77]	4765	1			T11	326		T31	1		T113	2
valid_sources[0x78]	4188	1			T2	1		T6	5		T11	477
valid_sources[0x79]	4583	1			T11	369		T52	2		T16	2
valid_sources[0x7a]	4337	1			T11	392		T23	3		T75	1
valid_sources[0x7b]	4341	1			T11	388		T16	2		T115	1
valid_sources[0x7c]	5067	1			T7	9		T11	390		T13	435
valid_sources[0x7d]	4432	1			T17	2		T11	355		T29	1
valid_sources[0x7e]	4798	1			T6	3		T11	349		T33	1
valid_sources[0x7f]	4477	1			T11	413		T73	3		T36	2
valid_sources[0x80]	4476	1			T2	4		T11	399		T115	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

266403

1

T1

15

T2

14

T3

15

values[0x0]

all_enables

biggest_size

394397

1

T11

33347

T21

6

T22

3

values[0x1]

all_enables

biggest_size

395009

1

T11

33624

T21

1

T22

1