Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	37330	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

497140

1

T3

3

T5

6

T6

3

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	153636	1			T3	66		T5	6		T6	71
values[0x0]	186471	1			T14	2052		T15	50946		T16	20977
values[0x1]	194363	1			T14	2251		T15	52649		T16	21775

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	18071	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

516399

1

T3

41

T5

6

T6

40

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	2148	1			T11	1		T18	2		T17	2
valid_sources[0x01]	1752	1			T11	2		T17	2		T14	21
valid_sources[0x02]	2294	1			T11	2		T12	2		T17	2
valid_sources[0x03]	1650	1			T18	1		T17	1		T66	2
valid_sources[0x04]	1860	1			T6	1		T18	1		T17	1
valid_sources[0x05]	2106	1			T11	2		T17	2		T65	3
valid_sources[0x06]	2046	1			T6	1		T8	1		T11	1
valid_sources[0x07]	2867	1			T3	1		T18	2		T17	2
valid_sources[0x08]	2601	1			T11	2		T18	1		T65	1
valid_sources[0x09]	1625	1			T11	2		T12	1		T18	2
valid_sources[0x0a]	2454	1			T11	1		T12	3		T18	3
valid_sources[0x0b]	1842	1			T18	1		T17	7		T65	4
valid_sources[0x0c]	2211	1			T12	1		T17	2		T65	6
valid_sources[0x0d]	1835	1			T3	1		T6	1		T11	1
valid_sources[0x0e]	1460	1			T12	2		T17	1		T66	1
valid_sources[0x0f]	2205	1			T9	3		T17	2		T65	1
valid_sources[0x10]	3328	1			T6	1		T17	1		T65	5
valid_sources[0x11]	1883	1			T17	1		T66	2		T102	2
valid_sources[0x12]	2467	1			T3	1		T65	2		T14	28
valid_sources[0x13]	1298	1			T18	1		T17	2		T102	1
valid_sources[0x14]	1438	1			T6	1		T11	2		T18	1
valid_sources[0x15]	2262	1			T12	1		T65	1		T102	2
valid_sources[0x16]	2534	1			T11	2		T12	1		T18	1
valid_sources[0x17]	2293	1			T11	1		T18	2		T102	4
valid_sources[0x18]	3203	1			T8	2		T11	1		T12	1
valid_sources[0x19]	1979	1			T6	2		T18	1		T17	1
valid_sources[0x1a]	1482	1			T18	2		T17	1		T57	2
valid_sources[0x1b]	2609	1			T6	1		T8	1		T12	1
valid_sources[0x1c]	1852	1			T6	2		T11	1		T65	7
valid_sources[0x1d]	1955	1			T12	2		T17	2		T102	3
valid_sources[0x1e]	1983	1			T9	1		T12	2		T17	4
valid_sources[0x1f]	2029	1			T11	1		T14	12		T48	5
valid_sources[0x20]	2755	1			T9	4		T12	1		T18	1
valid_sources[0x21]	1720	1			T3	1		T17	1		T65	2
valid_sources[0x22]	1774	1			T3	1		T6	1		T17	3
valid_sources[0x23]	1671	1			T6	1		T11	2		T17	1
valid_sources[0x24]	1963	1			T8	1		T17	1		T66	1
valid_sources[0x25]	2360	1			T9	6		T11	1		T17	3
valid_sources[0x26]	1919	1			T3	4		T11	1		T12	1
valid_sources[0x27]	2612	1			T9	1		T11	2		T66	1
valid_sources[0x28]	2045	1			T3	1		T6	1		T9	9
valid_sources[0x29]	1460	1			T11	1		T18	1		T65	4
valid_sources[0x2a]	1822	1			T11	1		T12	1		T65	1
valid_sources[0x2b]	1598	1			T11	2		T17	2		T66	2
valid_sources[0x2c]	2602	1			T3	6		T12	1		T17	2
valid_sources[0x2d]	1807	1			T12	1		T66	1		T102	1
valid_sources[0x2e]	2905	1			T17	2		T66	1		T102	1
valid_sources[0x2f]	1887	1			T18	1		T65	1		T14	28
valid_sources[0x30]	1800	1			T8	1		T18	2		T17	1
valid_sources[0x31]	1391	1			T8	1		T12	1		T18	1
valid_sources[0x32]	3122	1			T11	2		T17	3		T65	1
valid_sources[0x33]	1817	1			T18	1		T17	2		T65	1
valid_sources[0x34]	2152	1			T6	1		T18	1		T17	2
valid_sources[0x35]	1923	1			T6	1		T12	1		T17	2
valid_sources[0x36]	2646	1			T6	1		T12	3		T65	2
valid_sources[0x37]	1310	1			T6	1		T11	1		T12	1
valid_sources[0x38]	1934	1			T3	3		T12	1		T17	2
valid_sources[0x39]	1934	1			T11	1		T12	2		T18	1
valid_sources[0x3a]	2636	1			T8	1		T11	3		T12	2
valid_sources[0x3b]	1997	1			T17	1		T65	2		T101	45
valid_sources[0x3c]	2107	1			T14	22		T53	1		T114	1
valid_sources[0x3d]	1570	1			T11	1		T12	1		T18	1
valid_sources[0x3e]	2688	1			T6	2		T18	2		T65	2
valid_sources[0x3f]	2159	1			T11	1		T17	1		T65	2
valid_sources[0x40]	1393	1			T11	1		T12	1		T18	1
valid_sources[0x41]	1339	1			T17	3		T102	1		T14	25
valid_sources[0x42]	1372	1			T11	1		T18	2		T14	34
valid_sources[0x43]	1599	1			T12	3		T18	1		T102	3
valid_sources[0x44]	1657	1			T6	1		T11	3		T12	1
valid_sources[0x45]	1452	1			T17	2		T65	2		T102	2
valid_sources[0x46]	1945	1			T11	1		T18	2		T14	18
valid_sources[0x47]	1531	1			T6	1		T14	22		T50	1
valid_sources[0x48]	3076	1			T18	1		T17	2		T14	12
valid_sources[0x49]	1486	1			T12	1		T102	3		T14	21
valid_sources[0x4a]	2402	1			T6	1		T17	1		T65	1
valid_sources[0x4b]	2263	1			T8	1		T17	1		T65	3
valid_sources[0x4c]	1716	1			T3	1		T6	1		T11	1
valid_sources[0x4d]	2415	1			T11	1		T12	1		T17	1
valid_sources[0x4e]	1488	1			T12	1		T18	3		T17	1
valid_sources[0x4f]	1831	1			T8	1		T12	2		T18	1
valid_sources[0x50]	2064	1			T3	2		T9	5		T11	2
valid_sources[0x51]	2432	1			T18	1		T65	2		T14	31
valid_sources[0x52]	2732	1			T6	1		T11	1		T17	2
valid_sources[0x53]	2349	1			T12	2		T18	1		T17	1
valid_sources[0x54]	2171	1			T11	1		T12	1		T18	1
valid_sources[0x55]	1490	1			T12	1		T18	1		T17	2
valid_sources[0x56]	2035	1			T11	3		T12	2		T17	3
valid_sources[0x57]	1966	1			T6	1		T12	1		T66	2
valid_sources[0x58]	2515	1			T8	2		T11	1		T12	1
valid_sources[0x59]	3139	1			T11	1		T12	2		T65	5
valid_sources[0x5a]	3641	1			T12	2		T18	2		T102	2
valid_sources[0x5b]	1297	1			T11	1		T12	1		T65	1
valid_sources[0x5c]	2070	1			T8	5		T12	2		T102	1
valid_sources[0x5d]	1689	1			T3	1		T9	1		T11	1
valid_sources[0x5e]	3355	1			T12	1		T65	2		T57	6
valid_sources[0x5f]	2278	1			T6	1		T17	2		T14	25
valid_sources[0x60]	2532	1			T3	1		T11	2		T18	1
valid_sources[0x61]	1753	1			T8	1		T9	2		T12	1
valid_sources[0x62]	1922	1			T8	4		T12	1		T17	1
valid_sources[0x63]	2316	1			T6	1		T12	2		T17	1
valid_sources[0x64]	1949	1			T12	2		T17	1		T14	21
valid_sources[0x65]	3358	1			T11	1		T12	1		T18	1
valid_sources[0x66]	1465	1			T6	1		T11	1		T18	3
valid_sources[0x67]	2536	1			T6	2		T9	3		T11	1
valid_sources[0x68]	1827	1			T11	1		T12	1		T17	1
valid_sources[0x69]	1507	1			T3	1		T11	1		T17	2
valid_sources[0x6a]	1708	1			T12	2		T65	1		T14	23
valid_sources[0x6b]	1609	1			T12	3		T102	1		T14	25
valid_sources[0x6c]	2002	1			T6	3		T11	1		T12	1
valid_sources[0x6d]	1745	1			T12	3		T18	1		T65	1
valid_sources[0x6e]	1567	1			T12	1		T18	2		T65	5
valid_sources[0x6f]	1308	1			T6	1		T14	8		T48	6
valid_sources[0x70]	1925	1			T12	1		T18	5		T17	1
valid_sources[0x71]	2212	1			T12	1		T17	4		T65	2
valid_sources[0x72]	1324	1			T3	2		T12	1		T65	2
valid_sources[0x73]	2583	1			T11	2		T12	1		T17	1
valid_sources[0x74]	1573	1			T12	5		T17	3		T102	3
valid_sources[0x75]	2816	1			T11	4		T17	3		T66	1
valid_sources[0x76]	2423	1			T6	1		T9	3		T102	2
valid_sources[0x77]	1662	1			T3	1		T12	1		T17	2
valid_sources[0x78]	1742	1			T17	1		T66	1		T14	22
valid_sources[0x79]	1932	1			T6	1		T11	1		T65	5
valid_sources[0x7a]	1665	1			T12	1		T17	2		T102	2
valid_sources[0x7b]	1426	1			T6	1		T12	2		T17	2
valid_sources[0x7c]	2431	1			T6	1		T12	1		T17	4
valid_sources[0x7d]	1633	1			T8	3		T11	1		T12	1
valid_sources[0x7e]	2999	1			T18	1		T17	1		T65	2
valid_sources[0x7f]	1475	1			T8	2		T18	1		T66	1
valid_sources[0x80]	2523	1			T3	1		T12	2		T14	14

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

126563

1

T3

3

T5

6

T6

3

values[0x0]

all_enables

biggest_size

184728

1

T14

2033

T15

50489

T16

20788

values[0x1]

all_enables

biggest_size

185849

1

T14

2153

T15

50469

T16

20766

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43238	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

393922

1

T3

9

T5

14

T6

11

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	113085	1			T1	1		T2	10		T3	32
values[0x0]	150741	1			T23	2		T24	2		T26	2
values[0x1]	173334	1			T23	2		T24	3		T25	1

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	21386	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

415774

1

T2

3

T3

14

T5

17

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1544	1			T14	20		T48	5		T15	493
valid_sources[0x01]	1999	1			T14	15		T52	1		T115	1
valid_sources[0x02]	1648	1			T14	23		T52	1		T63	1
valid_sources[0x03]	1577	1			T19	1		T17	2		T14	14
valid_sources[0x04]	1661	1			T9	3		T17	1		T14	23
valid_sources[0x05]	1839	1			T3	1		T57	1		T26	1
valid_sources[0x06]	1612	1			T5	2		T14	23		T15	492
valid_sources[0x07]	1590	1			T14	16		T48	5		T15	433
valid_sources[0x08]	1740	1			T17	2		T14	12		T48	1
valid_sources[0x09]	1856	1			T14	9		T15	378		T16	239
valid_sources[0x0a]	1386	1			T17	1		T14	11		T76	2
valid_sources[0x0b]	1608	1			T3	1		T14	12		T48	6
valid_sources[0x0c]	1672	1			T3	2		T9	1		T14	26
valid_sources[0x0d]	1571	1			T14	25		T15	407		T16	153
valid_sources[0x0e]	1525	1			T17	2		T14	20		T15	365
valid_sources[0x0f]	1837	1			T19	2		T14	23		T48	3
valid_sources[0x10]	1860	1			T14	20		T77	1		T15	527
valid_sources[0x11]	1604	1			T9	1		T17	1		T14	28
valid_sources[0x12]	1408	1			T14	17		T52	1		T116	1
valid_sources[0x13]	1535	1			T57	1		T14	22		T116	2
valid_sources[0x14]	2160	1			T14	17		T15	420		T16	187
valid_sources[0x15]	1485	1			T3	3		T19	1		T17	1
valid_sources[0x16]	1747	1			T17	1		T14	12		T15	408
valid_sources[0x17]	1877	1			T57	1		T14	22		T63	1
valid_sources[0x18]	1687	1			T17	1		T14	15		T31	1
valid_sources[0x19]	1807	1			T3	1		T12	8		T57	1
valid_sources[0x1a]	1572	1			T12	7		T17	1		T14	18
valid_sources[0x1b]	2126	1			T14	25		T60	1		T15	450
valid_sources[0x1c]	1845	1			T14	14		T31	3		T117	4
valid_sources[0x1d]	1723	1			T14	16		T49	2		T60	1
valid_sources[0x1e]	1887	1			T17	1		T14	14		T48	8
valid_sources[0x1f]	2336	1			T9	1		T14	15		T20	1
valid_sources[0x20]	1819	1			T3	1		T23	4		T14	19
valid_sources[0x21]	1561	1			T3	1		T14	14		T60	1
valid_sources[0x22]	1627	1			T14	20		T118	1		T33	3
valid_sources[0x23]	1640	1			T17	1		T14	19		T119	1
valid_sources[0x24]	1658	1			T14	17		T120	1		T121	1
valid_sources[0x25]	1689	1			T17	2		T14	7		T52	1
valid_sources[0x26]	1632	1			T17	1		T14	12		T34	1
valid_sources[0x27]	1612	1			T18	64		T57	1		T14	11
valid_sources[0x28]	1555	1			T3	3		T17	2		T14	18
valid_sources[0x29]	1582	1			T17	1		T14	12		T34	3
valid_sources[0x2a]	1555	1			T9	2		T14	25		T77	6
valid_sources[0x2b]	1430	1			T17	1		T14	19		T48	7
valid_sources[0x2c]	1765	1			T14	18		T34	1		T15	403
valid_sources[0x2d]	1726	1			T14	13		T31	2		T77	1
valid_sources[0x2e]	1866	1			T14	12		T48	6		T120	1
valid_sources[0x2f]	2036	1			T14	16		T52	1		T122	1
valid_sources[0x30]	1635	1			T14	15		T48	4		T120	1
valid_sources[0x31]	1712	1			T5	1		T14	15		T37	1
valid_sources[0x32]	1650	1			T9	2		T14	24		T48	6
valid_sources[0x33]	1400	1			T17	2		T14	17		T30	5
valid_sources[0x34]	1616	1			T17	1		T14	16		T123	1
valid_sources[0x35]	1507	1			T9	1		T14	19		T48	6
valid_sources[0x36]	1680	1			T22	1		T57	1		T14	17
valid_sources[0x37]	1534	1			T5	1		T17	1		T57	2
valid_sources[0x38]	1697	1			T14	19		T37	2		T32	2
valid_sources[0x39]	1365	1			T7	1		T14	19		T15	353
valid_sources[0x3a]	1636	1			T14	20		T31	1		T15	483
valid_sources[0x3b]	1820	1			T17	3		T14	19		T52	1
valid_sources[0x3c]	2052	1			T17	3		T14	16		T31	1
valid_sources[0x3d]	1829	1			T12	8		T14	24		T76	3
valid_sources[0x3e]	2219	1			T17	2		T14	10		T116	1
valid_sources[0x3f]	1738	1			T27	1		T14	13		T52	1
valid_sources[0x40]	1964	1			T26	1		T14	16		T116	1
valid_sources[0x41]	1694	1			T36	1		T14	12		T37	2
valid_sources[0x42]	1418	1			T14	10		T122	2		T15	412
valid_sources[0x43]	1487	1			T14	27		T15	455		T16	110
valid_sources[0x44]	1581	1			T5	1		T17	1		T57	1
valid_sources[0x45]	1907	1			T14	22		T20	1		T15	405
valid_sources[0x46]	1851	1			T9	2		T17	1		T14	19
valid_sources[0x47]	1653	1			T17	1		T22	4		T57	1
valid_sources[0x48]	1435	1			T14	13		T50	32		T15	395
valid_sources[0x49]	1535	1			T2	9		T14	13		T15	384
valid_sources[0x4a]	1611	1			T17	1		T14	17		T31	1
valid_sources[0x4b]	2045	1			T17	1		T14	13		T115	3
valid_sources[0x4c]	1949	1			T12	7		T17	1		T14	20
valid_sources[0x4d]	1571	1			T17	1		T57	2		T14	14
valid_sources[0x4e]	1550	1			T5	1		T14	20		T123	6
valid_sources[0x4f]	1630	1			T12	4		T17	1		T14	28
valid_sources[0x50]	1704	1			T14	13		T30	14		T20	2
valid_sources[0x51]	1697	1			T57	2		T14	22		T52	1
valid_sources[0x52]	2133	1			T17	1		T101	32		T14	14
valid_sources[0x53]	1746	1			T14	21		T124	1		T15	397
valid_sources[0x54]	1517	1			T5	2		T57	2		T14	24
valid_sources[0x55]	1724	1			T9	1		T14	15		T76	2
valid_sources[0x56]	1454	1			T9	1		T17	2		T14	25
valid_sources[0x57]	1499	1			T14	17		T30	1		T15	331
valid_sources[0x58]	1615	1			T3	1		T36	1		T57	1
valid_sources[0x59]	1629	1			T14	22		T37	1		T52	1
valid_sources[0x5a]	1723	1			T36	1		T14	10		T15	509
valid_sources[0x5b]	1748	1			T9	2		T14	20		T115	1
valid_sources[0x5c]	2099	1			T5	2		T9	1		T12	19
valid_sources[0x5d]	1474	1			T5	1		T17	1		T14	22
valid_sources[0x5e]	1763	1			T14	9		T76	1		T122	1
valid_sources[0x5f]	1345	1			T5	1		T14	14		T117	3
valid_sources[0x60]	1840	1			T14	26		T48	9		T15	576
valid_sources[0x61]	1426	1			T17	2		T36	1		T14	23
valid_sources[0x62]	1690	1			T19	1		T57	1		T14	18
valid_sources[0x63]	1663	1			T24	3		T57	1		T14	24
valid_sources[0x64]	1894	1			T57	1		T14	6		T15	456
valid_sources[0x65]	1530	1			T36	1		T14	24		T122	1
valid_sources[0x66]	1858	1			T14	19		T48	1		T15	470
valid_sources[0x67]	1668	1			T5	2		T14	21		T15	458
valid_sources[0x68]	1432	1			T57	1		T26	1		T14	20
valid_sources[0x69]	1810	1			T14	20		T61	1		T77	4
valid_sources[0x6a]	1741	1			T17	1		T14	23		T15	517
valid_sources[0x6b]	1885	1			T14	23		T52	1		T15	576
valid_sources[0x6c]	1899	1			T14	20		T15	566		T16	162
valid_sources[0x6d]	1633	1			T17	1		T14	28		T115	4
valid_sources[0x6e]	1558	1			T14	17		T31	1		T120	1
valid_sources[0x6f]	1774	1			T5	1		T14	16		T52	1
valid_sources[0x70]	1497	1			T6	2		T17	1		T14	17
valid_sources[0x71]	1975	1			T1	1		T14	23		T15	463
valid_sources[0x72]	1874	1			T12	1		T14	17		T48	1
valid_sources[0x73]	1963	1			T3	5		T14	28		T48	1
valid_sources[0x74]	1653	1			T6	2		T40	1		T14	13
valid_sources[0x75]	1616	1			T19	2		T17	2		T57	2
valid_sources[0x76]	2000	1			T14	26		T116	2		T15	477
valid_sources[0x77]	1632	1			T17	1		T36	1		T14	22
valid_sources[0x78]	1636	1			T17	1		T14	23		T76	4
valid_sources[0x79]	1571	1			T14	30		T122	1		T15	349
valid_sources[0x7a]	1454	1			T17	2		T14	20		T48	2
valid_sources[0x7b]	1933	1			T19	1		T12	11		T17	2
valid_sources[0x7c]	1649	1			T36	1		T14	22		T32	4
valid_sources[0x7d]	1629	1			T19	1		T22	21		T14	24
valid_sources[0x7e]	1849	1			T17	1		T14	15		T48	9
valid_sources[0x7f]	1975	1			T17	1		T36	1		T14	26
valid_sources[0x80]	1758	1			T14	11		T63	1		T15	439

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

99993

1

T3

9

T5

14

T6

11

values[0x0]

all_enables

biggest_size

147291

1

T23

1

T14

1621

T60

1

values[0x1]

all_enables

biggest_size

146638

1

T23

1

T14

1667

T63

1