Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 53737 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1005032 1 T1 11 T3 9 T4 4



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 286708 1 T1 89 T3 9 T4 69
values[0x0] 378846 1 T14 17919 T15 35522 T16 19678
values[0x1] 393215 1 T14 18293 T15 36892 T16 20438



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 26880 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1031889 1 T1 48 T3 9 T4 41



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 4177 1 T9 1 T22 1 T94 1
valid_sources[0x01] 4659 1 T9 1 T14 175 T15 374
valid_sources[0x02] 3644 1 T9 1 T22 1 T94 4
valid_sources[0x03] 3908 1 T1 1 T9 1 T94 2
valid_sources[0x04] 3897 1 T1 1 T94 1 T30 1
valid_sources[0x05] 4021 1 T9 1 T94 1 T14 205
valid_sources[0x06] 3955 1 T22 3 T95 2 T14 192
valid_sources[0x07] 3740 1 T9 2 T22 1 T30 2
valid_sources[0x08] 4031 1 T1 1 T95 2 T14 166
valid_sources[0x09] 5388 1 T9 1 T22 2 T94 2
valid_sources[0x0a] 3683 1 T9 1 T30 4 T14 179
valid_sources[0x0b] 4154 1 T9 3 T22 1 T95 2
valid_sources[0x0c] 4201 1 T9 1 T22 1 T94 1
valid_sources[0x0d] 3923 1 T9 3 T22 1 T94 1
valid_sources[0x0e] 3755 1 T9 2 T95 1 T30 1
valid_sources[0x0f] 3974 1 T1 1 T9 1 T22 1
valid_sources[0x10] 3807 1 T1 1 T9 1 T22 1
valid_sources[0x11] 3494 1 T22 1 T95 1 T30 3
valid_sources[0x12] 4467 1 T4 7 T22 2 T94 1
valid_sources[0x13] 4613 1 T9 4 T22 1 T95 3
valid_sources[0x14] 4471 1 T1 1 T22 2 T94 1
valid_sources[0x15] 4916 1 T1 1 T9 1 T94 1
valid_sources[0x16] 4931 1 T1 2 T9 2 T94 1
valid_sources[0x17] 3856 1 T1 1 T9 2 T22 1
valid_sources[0x18] 4348 1 T22 4 T94 2 T30 1
valid_sources[0x19] 4143 1 T30 2 T14 196 T15 377
valid_sources[0x1a] 5094 1 T1 4 T94 1 T95 4
valid_sources[0x1b] 4513 1 T9 1 T95 2 T14 177
valid_sources[0x1c] 3931 1 T22 2 T94 1 T95 2
valid_sources[0x1d] 3704 1 T22 1 T94 2 T95 2
valid_sources[0x1e] 4535 1 T9 2 T94 1 T95 1
valid_sources[0x1f] 3868 1 T9 2 T22 1 T95 1
valid_sources[0x20] 3721 1 T9 1 T94 1 T95 2
valid_sources[0x21] 4202 1 T9 3 T22 1 T14 194
valid_sources[0x22] 3732 1 T9 2 T94 1 T95 2
valid_sources[0x23] 3599 1 T1 1 T22 1 T95 4
valid_sources[0x24] 4698 1 T1 1 T94 1 T30 4
valid_sources[0x25] 3811 1 T9 2 T94 3 T14 198
valid_sources[0x26] 4382 1 T5 36 T9 1 T94 2
valid_sources[0x27] 3829 1 T94 1 T95 1 T30 1
valid_sources[0x28] 4084 1 T1 1 T9 2 T22 1
valid_sources[0x29] 3581 1 T22 1 T14 191 T15 386
valid_sources[0x2a] 3700 1 T1 2 T95 1 T14 205
valid_sources[0x2b] 4853 1 T9 1 T22 2 T94 1
valid_sources[0x2c] 3835 1 T22 2 T95 1 T14 184
valid_sources[0x2d] 4884 1 T94 1 T95 3 T30 1
valid_sources[0x2e] 3641 1 T9 4 T14 193 T15 342
valid_sources[0x2f] 3562 1 T1 1 T94 1 T14 188
valid_sources[0x30] 3655 1 T1 1 T9 1 T30 4
valid_sources[0x31] 3653 1 T23 36 T95 2 T14 187
valid_sources[0x32] 3843 1 T9 5 T95 4 T14 209
valid_sources[0x33] 3604 1 T1 1 T9 1 T95 1
valid_sources[0x34] 4736 1 T1 1 T22 3 T95 1
valid_sources[0x35] 3714 1 T9 1 T22 1 T23 38
valid_sources[0x36] 3865 1 T94 3 T14 192 T15 367
valid_sources[0x37] 4188 1 T9 1 T94 1 T95 1
valid_sources[0x38] 4150 1 T9 2 T94 2 T95 1
valid_sources[0x39] 4540 1 T9 2 T22 1 T11 1
valid_sources[0x3a] 4871 1 T9 2 T22 1 T94 2
valid_sources[0x3b] 4432 1 T11 5 T94 2 T95 1
valid_sources[0x3c] 3945 1 T1 2 T22 1 T30 3
valid_sources[0x3d] 4514 1 T1 1 T9 1 T94 1
valid_sources[0x3e] 3985 1 T1 2 T22 2 T95 1
valid_sources[0x3f] 4373 1 T9 3 T94 1 T14 166
valid_sources[0x40] 4676 1 T22 1 T94 2 T14 229
valid_sources[0x41] 3722 1 T1 1 T9 1 T95 2
valid_sources[0x42] 3656 1 T22 2 T94 1 T14 185
valid_sources[0x43] 4618 1 T1 1 T9 1 T94 1
valid_sources[0x44] 4092 1 T9 3 T95 2 T30 1
valid_sources[0x45] 3784 1 T22 1 T94 1 T95 1
valid_sources[0x46] 4326 1 T94 1 T14 180 T15 397
valid_sources[0x47] 4160 1 T22 2 T14 206 T15 387
valid_sources[0x48] 3717 1 T22 1 T94 1 T14 173
valid_sources[0x49] 4003 1 T9 3 T22 2 T30 1
valid_sources[0x4a] 3817 1 T4 7 T9 1 T94 2
valid_sources[0x4b] 4590 1 T1 1 T9 2 T22 2
valid_sources[0x4c] 3853 1 T22 1 T14 180 T15 369
valid_sources[0x4d] 4462 1 T9 1 T22 1 T94 1
valid_sources[0x4e] 3760 1 T1 1 T9 3 T22 4
valid_sources[0x4f] 4244 1 T9 1 T22 1 T30 2
valid_sources[0x50] 4948 1 T9 3 T22 3 T23 14
valid_sources[0x51] 3667 1 T1 1 T9 1 T22 1
valid_sources[0x52] 3960 1 T22 2 T95 4 T30 2
valid_sources[0x53] 3920 1 T9 1 T22 2 T94 1
valid_sources[0x54] 4792 1 T22 1 T95 2 T14 191
valid_sources[0x55] 4476 1 T9 3 T22 1 T95 1
valid_sources[0x56] 5353 1 T9 1 T94 1 T30 3
valid_sources[0x57] 3910 1 T9 1 T22 1 T30 1
valid_sources[0x58] 4253 1 T9 1 T94 1 T14 194
valid_sources[0x59] 3950 1 T22 1 T95 3 T14 200
valid_sources[0x5a] 3704 1 T9 2 T22 1 T94 3
valid_sources[0x5b] 3811 1 T94 3 T30 1 T14 183
valid_sources[0x5c] 3671 1 T9 1 T22 1 T94 1
valid_sources[0x5d] 4022 1 T22 2 T30 2 T14 196
valid_sources[0x5e] 3910 1 T9 1 T22 1 T95 6
valid_sources[0x5f] 4167 1 T3 9 T9 1 T95 1
valid_sources[0x60] 4648 1 T9 3 T22 1 T94 1
valid_sources[0x61] 3634 1 T14 186 T15 379 T16 206
valid_sources[0x62] 4028 1 T1 2 T22 1 T95 2
valid_sources[0x63] 3854 1 T1 1 T9 1 T30 1
valid_sources[0x64] 4078 1 T9 2 T22 2 T94 1
valid_sources[0x65] 3797 1 T22 1 T94 2 T95 1
valid_sources[0x66] 3701 1 T94 2 T14 194 T15 355
valid_sources[0x67] 4403 1 T9 1 T22 1 T14 167
valid_sources[0x68] 4186 1 T1 1 T9 2 T22 1
valid_sources[0x69] 3686 1 T4 5 T94 1 T14 189
valid_sources[0x6a] 4612 1 T94 3 T95 2 T30 1
valid_sources[0x6b] 3896 1 T22 3 T30 6 T14 192
valid_sources[0x6c] 3798 1 T9 1 T22 1 T95 3
valid_sources[0x6d] 4381 1 T9 1 T23 11 T30 1
valid_sources[0x6e] 3960 1 T94 1 T14 194 T15 359
valid_sources[0x6f] 3866 1 T9 1 T22 1 T94 2
valid_sources[0x70] 5702 1 T9 2 T95 1 T14 201
valid_sources[0x71] 4062 1 T22 3 T95 1 T30 3
valid_sources[0x72] 4210 1 T9 1 T22 1 T14 199
valid_sources[0x73] 3884 1 T1 2 T22 2 T14 157
valid_sources[0x74] 4577 1 T22 1 T94 1 T95 1
valid_sources[0x75] 3767 1 T94 1 T95 2 T30 1
valid_sources[0x76] 4125 1 T1 1 T4 7 T14 194
valid_sources[0x77] 4545 1 T1 2 T9 1 T94 1
valid_sources[0x78] 3963 1 T9 1 T22 1 T12 40
valid_sources[0x79] 3895 1 T22 1 T12 17 T95 1
valid_sources[0x7a] 3760 1 T9 1 T14 194 T15 361
valid_sources[0x7b] 3802 1 T1 3 T4 2 T9 2
valid_sources[0x7c] 3569 1 T1 2 T9 1 T22 1
valid_sources[0x7d] 4966 1 T22 1 T94 1 T35 6
valid_sources[0x7e] 3821 1 T9 1 T22 1 T95 1
valid_sources[0x7f] 3871 1 T95 1 T30 3 T14 181
valid_sources[0x80] 4379 1 T1 1 T5 18 T9 3



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 253673 1 T1 11 T3 9 T4 4
values[0x0] all_enables biggest_size 375560 1 T14 17776 T15 35193 T16 19507
values[0x1] all_enables biggest_size 375799 1 T14 17523 T15 35201 T16 19524


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 79709 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 780833 1 T1 17 T2 1 T3 14



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 217574 1 T1 32 T2 1 T3 22
values[0x0] 299007 1 T7 4 T8 5 T27 3
values[0x1] 343961 1 T7 4 T8 6 T27 6



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 37094 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 823448 1 T1 18 T2 1 T3 15



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 3317 1 T9 1 T14 131 T15 339
valid_sources[0x01] 3474 1 T8 1 T14 166 T15 296
valid_sources[0x02] 3317 1 T14 133 T15 309 T16 171
valid_sources[0x03] 2993 1 T14 140 T15 268 T16 206
valid_sources[0x04] 3500 1 T14 151 T15 313 T16 153
valid_sources[0x05] 3586 1 T35 1 T14 135 T15 336
valid_sources[0x06] 3072 1 T14 129 T15 293 T16 189
valid_sources[0x07] 3627 1 T9 1 T31 1 T14 143
valid_sources[0x08] 3403 1 T14 130 T15 324 T16 191
valid_sources[0x09] 3119 1 T4 3 T36 1 T14 139
valid_sources[0x0a] 3230 1 T3 5 T12 3 T14 143
valid_sources[0x0b] 3392 1 T35 1 T14 165 T15 277
valid_sources[0x0c] 3607 1 T14 114 T15 327 T53 2
valid_sources[0x0d] 3819 1 T3 2 T11 30 T36 1
valid_sources[0x0e] 3553 1 T5 2 T31 1 T14 125
valid_sources[0x0f] 4236 1 T9 2 T35 1 T36 1
valid_sources[0x10] 3144 1 T8 1 T14 149 T33 8
valid_sources[0x11] 3663 1 T14 142 T15 306 T16 139
valid_sources[0x12] 3084 1 T1 3 T14 149 T15 329
valid_sources[0x13] 3646 1 T14 130 T15 297 T16 198
valid_sources[0x14] 3114 1 T14 138 T15 322 T16 165
valid_sources[0x15] 3431 1 T14 143 T15 352 T16 123
valid_sources[0x16] 3436 1 T14 190 T15 313 T19 1
valid_sources[0x17] 4325 1 T14 138 T15 303 T16 190
valid_sources[0x18] 3774 1 T8 1 T14 147 T15 315
valid_sources[0x19] 2922 1 T9 6 T14 131 T15 313
valid_sources[0x1a] 3309 1 T35 1 T14 130 T15 296
valid_sources[0x1b] 3703 1 T9 4 T14 147 T15 338
valid_sources[0x1c] 3422 1 T5 1 T10 1 T31 1
valid_sources[0x1d] 3451 1 T9 2 T36 3 T14 153
valid_sources[0x1e] 3463 1 T9 3 T14 161 T15 328
valid_sources[0x1f] 3399 1 T14 137 T15 343 T16 163
valid_sources[0x20] 3125 1 T14 155 T15 310 T16 174
valid_sources[0x21] 3135 1 T14 128 T15 300 T16 159
valid_sources[0x22] 3302 1 T14 163 T15 305 T16 175
valid_sources[0x23] 3363 1 T14 173 T15 294 T16 192
valid_sources[0x24] 3650 1 T3 1 T9 2 T14 159
valid_sources[0x25] 3315 1 T27 2 T14 152 T15 311
valid_sources[0x26] 2904 1 T12 5 T14 159 T15 288
valid_sources[0x27] 3116 1 T4 3 T5 3 T10 1
valid_sources[0x28] 3232 1 T14 164 T15 316 T16 173
valid_sources[0x29] 3140 1 T14 175 T15 308 T16 135
valid_sources[0x2a] 3380 1 T27 1 T14 148 T15 306
valid_sources[0x2b] 3418 1 T14 163 T15 304 T16 173
valid_sources[0x2c] 3357 1 T31 2 T14 143 T15 308
valid_sources[0x2d] 3180 1 T9 4 T21 3 T14 193
valid_sources[0x2e] 3052 1 T35 1 T24 1 T14 155
valid_sources[0x2f] 3067 1 T5 1 T35 1 T14 177
valid_sources[0x30] 3375 1 T9 3 T108 1 T14 139
valid_sources[0x31] 3443 1 T5 1 T9 1 T14 161
valid_sources[0x32] 3058 1 T9 1 T14 142 T15 307
valid_sources[0x33] 3366 1 T14 147 T15 334 T16 148
valid_sources[0x34] 3013 1 T14 144 T15 285 T16 157
valid_sources[0x35] 3229 1 T5 2 T14 152 T15 310
valid_sources[0x36] 3108 1 T14 165 T15 316 T20 32
valid_sources[0x37] 3419 1 T14 159 T15 312 T16 150
valid_sources[0x38] 3573 1 T14 182 T15 317 T16 159
valid_sources[0x39] 2937 1 T14 147 T15 293 T19 3
valid_sources[0x3a] 3395 1 T35 1 T14 144 T15 327
valid_sources[0x3b] 2942 1 T14 133 T15 290 T16 144
valid_sources[0x3c] 3714 1 T1 3 T14 135 T15 280
valid_sources[0x3d] 3082 1 T31 1 T14 159 T15 327
valid_sources[0x3e] 3146 1 T14 151 T15 335 T16 179
valid_sources[0x3f] 3042 1 T1 8 T14 148 T15 300
valid_sources[0x40] 4112 1 T14 119 T15 306 T16 157
valid_sources[0x41] 3294 1 T9 2 T31 2 T14 158
valid_sources[0x42] 3416 1 T14 144 T15 291 T16 216
valid_sources[0x43] 3127 1 T10 1 T14 154 T15 326
valid_sources[0x44] 3154 1 T3 3 T8 1 T14 163
valid_sources[0x45] 3693 1 T9 1 T12 14 T14 129
valid_sources[0x46] 3473 1 T14 146 T15 279 T19 2
valid_sources[0x47] 3005 1 T36 1 T14 153 T15 308
valid_sources[0x48] 2992 1 T14 143 T15 327 T16 172
valid_sources[0x49] 3163 1 T14 162 T15 337 T16 144
valid_sources[0x4a] 3033 1 T14 141 T15 306 T16 137
valid_sources[0x4b] 3153 1 T14 135 T15 302 T16 173
valid_sources[0x4c] 3108 1 T14 144 T15 287 T16 200
valid_sources[0x4d] 2998 1 T14 162 T15 333 T16 183
valid_sources[0x4e] 3008 1 T9 2 T14 133 T15 325
valid_sources[0x4f] 3555 1 T5 1 T14 163 T15 322
valid_sources[0x50] 3470 1 T5 5 T14 147 T15 300
valid_sources[0x51] 3179 1 T14 166 T15 312 T19 1
valid_sources[0x52] 3174 1 T14 149 T15 305 T16 150
valid_sources[0x53] 3406 1 T14 179 T15 305 T16 155
valid_sources[0x54] 3294 1 T14 146 T15 289 T16 215
valid_sources[0x55] 3137 1 T14 193 T15 328 T19 2
valid_sources[0x56] 3443 1 T10 2 T14 151 T33 4
valid_sources[0x57] 3229 1 T14 124 T15 305 T16 175
valid_sources[0x58] 3835 1 T6 1 T9 4 T14 140
valid_sources[0x59] 3534 1 T14 137 T15 315 T19 3
valid_sources[0x5a] 3342 1 T14 150 T15 285 T16 201
valid_sources[0x5b] 3549 1 T5 3 T9 1 T14 121
valid_sources[0x5c] 3902 1 T31 2 T14 167 T15 282
valid_sources[0x5d] 3067 1 T8 1 T9 1 T14 142
valid_sources[0x5e] 3604 1 T31 2 T14 165 T15 295
valid_sources[0x5f] 3758 1 T14 155 T15 334 T16 217
valid_sources[0x60] 3491 1 T9 5 T14 163 T15 307
valid_sources[0x61] 3461 1 T35 1 T14 175 T15 313
valid_sources[0x62] 3728 1 T1 1 T9 1 T14 161
valid_sources[0x63] 3199 1 T10 1 T14 171 T15 287
valid_sources[0x64] 2935 1 T8 1 T14 157 T15 313
valid_sources[0x65] 3580 1 T14 132 T15 313 T16 178
valid_sources[0x66] 3416 1 T5 1 T14 156 T15 306
valid_sources[0x67] 3189 1 T4 5 T5 4 T8 1
valid_sources[0x68] 3434 1 T9 6 T10 1 T14 183
valid_sources[0x69] 3353 1 T35 1 T14 129 T15 301
valid_sources[0x6a] 3339 1 T14 146 T15 332 T16 171
valid_sources[0x6b] 3174 1 T5 4 T14 155 T15 286
valid_sources[0x6c] 3191 1 T8 1 T9 7 T14 187
valid_sources[0x6d] 3106 1 T9 3 T14 149 T15 291
valid_sources[0x6e] 3339 1 T14 158 T15 303 T16 171
valid_sources[0x6f] 3340 1 T9 1 T31 1 T14 138
valid_sources[0x70] 3239 1 T9 6 T14 145 T15 311
valid_sources[0x71] 4110 1 T14 140 T15 318 T19 2
valid_sources[0x72] 3240 1 T9 3 T14 132 T15 298
valid_sources[0x73] 3760 1 T14 158 T15 321 T52 15
valid_sources[0x74] 3615 1 T9 3 T21 10 T14 177
valid_sources[0x75] 3226 1 T14 145 T15 295 T16 165
valid_sources[0x76] 3164 1 T35 1 T14 125 T15 324
valid_sources[0x77] 3347 1 T24 2 T14 160 T15 312
valid_sources[0x78] 3274 1 T31 1 T14 146 T15 289
valid_sources[0x79] 3129 1 T14 159 T15 326 T16 197
valid_sources[0x7a] 3338 1 T5 1 T24 2 T14 156
valid_sources[0x7b] 2905 1 T14 149 T15 274 T19 2
valid_sources[0x7c] 3091 1 T5 1 T10 1 T14 133
valid_sources[0x7d] 3160 1 T14 161 T15 298 T16 147
valid_sources[0x7e] 3622 1 T14 150 T15 286 T16 152
valid_sources[0x7f] 3736 1 T14 143 T15 286 T16 221
valid_sources[0x80] 3264 1 T5 1 T14 143 T15 327



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 197559 1 T1 17 T2 1 T3 14
values[0x0] all_enables biggest_size 292707 1 T7 1 T8 3 T27 2
values[0x1] all_enables biggest_size 290567 1 T7 1 T8 1 T14 12945

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