Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53929	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1562960

1

T1

3

T3

93281

T4

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	413008	1			T1	3		T3	23405		T4	53
values[0x0]	591052	1			T3	35347		T15	21974		T12	12261
values[0x1]	612829	1			T3	36736		T15	22529		T12	12947

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28833	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1588056

1

T1

3

T3

94190

T4

30

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	6456	1			T3	370		T6	3		T15	247
valid_sources[0x01]	6418	1			T3	350		T6	1		T14	2
valid_sources[0x02]	6495	1			T3	381		T6	3		T15	220
valid_sources[0x03]	5919	1			T3	322		T6	1		T15	252
valid_sources[0x04]	6127	1			T3	423		T9	1		T15	257
valid_sources[0x05]	5870	1			T3	405		T4	1		T15	253
valid_sources[0x06]	5598	1			T3	330		T4	1		T6	2
valid_sources[0x07]	6662	1			T3	394		T9	1		T15	225
valid_sources[0x08]	7642	1			T3	378		T4	1		T6	1
valid_sources[0x09]	6697	1			T3	445		T6	3		T14	1
valid_sources[0x0a]	5653	1			T3	369		T4	1		T6	1
valid_sources[0x0b]	6834	1			T3	333		T4	1		T6	6
valid_sources[0x0c]	5794	1			T3	360		T4	1		T6	2
valid_sources[0x0d]	6751	1			T3	450		T6	1		T15	222
valid_sources[0x0e]	5815	1			T3	364		T15	233		T58	2
valid_sources[0x0f]	5599	1			T3	388		T4	1		T6	1
valid_sources[0x10]	7294	1			T3	443		T15	236		T104	1
valid_sources[0x11]	6903	1			T3	416		T6	2		T15	237
valid_sources[0x12]	5294	1			T3	384		T4	1		T6	1
valid_sources[0x13]	7639	1			T3	369		T14	2		T15	243
valid_sources[0x14]	7827	1			T3	392		T4	2		T6	1
valid_sources[0x15]	5290	1			T3	343		T15	254		T104	3
valid_sources[0x16]	5143	1			T3	421		T6	1		T15	214
valid_sources[0x17]	6715	1			T3	369		T6	2		T14	1
valid_sources[0x18]	7419	1			T3	411		T6	4		T14	3
valid_sources[0x19]	5759	1			T3	407		T4	1		T6	2
valid_sources[0x1a]	6181	1			T3	450		T6	1		T15	215
valid_sources[0x1b]	5736	1			T3	357		T6	1		T15	213
valid_sources[0x1c]	5372	1			T3	396		T6	3		T14	2
valid_sources[0x1d]	5879	1			T3	376		T6	1		T9	1
valid_sources[0x1e]	6375	1			T3	389		T6	2		T15	215
valid_sources[0x1f]	6459	1			T3	436		T14	4		T15	233
valid_sources[0x20]	6944	1			T3	335		T14	2		T15	226
valid_sources[0x21]	5318	1			T3	368		T6	1		T9	1
valid_sources[0x22]	6143	1			T3	364		T15	225		T16	2
valid_sources[0x23]	7465	1			T3	416		T6	2		T14	1
valid_sources[0x24]	6046	1			T3	374		T4	1		T6	1
valid_sources[0x25]	4902	1			T3	389		T6	2		T15	225
valid_sources[0x26]	6186	1			T3	367		T6	3		T14	2
valid_sources[0x27]	5306	1			T3	396		T6	1		T14	1
valid_sources[0x28]	5803	1			T3	344		T14	3		T15	246
valid_sources[0x29]	7556	1			T3	400		T6	1		T15	233
valid_sources[0x2a]	6347	1			T3	434		T6	3		T15	236
valid_sources[0x2b]	6674	1			T3	382		T6	4		T15	228
valid_sources[0x2c]	7787	1			T3	347		T15	230		T16	1
valid_sources[0x2d]	5487	1			T3	348		T6	6		T14	5
valid_sources[0x2e]	6533	1			T3	354		T9	2		T15	232
valid_sources[0x2f]	6107	1			T3	384		T6	5		T15	248
valid_sources[0x30]	7835	1			T3	377		T6	2		T14	4
valid_sources[0x31]	5725	1			T3	346		T15	213		T30	1
valid_sources[0x32]	5800	1			T3	337		T6	3		T15	239
valid_sources[0x33]	6146	1			T3	392		T4	1		T6	1
valid_sources[0x34]	8399	1			T3	369		T6	1		T15	223
valid_sources[0x35]	5586	1			T3	356		T6	4		T15	214
valid_sources[0x36]	5571	1			T3	390		T6	1		T15	253
valid_sources[0x37]	6620	1			T3	399		T6	1		T15	240
valid_sources[0x38]	5950	1			T3	382		T6	3		T15	251
valid_sources[0x39]	6376	1			T3	440		T15	245		T16	1
valid_sources[0x3a]	5867	1			T3	396		T4	1		T6	1
valid_sources[0x3b]	5986	1			T3	332		T4	1		T6	1
valid_sources[0x3c]	5475	1			T3	320		T6	2		T9	2
valid_sources[0x3d]	7199	1			T3	412		T6	2		T15	254
valid_sources[0x3e]	6479	1			T3	346		T6	3		T9	1
valid_sources[0x3f]	6087	1			T3	387		T6	1		T9	2
valid_sources[0x40]	6691	1			T3	435		T14	2		T15	254
valid_sources[0x41]	5366	1			T3	399		T6	4		T15	240
valid_sources[0x42]	7066	1			T3	417		T6	4		T9	1
valid_sources[0x43]	5118	1			T3	328		T6	2		T15	233
valid_sources[0x44]	6380	1			T3	422		T4	1		T6	4
valid_sources[0x45]	5746	1			T3	412		T6	3		T9	1
valid_sources[0x46]	7588	1			T3	380		T6	3		T14	1
valid_sources[0x47]	6117	1			T3	387		T6	3		T14	1
valid_sources[0x48]	6381	1			T3	380		T6	2		T15	221
valid_sources[0x49]	5852	1			T3	307		T15	250		T32	1
valid_sources[0x4a]	5466	1			T3	312		T4	1		T15	239
valid_sources[0x4b]	7480	1			T3	393		T4	2		T15	236
valid_sources[0x4c]	7594	1			T3	441		T6	2		T14	3
valid_sources[0x4d]	5421	1			T3	395		T6	1		T15	239
valid_sources[0x4e]	6039	1			T3	368		T4	1		T14	2
valid_sources[0x4f]	6024	1			T3	424		T6	4		T14	1
valid_sources[0x50]	6318	1			T3	340		T6	2		T15	241
valid_sources[0x51]	6570	1			T3	349		T6	2		T14	2
valid_sources[0x52]	7076	1			T3	412		T6	3		T14	3
valid_sources[0x53]	6348	1			T3	366		T6	2		T15	203
valid_sources[0x54]	6906	1			T3	362		T6	1		T15	221
valid_sources[0x55]	6505	1			T3	389		T6	1		T15	221
valid_sources[0x56]	6347	1			T3	334		T4	1		T6	3
valid_sources[0x57]	6176	1			T3	365		T15	235		T16	1
valid_sources[0x58]	5501	1			T3	346		T6	2		T9	1
valid_sources[0x59]	6183	1			T3	397		T6	2		T15	227
valid_sources[0x5a]	5857	1			T3	385		T6	1		T14	3
valid_sources[0x5b]	6533	1			T3	348		T6	1		T15	209
valid_sources[0x5c]	6072	1			T3	349		T4	1		T6	3
valid_sources[0x5d]	6488	1			T3	363		T6	1		T9	1
valid_sources[0x5e]	6649	1			T3	341		T4	1		T6	2
valid_sources[0x5f]	7640	1			T3	374		T4	1		T6	1
valid_sources[0x60]	6773	1			T3	369		T4	1		T6	2
valid_sources[0x61]	6035	1			T3	384		T6	4		T9	1
valid_sources[0x62]	6021	1			T3	354		T6	1		T15	215
valid_sources[0x63]	5364	1			T3	433		T4	1		T9	1
valid_sources[0x64]	5938	1			T3	367		T6	1		T15	252
valid_sources[0x65]	6464	1			T3	343		T9	1		T15	243
valid_sources[0x66]	6405	1			T3	398		T15	236		T105	2
valid_sources[0x67]	6287	1			T3	379		T6	2		T15	233
valid_sources[0x68]	6350	1			T3	382		T15	231		T32	1
valid_sources[0x69]	6373	1			T3	354		T6	1		T15	206
valid_sources[0x6a]	5225	1			T3	379		T15	234		T31	1
valid_sources[0x6b]	6051	1			T3	359		T6	1		T9	1
valid_sources[0x6c]	6514	1			T3	369		T4	1		T6	1
valid_sources[0x6d]	5528	1			T3	378		T14	2		T15	232
valid_sources[0x6e]	7650	1			T3	305		T9	1		T14	1
valid_sources[0x6f]	6419	1			T3	340		T6	4		T15	236
valid_sources[0x70]	7383	1			T3	389		T4	1		T6	3
valid_sources[0x71]	4847	1			T3	362		T6	1		T15	232
valid_sources[0x72]	6576	1			T3	357		T15	239		T58	6
valid_sources[0x73]	6879	1			T3	294		T6	3		T9	1
valid_sources[0x74]	7225	1			T3	291		T4	1		T6	1
valid_sources[0x75]	5345	1			T3	301		T4	1		T6	1
valid_sources[0x76]	5865	1			T3	409		T13	3		T15	232
valid_sources[0x77]	7342	1			T3	392		T4	1		T14	1
valid_sources[0x78]	9128	1			T3	314		T6	1		T15	217
valid_sources[0x79]	5491	1			T3	389		T4	1		T15	250
valid_sources[0x7a]	5803	1			T3	362		T6	1		T15	251
valid_sources[0x7b]	5691	1			T3	419		T15	243		T16	2
valid_sources[0x7c]	5679	1			T3	383		T14	1		T15	234
valid_sources[0x7d]	5170	1			T3	320		T6	1		T9	1
valid_sources[0x7e]	6021	1			T3	327		T6	1		T9	1
valid_sources[0x7f]	6704	1			T3	369		T15	248		T16	2
valid_sources[0x80]	6436	1			T3	418		T4	1		T6	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

391908

1

T1

3

T3

23208

T4

8

values[0x0]

all_enables

biggest_size

585658

1

T3

35031

T15

21772

T12

12169

values[0x1]

all_enables

biggest_size

585394

1

T3

35042

T15

21456

T12

12459

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	114919	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1210623

1

T1

12

T2

1

T3

71350

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	326799	1			T1	21		T2	1		T3	18847
values[0x0]	463613	1			T3	27398		T5	4		T7	9
values[0x1]	535130	1			T3	31330		T7	7		T8	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50516	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1275026

1

T1

14

T2

1

T3

74942

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	5524	1			T3	322		T15	222		T11	2
valid_sources[0x01]	6069	1			T3	322		T15	219		T32	4
valid_sources[0x02]	5275	1			T3	295		T15	209		T12	100
valid_sources[0x03]	5358	1			T3	284		T15	171		T12	106
valid_sources[0x04]	4414	1			T3	291		T15	194		T12	99
valid_sources[0x05]	5582	1			T3	303		T15	193		T12	93
valid_sources[0x06]	5218	1			T3	339		T15	190		T12	98
valid_sources[0x07]	5374	1			T3	268		T13	1		T15	209
valid_sources[0x08]	5480	1			T3	297		T15	188		T12	101
valid_sources[0x09]	5667	1			T3	303		T15	210		T31	3
valid_sources[0x0a]	5193	1			T3	317		T15	205		T12	101
valid_sources[0x0b]	5166	1			T3	294		T15	253		T12	107
valid_sources[0x0c]	4706	1			T3	310		T15	191		T11	1
valid_sources[0x0d]	5019	1			T3	305		T5	1		T15	241
valid_sources[0x0e]	5185	1			T3	296		T15	214		T12	82
valid_sources[0x0f]	5101	1			T3	266		T8	1		T15	227
valid_sources[0x10]	4931	1			T3	320		T15	226		T12	126
valid_sources[0x11]	4634	1			T2	1		T3	285		T15	232
valid_sources[0x12]	5009	1			T3	308		T15	203		T88	1
valid_sources[0x13]	5324	1			T3	293		T4	2		T15	171
valid_sources[0x14]	4923	1			T3	282		T15	230		T12	89
valid_sources[0x15]	4781	1			T3	289		T15	189		T32	1
valid_sources[0x16]	4580	1			T3	283		T15	176		T29	1
valid_sources[0x17]	5207	1			T3	280		T15	206		T12	106
valid_sources[0x18]	6203	1			T3	330		T15	190		T11	2
valid_sources[0x19]	5037	1			T3	299		T15	233		T18	1
valid_sources[0x1a]	6453	1			T3	297		T15	211		T12	81
valid_sources[0x1b]	6654	1			T3	345		T10	2		T15	200
valid_sources[0x1c]	5157	1			T3	289		T15	220		T12	103
valid_sources[0x1d]	4531	1			T3	299		T15	205		T12	101
valid_sources[0x1e]	4300	1			T3	277		T15	242		T68	1
valid_sources[0x1f]	4671	1			T3	286		T15	225		T68	1
valid_sources[0x20]	4584	1			T3	318		T7	2		T15	223
valid_sources[0x21]	4859	1			T3	315		T15	222		T31	1
valid_sources[0x22]	4598	1			T3	303		T7	1		T15	208
valid_sources[0x23]	4977	1			T3	297		T15	183		T19	3
valid_sources[0x24]	5232	1			T3	309		T15	229		T11	2
valid_sources[0x25]	4336	1			T3	289		T15	236		T32	2
valid_sources[0x26]	5489	1			T3	265		T15	221		T31	1
valid_sources[0x27]	4763	1			T3	303		T15	236		T18	1
valid_sources[0x28]	5073	1			T3	321		T15	192		T17	28
valid_sources[0x29]	4580	1			T1	1		T3	269		T15	197
valid_sources[0x2a]	6670	1			T3	306		T15	162		T32	2
valid_sources[0x2b]	5509	1			T3	292		T15	243		T19	1
valid_sources[0x2c]	5646	1			T3	306		T15	202		T29	1
valid_sources[0x2d]	5662	1			T3	326		T15	226		T57	2
valid_sources[0x2e]	4481	1			T3	341		T15	253		T18	1
valid_sources[0x2f]	4314	1			T3	335		T15	190		T11	1
valid_sources[0x30]	5168	1			T3	299		T15	238		T12	106
valid_sources[0x31]	5064	1			T3	298		T15	184		T12	119
valid_sources[0x32]	4708	1			T3	295		T15	217		T29	1
valid_sources[0x33]	5165	1			T1	1		T3	292		T15	224
valid_sources[0x34]	4449	1			T3	299		T4	1		T15	206
valid_sources[0x35]	5123	1			T3	325		T15	172		T12	107
valid_sources[0x36]	5938	1			T1	1		T3	320		T13	2
valid_sources[0x37]	5853	1			T3	334		T15	205		T32	1
valid_sources[0x38]	4571	1			T3	283		T15	259		T12	147
valid_sources[0x39]	4788	1			T3	296		T15	208		T31	1
valid_sources[0x3a]	4936	1			T3	310		T15	223		T106	1
valid_sources[0x3b]	4977	1			T3	293		T15	220		T12	95
valid_sources[0x3c]	5145	1			T3	288		T15	215		T88	1
valid_sources[0x3d]	5251	1			T3	317		T15	221		T12	81
valid_sources[0x3e]	4975	1			T3	313		T15	149		T32	1
valid_sources[0x3f]	4200	1			T3	297		T15	216		T18	1
valid_sources[0x40]	5810	1			T3	307		T15	218		T18	1
valid_sources[0x41]	5882	1			T1	1		T3	344		T15	180
valid_sources[0x42]	4745	1			T3	325		T15	187		T32	1
valid_sources[0x43]	4953	1			T3	307		T15	212		T107	1
valid_sources[0x44]	6782	1			T3	305		T15	186		T68	2
valid_sources[0x45]	4936	1			T3	313		T15	199		T19	2
valid_sources[0x46]	4913	1			T3	272		T15	206		T18	1
valid_sources[0x47]	4245	1			T3	300		T15	179		T68	2
valid_sources[0x48]	4898	1			T3	294		T15	174		T108	1
valid_sources[0x49]	5535	1			T3	319		T15	238		T12	104
valid_sources[0x4a]	6071	1			T3	283		T15	195		T12	87
valid_sources[0x4b]	5951	1			T3	298		T15	242		T12	134
valid_sources[0x4c]	5279	1			T3	290		T15	209		T32	6
valid_sources[0x4d]	6821	1			T3	302		T15	205		T11	1
valid_sources[0x4e]	5260	1			T3	291		T15	202		T30	9
valid_sources[0x4f]	5600	1			T3	325		T15	162		T12	90
valid_sources[0x50]	6444	1			T1	1		T3	318		T4	4
valid_sources[0x51]	4257	1			T3	281		T15	211		T12	99
valid_sources[0x52]	4741	1			T3	327		T15	200		T12	91
valid_sources[0x53]	4707	1			T3	317		T15	166		T12	87
valid_sources[0x54]	5760	1			T3	326		T15	217		T87	11
valid_sources[0x55]	6006	1			T3	328		T4	1		T15	149
valid_sources[0x56]	4892	1			T1	1		T3	285		T4	1
valid_sources[0x57]	5012	1			T3	288		T15	199		T18	1
valid_sources[0x58]	4146	1			T3	312		T15	219		T18	1
valid_sources[0x59]	6043	1			T3	271		T15	168		T57	1
valid_sources[0x5a]	5161	1			T3	267		T4	4		T15	173
valid_sources[0x5b]	4736	1			T3	276		T15	223		T57	2
valid_sources[0x5c]	5436	1			T3	323		T15	189		T107	1
valid_sources[0x5d]	6141	1			T3	326		T15	213		T32	1
valid_sources[0x5e]	5600	1			T3	312		T15	195		T88	2
valid_sources[0x5f]	5144	1			T3	301		T15	203		T68	3
valid_sources[0x60]	4658	1			T3	296		T15	225		T12	90
valid_sources[0x61]	4964	1			T3	312		T15	217		T31	4
valid_sources[0x62]	5768	1			T3	316		T15	178		T12	107
valid_sources[0x63]	4418	1			T3	301		T15	186		T88	1
valid_sources[0x64]	6050	1			T3	301		T15	165		T32	1
valid_sources[0x65]	4747	1			T3	336		T15	215		T12	75
valid_sources[0x66]	4871	1			T3	279		T15	232		T12	117
valid_sources[0x67]	4670	1			T3	311		T15	204		T31	2
valid_sources[0x68]	5510	1			T3	295		T15	178		T18	1
valid_sources[0x69]	4672	1			T3	307		T7	3		T15	257
valid_sources[0x6a]	5251	1			T3	308		T15	188		T32	1
valid_sources[0x6b]	5441	1			T3	322		T15	210		T18	1
valid_sources[0x6c]	5405	1			T3	295		T15	193		T12	79
valid_sources[0x6d]	4838	1			T3	307		T15	207		T12	100
valid_sources[0x6e]	4848	1			T3	300		T15	263		T68	2
valid_sources[0x6f]	4814	1			T3	296		T15	214		T12	105
valid_sources[0x70]	5009	1			T3	347		T15	181		T18	1
valid_sources[0x71]	4546	1			T3	308		T15	205		T19	1
valid_sources[0x72]	4700	1			T3	303		T13	1		T15	200
valid_sources[0x73]	4141	1			T3	287		T15	177		T88	1
valid_sources[0x74]	4848	1			T3	300		T4	1		T15	218
valid_sources[0x75]	5627	1			T3	295		T15	175		T29	1
valid_sources[0x76]	5588	1			T3	329		T13	1		T15	202
valid_sources[0x77]	4155	1			T1	1		T3	299		T15	251
valid_sources[0x78]	5215	1			T1	1		T3	296		T4	3
valid_sources[0x79]	5374	1			T3	277		T15	178		T12	94
valid_sources[0x7a]	4570	1			T3	316		T5	1		T15	205
valid_sources[0x7b]	5305	1			T3	284		T13	1		T15	194
valid_sources[0x7c]	4423	1			T3	309		T15	171		T12	71
valid_sources[0x7d]	4205	1			T3	302		T15	188		T12	83
valid_sources[0x7e]	5691	1			T3	301		T15	237		T31	1
valid_sources[0x7f]	4819	1			T3	314		T15	213		T12	105
valid_sources[0x80]	5528	1			T1	1		T3	286		T15	186

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

303711

1

T1

12

T2

1

T3

17742

values[0x0]

all_enables

biggest_size

454062

1

T3

26923

T5

1

T7

3

values[0x1]

all_enables

biggest_size

452850

1

T3

26685

T8

2

T10

1