Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	43011	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

1103766

1

T1

6

T2

3

T3

7

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	298324	1			T1	6		T2	3		T3	64
values[0x0]	416546	1			T14	28058		T15	15202		T16	63150
values[0x1]	431907	1			T14	29420		T15	15847		T16	65148

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	22186	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

1124591

1

T1

6

T2

3

T3

39

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3997	1			T103	3		T105	2		T121	1
valid_sources[0x01]	5458	1			T104	1		T121	11		T38	1
valid_sources[0x02]	4179	1			T10	1		T103	1		T105	1
valid_sources[0x03]	3470	1			T10	3		T104	1		T105	1
valid_sources[0x04]	3853	1			T10	1		T103	2		T104	1
valid_sources[0x05]	3612	1			T4	10		T12	1		T103	1
valid_sources[0x06]	4301	1			T4	3		T10	2		T103	2
valid_sources[0x07]	4192	1			T7	1		T10	1		T103	3
valid_sources[0x08]	4417	1			T103	5		T105	4		T122	1
valid_sources[0x09]	4261	1			T10	2		T103	1		T104	1
valid_sources[0x0a]	3823	1			T10	1		T105	1		T35	2
valid_sources[0x0b]	3532	1			T10	2		T103	3		T104	2
valid_sources[0x0c]	4726	1			T7	1		T10	1		T103	2
valid_sources[0x0d]	4967	1			T10	1		T103	3		T104	3
valid_sources[0x0e]	4222	1			T10	1		T103	1		T106	1
valid_sources[0x0f]	4522	1			T10	3		T103	2		T104	1
valid_sources[0x10]	4731	1			T4	19		T7	1		T10	1
valid_sources[0x11]	3931	1			T103	2		T104	3		T105	2
valid_sources[0x12]	4625	1			T7	1		T10	1		T12	1
valid_sources[0x13]	4124	1			T104	1		T106	1		T122	1
valid_sources[0x14]	4126	1			T10	2		T103	1		T104	3
valid_sources[0x15]	4040	1			T10	1		T103	2		T104	2
valid_sources[0x16]	4253	1			T10	1		T12	2		T103	4
valid_sources[0x17]	6070	1			T4	5		T10	1		T103	2
valid_sources[0x18]	4910	1			T103	3		T104	2		T121	3
valid_sources[0x19]	3920	1			T10	3		T20	44		T103	6
valid_sources[0x1a]	4199	1			T10	1		T12	1		T103	1
valid_sources[0x1b]	3707	1			T103	2		T104	1		T105	2
valid_sources[0x1c]	4787	1			T10	3		T104	3		T105	4
valid_sources[0x1d]	4243	1			T10	3		T103	1		T105	5
valid_sources[0x1e]	3459	1			T10	3		T21	2		T103	1
valid_sources[0x1f]	3945	1			T10	1		T103	1		T14	189
valid_sources[0x20]	3906	1			T10	1		T103	1		T104	1
valid_sources[0x21]	6967	1			T10	1		T22	1		T103	1
valid_sources[0x22]	6347	1			T12	1		T103	2		T105	1
valid_sources[0x23]	4983	1			T10	3		T103	3		T104	2
valid_sources[0x24]	3772	1			T10	1		T103	1		T104	1
valid_sources[0x25]	5132	1			T10	1		T104	1		T106	1
valid_sources[0x26]	4606	1			T4	12		T10	1		T105	2
valid_sources[0x27]	4251	1			T103	2		T105	2		T122	1
valid_sources[0x28]	4191	1			T10	6		T20	20		T21	6
valid_sources[0x29]	3848	1			T10	1		T104	1		T106	4
valid_sources[0x2a]	4446	1			T10	4		T103	1		T104	1
valid_sources[0x2b]	3675	1			T103	2		T106	1		T14	105
valid_sources[0x2c]	4148	1			T10	1		T12	1		T103	2
valid_sources[0x2d]	4359	1			T10	3		T104	1		T105	3
valid_sources[0x2e]	4082	1			T10	2		T103	4		T104	1
valid_sources[0x2f]	4133	1			T10	3		T105	2		T106	3
valid_sources[0x30]	3888	1			T3	4		T10	3		T123	4
valid_sources[0x31]	6074	1			T7	1		T103	3		T104	2
valid_sources[0x32]	3506	1			T10	1		T103	2		T104	5
valid_sources[0x33]	5352	1			T10	2		T103	1		T105	2
valid_sources[0x34]	4822	1			T105	2		T106	4		T122	1
valid_sources[0x35]	5552	1			T4	4		T10	1		T12	1
valid_sources[0x36]	4290	1			T104	2		T105	2		T106	1
valid_sources[0x37]	4230	1			T10	3		T12	1		T103	1
valid_sources[0x38]	5077	1			T10	1		T105	2		T106	4
valid_sources[0x39]	4521	1			T3	6		T7	1		T104	2
valid_sources[0x3a]	4768	1			T10	1		T104	3		T105	2
valid_sources[0x3b]	4105	1			T104	1		T105	1		T106	1
valid_sources[0x3c]	3826	1			T10	1		T12	1		T103	2
valid_sources[0x3d]	3638	1			T3	5		T10	1		T21	10
valid_sources[0x3e]	4677	1			T10	2		T104	1		T105	1
valid_sources[0x3f]	4841	1			T4	1		T12	1		T103	1
valid_sources[0x40]	4355	1			T103	7		T105	1		T122	1
valid_sources[0x41]	3903	1			T104	1		T105	1		T106	1
valid_sources[0x42]	4697	1			T10	2		T12	1		T103	1
valid_sources[0x43]	4384	1			T10	1		T22	1		T103	1
valid_sources[0x44]	3740	1			T10	1		T21	28		T12	1
valid_sources[0x45]	5652	1			T105	1		T122	2		T123	7
valid_sources[0x46]	3583	1			T10	1		T104	1		T106	7
valid_sources[0x47]	4588	1			T10	2		T21	7		T104	2
valid_sources[0x48]	4001	1			T10	4		T21	15		T103	3
valid_sources[0x49]	4788	1			T12	1		T103	1		T105	1
valid_sources[0x4a]	4639	1			T7	1		T10	3		T21	6
valid_sources[0x4b]	3629	1			T10	1		T103	1		T104	3
valid_sources[0x4c]	4699	1			T8	2		T10	1		T20	10
valid_sources[0x4d]	3999	1			T10	2		T103	1		T106	1
valid_sources[0x4e]	3941	1			T21	3		T106	1		T19	4
valid_sources[0x4f]	4041	1			T10	3		T103	2		T105	1
valid_sources[0x50]	6198	1			T10	2		T103	1		T105	4
valid_sources[0x51]	3801	1			T4	2		T7	2		T105	3
valid_sources[0x52]	4897	1			T3	4		T104	2		T105	2
valid_sources[0x53]	4126	1			T4	6		T10	1		T103	2
valid_sources[0x54]	4532	1			T10	1		T103	1		T105	2
valid_sources[0x55]	3901	1			T103	4		T104	2		T105	3
valid_sources[0x56]	3854	1			T12	1		T104	2		T105	2
valid_sources[0x57]	5564	1			T10	1		T105	1		T123	6
valid_sources[0x58]	4332	1			T103	3		T105	2		T37	23
valid_sources[0x59]	4488	1			T3	1		T10	3		T104	1
valid_sources[0x5a]	3851	1			T10	1		T105	3		T122	3
valid_sources[0x5b]	4050	1			T10	3		T104	1		T105	3
valid_sources[0x5c]	4644	1			T104	1		T105	1		T122	1
valid_sources[0x5d]	4885	1			T103	4		T104	3		T105	1
valid_sources[0x5e]	4367	1			T10	1		T103	3		T104	1
valid_sources[0x5f]	3956	1			T10	3		T12	1		T104	2
valid_sources[0x60]	5570	1			T10	2		T103	1		T105	2
valid_sources[0x61]	3475	1			T103	2		T105	1		T106	1
valid_sources[0x62]	5020	1			T10	1		T20	28		T103	2
valid_sources[0x63]	4394	1			T3	4		T10	1		T12	2
valid_sources[0x64]	3277	1			T103	1		T122	4		T35	1
valid_sources[0x65]	5338	1			T10	2		T12	1		T105	1
valid_sources[0x66]	3957	1			T103	1		T106	1		T122	1
valid_sources[0x67]	5496	1			T3	2		T104	3		T35	1
valid_sources[0x68]	6041	1			T10	2		T104	1		T35	1
valid_sources[0x69]	4626	1			T10	2		T104	2		T105	2
valid_sources[0x6a]	4085	1			T10	6		T104	1		T105	1
valid_sources[0x6b]	3904	1			T103	1		T104	1		T122	1
valid_sources[0x6c]	5297	1			T3	8		T10	1		T103	3
valid_sources[0x6d]	5291	1			T10	1		T20	60		T103	1
valid_sources[0x6e]	4434	1			T10	1		T103	1		T104	1
valid_sources[0x6f]	4404	1			T10	1		T21	11		T103	2
valid_sources[0x70]	4108	1			T10	1		T12	1		T13	22
valid_sources[0x71]	5025	1			T7	1		T12	1		T104	1
valid_sources[0x72]	4804	1			T7	1		T10	3		T103	1
valid_sources[0x73]	3974	1			T3	1		T10	1		T103	6
valid_sources[0x74]	3403	1			T10	1		T12	3		T104	2
valid_sources[0x75]	4115	1			T4	4		T10	2		T103	2
valid_sources[0x76]	4315	1			T10	2		T105	3		T106	1
valid_sources[0x77]	4576	1			T10	1		T104	2		T105	2
valid_sources[0x78]	3441	1			T10	3		T103	2		T104	1
valid_sources[0x79]	4991	1			T12	1		T103	1		T123	1
valid_sources[0x7a]	4155	1			T4	3		T104	1		T105	1
valid_sources[0x7b]	4488	1			T10	1		T103	2		T106	3
valid_sources[0x7c]	4302	1			T8	17		T10	2		T103	2
valid_sources[0x7d]	4831	1			T103	1		T104	2		T105	1
valid_sources[0x7e]	4829	1			T10	1		T103	3		T104	1
valid_sources[0x7f]	5133	1			T10	2		T12	1		T104	1
valid_sources[0x80]	3997	1			T3	4		T4	10		T104	2

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

277930

1

T1

6

T2

3

T3

7

values[0x0]

all_enables

biggest_size

412929

1

T14

27809

T15

15051

T16

62575

values[0x1]

all_enables

biggest_size

412907

1

T14

28064

T15

15089

T16

62280

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	81955	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

845121

1

T1

15

T2

7

T3

19

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	230297	1			T1	32		T2	21		T3	32
values[0x0]	323022	1			T5	6		T11	4		T26	9
values[0x1]	373757	1			T5	3		T11	4		T26	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36974	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

890102

1

T1

19

T2

8

T3

23

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	3255	1			T23	2		T14	276		T15	21
valid_sources[0x01]	3125	1			T68	1		T14	209		T15	113
valid_sources[0x02]	3164	1			T14	236		T15	87		T16	597
valid_sources[0x03]	3577	1			T14	222		T15	135		T86	2
valid_sources[0x04]	3880	1			T7	16		T69	1		T32	4
valid_sources[0x05]	3274	1			T26	17		T45	1		T14	227
valid_sources[0x06]	3552	1			T19	1		T23	1		T14	236
valid_sources[0x07]	3730	1			T14	218		T15	92		T86	1
valid_sources[0x08]	3733	1			T68	1		T14	226		T15	9
valid_sources[0x09]	3599	1			T70	1		T14	259		T15	64
valid_sources[0x0a]	3552	1			T35	1		T14	253		T15	147
valid_sources[0x0b]	3608	1			T8	1		T71	1		T35	3
valid_sources[0x0c]	3656	1			T37	1		T14	253		T15	178
valid_sources[0x0d]	3264	1			T14	245		T15	16		T124	1
valid_sources[0x0e]	3790	1			T37	1		T14	222		T15	68
valid_sources[0x0f]	4454	1			T74	1		T32	5		T14	208
valid_sources[0x10]	3215	1			T74	1		T35	2		T37	1
valid_sources[0x11]	3412	1			T22	6		T14	271		T15	136
valid_sources[0x12]	3815	1			T19	2		T37	3		T14	218
valid_sources[0x13]	3216	1			T14	254		T15	12		T16	545
valid_sources[0x14]	3466	1			T71	2		T32	2		T14	270
valid_sources[0x15]	3206	1			T85	48		T41	1		T14	236
valid_sources[0x16]	3560	1			T37	1		T14	220		T15	105
valid_sources[0x17]	3283	1			T32	2		T14	215		T15	116
valid_sources[0x18]	4125	1			T70	1		T71	1		T74	2
valid_sources[0x19]	3960	1			T8	1		T14	238		T15	485
valid_sources[0x1a]	3417	1			T14	257		T15	4		T124	1
valid_sources[0x1b]	3588	1			T8	1		T14	235		T15	38
valid_sources[0x1c]	3356	1			T14	250		T15	149		T125	1
valid_sources[0x1d]	3604	1			T14	290		T15	220		T124	1
valid_sources[0x1e]	3438	1			T35	2		T14	245		T15	11
valid_sources[0x1f]	3406	1			T14	256		T15	89		T126	1
valid_sources[0x20]	3043	1			T31	1		T14	293		T15	48
valid_sources[0x21]	3626	1			T127	8		T14	243		T15	328
valid_sources[0x22]	3218	1			T3	12		T14	232		T15	141
valid_sources[0x23]	4041	1			T68	1		T13	4		T37	1
valid_sources[0x24]	3503	1			T14	246		T15	6		T16	504
valid_sources[0x25]	3208	1			T40	1		T14	225		T15	30
valid_sources[0x26]	3361	1			T14	202		T15	52		T16	518
valid_sources[0x27]	3645	1			T19	1		T14	262		T15	292
valid_sources[0x28]	4086	1			T14	274		T15	298		T86	1
valid_sources[0x29]	3750	1			T14	287		T60	2		T15	22
valid_sources[0x2a]	3461	1			T14	270		T56	1		T15	40
valid_sources[0x2b]	3930	1			T32	1		T14	211		T15	304
valid_sources[0x2c]	3531	1			T41	1		T14	247		T15	106
valid_sources[0x2d]	3649	1			T14	304		T15	27		T16	550
valid_sources[0x2e]	3419	1			T71	1		T19	2		T74	1
valid_sources[0x2f]	3231	1			T37	1		T14	234		T15	46
valid_sources[0x30]	3863	1			T32	2		T14	256		T60	4
valid_sources[0x31]	3546	1			T35	4		T14	223		T15	11
valid_sources[0x32]	3147	1			T13	3		T23	1		T14	245
valid_sources[0x33]	4699	1			T71	1		T35	3		T14	271
valid_sources[0x34]	4599	1			T14	221		T15	544		T16	626
valid_sources[0x35]	3666	1			T12	3		T42	15		T14	226
valid_sources[0x36]	3896	1			T14	224		T15	130		T86	1
valid_sources[0x37]	3758	1			T8	1		T12	1		T71	1
valid_sources[0x38]	3679	1			T35	2		T128	1		T14	228
valid_sources[0x39]	4079	1			T70	1		T14	266		T60	2
valid_sources[0x3a]	3475	1			T71	1		T14	257		T55	1
valid_sources[0x3b]	3845	1			T14	218		T15	686		T86	1
valid_sources[0x3c]	3335	1			T14	299		T15	84		T16	528
valid_sources[0x3d]	3673	1			T14	226		T15	69		T16	555
valid_sources[0x3e]	4086	1			T37	2		T14	242		T15	8
valid_sources[0x3f]	3527	1			T23	1		T14	210		T56	1
valid_sources[0x40]	3440	1			T41	1		T14	240		T15	189
valid_sources[0x41]	3676	1			T14	268		T56	1		T15	151
valid_sources[0x42]	4002	1			T14	228		T15	304		T125	1
valid_sources[0x43]	3021	1			T34	1		T35	5		T14	249
valid_sources[0x44]	3745	1			T12	1		T35	1		T14	234
valid_sources[0x45]	3686	1			T14	251		T15	25		T16	588
valid_sources[0x46]	4378	1			T39	32		T14	222		T15	163
valid_sources[0x47]	3589	1			T23	1		T41	1		T14	229
valid_sources[0x48]	3452	1			T14	223		T15	174		T86	2
valid_sources[0x49]	3371	1			T71	1		T14	241		T15	152
valid_sources[0x4a]	3061	1			T14	222		T15	13		T16	578
valid_sources[0x4b]	3426	1			T46	1		T14	233		T15	74
valid_sources[0x4c]	3836	1			T68	2		T71	1		T23	1
valid_sources[0x4d]	3734	1			T35	2		T14	261		T15	53
valid_sources[0x4e]	3383	1			T14	257		T56	2		T15	6
valid_sources[0x4f]	4116	1			T14	247		T15	279		T16	568
valid_sources[0x50]	3575	1			T13	5		T14	220		T15	559
valid_sources[0x51]	3568	1			T8	1		T14	244		T15	13
valid_sources[0x52]	3207	1			T14	237		T15	25		T16	539
valid_sources[0x53]	3675	1			T35	6		T14	237		T15	13
valid_sources[0x54]	3862	1			T37	2		T14	270		T55	1
valid_sources[0x55]	4084	1			T41	1		T14	212		T15	4
valid_sources[0x56]	3274	1			T36	1		T14	239		T15	2
valid_sources[0x57]	3514	1			T32	2		T14	213		T15	152
valid_sources[0x58]	3450	1			T37	7		T14	217		T56	1
valid_sources[0x59]	3156	1			T14	248		T15	6		T129	1
valid_sources[0x5a]	3574	1			T37	3		T41	2		T14	239
valid_sources[0x5b]	3740	1			T74	1		T14	256		T15	343
valid_sources[0x5c]	3422	1			T14	261		T15	17		T16	507
valid_sources[0x5d]	3683	1			T14	207		T15	154		T16	505
valid_sources[0x5e]	3332	1			T14	225		T15	164		T86	1
valid_sources[0x5f]	3658	1			T68	1		T14	216		T60	1
valid_sources[0x60]	3888	1			T9	1		T74	1		T40	10
valid_sources[0x61]	3488	1			T71	2		T40	2		T14	230
valid_sources[0x62]	3243	1			T35	1		T14	251		T15	129
valid_sources[0x63]	3260	1			T14	218		T15	20		T125	1
valid_sources[0x64]	3649	1			T130	1		T14	245		T15	132
valid_sources[0x65]	3249	1			T12	2		T19	2		T23	1
valid_sources[0x66]	3693	1			T70	1		T14	261		T15	257
valid_sources[0x67]	3558	1			T74	1		T14	282		T15	329
valid_sources[0x68]	3812	1			T12	2		T22	1		T127	1
valid_sources[0x69]	3992	1			T71	1		T14	227		T15	410
valid_sources[0x6a]	4610	1			T68	1		T14	290		T15	314
valid_sources[0x6b]	3515	1			T23	5		T14	258		T56	2
valid_sources[0x6c]	3493	1			T3	11		T35	3		T37	1
valid_sources[0x6d]	3539	1			T14	258		T15	17		T16	522
valid_sources[0x6e]	3524	1			T3	9		T41	2		T14	239
valid_sources[0x6f]	3415	1			T14	267		T15	8		T16	491
valid_sources[0x70]	3445	1			T8	1		T70	3		T14	246
valid_sources[0x71]	3950	1			T14	237		T15	200		T16	552
valid_sources[0x72]	3562	1			T13	1		T41	2		T14	231
valid_sources[0x73]	3480	1			T70	1		T14	251		T15	135
valid_sources[0x74]	3856	1			T19	2		T40	5		T35	2
valid_sources[0x75]	3284	1			T14	251		T15	155		T86	1
valid_sources[0x76]	3692	1			T68	1		T35	1		T14	264
valid_sources[0x77]	3600	1			T14	284		T15	79		T86	2
valid_sources[0x78]	3675	1			T14	227		T15	157		T86	2
valid_sources[0x79]	3550	1			T12	4		T41	1		T14	253
valid_sources[0x7a]	3423	1			T14	280		T56	2		T15	75
valid_sources[0x7b]	3867	1			T8	1		T74	1		T14	217
valid_sources[0x7c]	3572	1			T14	280		T15	123		T16	486
valid_sources[0x7d]	3773	1			T70	1		T32	3		T14	242
valid_sources[0x7e]	3646	1			T14	256		T15	302		T16	623
valid_sources[0x7f]	3834	1			T127	9		T14	228		T15	342
valid_sources[0x80]	3338	1			T14	267		T15	39		T16	529

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

212549

1

T1

15

T2

7

T3

19

values[0x0]

all_enables

biggest_size

316294

1

T5

4

T11

1

T26

2

values[0x1]

all_enables

biggest_size

316278

1

T5

1

T26

1

T68

4