Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	31289	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

272408

1

T1

15

T3

8

T7

10587

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	96138	1			T1	15		T3	88		T7	3109
values[0x0]	101897	1			T7	3941		T9	2216		T11	2641
values[0x1]	105662	1			T7	4125		T9	2271		T11	2751

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14763	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

288934

1

T1

15

T3

46

T7

10878

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1270	1			T3	1		T7	56		T9	28
valid_sources[0x01]	940	1			T7	17		T9	24		T11	12
valid_sources[0x02]	1562	1			T3	3		T7	37		T9	38
valid_sources[0x03]	1182	1			T7	25		T9	23		T13	1
valid_sources[0x04]	1113	1			T7	43		T9	35		T11	13
valid_sources[0x05]	1080	1			T3	1		T7	34		T9	23
valid_sources[0x06]	1247	1			T3	1		T7	48		T9	19
valid_sources[0x07]	1140	1			T7	33		T9	17		T13	1
valid_sources[0x08]	1137	1			T7	40		T9	40		T13	1
valid_sources[0x09]	1605	1			T7	45		T9	17		T13	1
valid_sources[0x0a]	1375	1			T7	58		T9	20		T11	31
valid_sources[0x0b]	1361	1			T7	44		T9	34		T11	43
valid_sources[0x0c]	1037	1			T3	1		T7	29		T9	21
valid_sources[0x0d]	1628	1			T7	68		T9	16		T11	39
valid_sources[0x0e]	1103	1			T7	42		T9	22		T11	39
valid_sources[0x0f]	1240	1			T7	46		T9	23		T11	59
valid_sources[0x10]	1207	1			T3	1		T7	47		T9	34
valid_sources[0x11]	1186	1			T3	2		T7	48		T9	24
valid_sources[0x12]	2212	1			T7	19		T9	32		T11	40
valid_sources[0x13]	1056	1			T3	2		T7	55		T9	23
valid_sources[0x14]	1120	1			T3	1		T7	35		T9	36
valid_sources[0x15]	1104	1			T7	45		T9	30		T11	10
valid_sources[0x16]	1017	1			T3	1		T7	26		T9	30
valid_sources[0x17]	1052	1			T7	35		T9	23		T11	11
valid_sources[0x18]	1111	1			T7	56		T9	22		T13	1
valid_sources[0x19]	1135	1			T7	34		T9	29		T11	15
valid_sources[0x1a]	1088	1			T7	46		T9	24		T13	1
valid_sources[0x1b]	1124	1			T3	1		T7	46		T9	22
valid_sources[0x1c]	1284	1			T7	54		T9	26		T11	33
valid_sources[0x1d]	987	1			T7	34		T9	34		T13	1
valid_sources[0x1e]	1163	1			T3	1		T7	59		T9	35
valid_sources[0x1f]	1202	1			T7	53		T9	35		T11	50
valid_sources[0x20]	1229	1			T7	77		T9	24		T11	16
valid_sources[0x21]	1051	1			T7	59		T9	9		T11	33
valid_sources[0x22]	1151	1			T7	43		T9	23		T13	1
valid_sources[0x23]	1172	1			T7	39		T9	30		T11	14
valid_sources[0x24]	1011	1			T7	39		T9	17		T11	19
valid_sources[0x25]	1249	1			T7	46		T9	26		T13	2
valid_sources[0x26]	1341	1			T7	62		T9	32		T11	24
valid_sources[0x27]	1232	1			T7	54		T9	26		T11	12
valid_sources[0x28]	1254	1			T3	2		T7	71		T9	22
valid_sources[0x29]	1090	1			T3	1		T7	44		T9	27
valid_sources[0x2a]	1052	1			T7	28		T9	29		T11	38
valid_sources[0x2b]	1072	1			T3	1		T7	62		T9	22
valid_sources[0x2c]	1032	1			T7	45		T9	19		T11	24
valid_sources[0x2d]	1118	1			T7	31		T9	26		T11	40
valid_sources[0x2e]	1113	1			T7	41		T9	21		T11	49
valid_sources[0x2f]	1240	1			T7	48		T9	26		T11	29
valid_sources[0x30]	1105	1			T7	61		T9	20		T11	29
valid_sources[0x31]	1068	1			T3	1		T7	45		T9	28
valid_sources[0x32]	1016	1			T7	33		T9	21		T11	11
valid_sources[0x33]	1400	1			T7	44		T9	22		T11	2
valid_sources[0x34]	1197	1			T7	49		T9	19		T11	13
valid_sources[0x35]	1119	1			T7	41		T9	22		T13	1
valid_sources[0x36]	1110	1			T3	2		T7	40		T9	17
valid_sources[0x37]	1439	1			T7	44		T9	30		T11	29
valid_sources[0x38]	1199	1			T7	47		T9	34		T11	27
valid_sources[0x39]	1141	1			T7	56		T9	28		T11	49
valid_sources[0x3a]	1004	1			T7	40		T9	25		T13	1
valid_sources[0x3b]	1051	1			T7	33		T9	18		T11	35
valid_sources[0x3c]	1113	1			T7	57		T9	24		T11	28
valid_sources[0x3d]	1252	1			T3	1		T7	42		T9	33
valid_sources[0x3e]	1248	1			T7	51		T9	28		T11	17
valid_sources[0x3f]	1084	1			T7	51		T9	33		T13	1
valid_sources[0x40]	1023	1			T7	33		T9	23		T11	30
valid_sources[0x41]	1100	1			T7	42		T9	29		T11	7
valid_sources[0x42]	1084	1			T7	42		T9	22		T13	1
valid_sources[0x43]	1636	1			T7	57		T9	30		T13	1
valid_sources[0x44]	1358	1			T7	65		T9	22		T11	21
valid_sources[0x45]	1311	1			T7	41		T9	33		T11	27
valid_sources[0x46]	1145	1			T7	76		T9	20		T11	46
valid_sources[0x47]	1072	1			T7	52		T9	29		T11	36
valid_sources[0x48]	1176	1			T7	38		T9	13		T11	25
valid_sources[0x49]	1165	1			T3	1		T7	37		T9	26
valid_sources[0x4a]	1965	1			T7	45		T9	28		T11	38
valid_sources[0x4b]	1131	1			T3	1		T7	34		T9	27
valid_sources[0x4c]	933	1			T7	32		T9	22		T11	22
valid_sources[0x4d]	1305	1			T3	1		T7	44		T9	31
valid_sources[0x4e]	1173	1			T7	44		T9	19		T11	26
valid_sources[0x4f]	1965	1			T7	52		T9	23		T11	26
valid_sources[0x50]	1032	1			T7	63		T9	24		T11	46
valid_sources[0x51]	1247	1			T7	21		T9	18		T11	39
valid_sources[0x52]	1069	1			T3	1		T7	45		T9	23
valid_sources[0x53]	1003	1			T7	28		T9	26		T11	27
valid_sources[0x54]	1136	1			T7	22		T9	25		T11	17
valid_sources[0x55]	1108	1			T3	2		T7	27		T9	27
valid_sources[0x56]	1002	1			T7	48		T9	14		T11	42
valid_sources[0x57]	1099	1			T7	44		T9	23		T13	1
valid_sources[0x58]	1116	1			T7	39		T9	23		T11	28
valid_sources[0x59]	1454	1			T7	48		T9	25		T11	54
valid_sources[0x5a]	1091	1			T3	1		T7	14		T9	28
valid_sources[0x5b]	1179	1			T7	40		T9	32		T11	48
valid_sources[0x5c]	1041	1			T7	57		T9	23		T11	17
valid_sources[0x5d]	1142	1			T7	30		T9	27		T11	68
valid_sources[0x5e]	1176	1			T3	3		T7	98		T9	21
valid_sources[0x5f]	1174	1			T3	1		T7	79		T9	17
valid_sources[0x60]	1471	1			T7	30		T9	25		T11	16
valid_sources[0x61]	1175	1			T7	67		T9	30		T13	2
valid_sources[0x62]	1093	1			T7	47		T9	27		T13	2
valid_sources[0x63]	1009	1			T7	42		T9	19		T11	40
valid_sources[0x64]	1153	1			T7	40		T9	24		T11	34
valid_sources[0x65]	1469	1			T7	29		T9	28		T11	10
valid_sources[0x66]	1156	1			T7	40		T9	18		T11	54
valid_sources[0x67]	1188	1			T7	35		T9	35		T11	48
valid_sources[0x68]	1013	1			T3	1		T7	63		T9	24
valid_sources[0x69]	1085	1			T7	51		T9	26		T11	33
valid_sources[0x6a]	1117	1			T3	1		T7	35		T9	21
valid_sources[0x6b]	1236	1			T7	54		T9	20		T11	34
valid_sources[0x6c]	1061	1			T3	1		T7	40		T9	16
valid_sources[0x6d]	1118	1			T7	46		T9	24		T11	47
valid_sources[0x6e]	1053	1			T7	42		T9	22		T11	14
valid_sources[0x6f]	1107	1			T7	44		T9	20		T11	34
valid_sources[0x70]	1021	1			T7	35		T9	35		T10	1
valid_sources[0x71]	1087	1			T7	40		T9	22		T11	19
valid_sources[0x72]	1405	1			T3	1		T7	36		T9	28
valid_sources[0x73]	1156	1			T3	1		T7	66		T9	26
valid_sources[0x74]	1094	1			T7	41		T9	21		T13	2
valid_sources[0x75]	1056	1			T3	1		T7	34		T9	30
valid_sources[0x76]	1777	1			T7	51		T9	21		T11	29
valid_sources[0x77]	1096	1			T3	1		T7	33		T9	31
valid_sources[0x78]	1114	1			T7	26		T9	18		T11	37
valid_sources[0x79]	1104	1			T7	49		T9	24		T11	33
valid_sources[0x7a]	1601	1			T3	1		T7	22		T9	24
valid_sources[0x7b]	1310	1			T7	80		T9	17		T11	38
valid_sources[0x7c]	1181	1			T7	50		T8	17		T9	30
valid_sources[0x7d]	1236	1			T3	1		T7	23		T9	29
valid_sources[0x7e]	994	1			T7	32		T9	32		T11	30
valid_sources[0x7f]	1118	1			T3	1		T7	36		T9	22
valid_sources[0x80]	1467	1			T7	41		T9	26		T11	23

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

70150

1

T1

15

T3

8

T7

2741

values[0x0]

all_enables

biggest_size

100993

1

T7

3907

T9

2199

T11

2610

values[0x1]

all_enables

biggest_size

101265

1

T7

3939

T9

2187

T11

2640

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28438	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

246483

1

T1

13

T3

19

T4

7

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	74248	1			T1	25		T2	1		T3	48
values[0x0]	93478	1			T6	2		T7	3288		T9	2487
values[0x1]	107195	1			T6	2		T7	3789		T9	2871

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	15232	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

259689

1

T1

14

T2

1

T3

21

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	1223	1			T7	40		T9	40		T14	32
valid_sources[0x01]	783	1			T7	48		T9	34		T11	2
valid_sources[0x02]	843	1			T7	23		T9	27		T11	3
valid_sources[0x03]	1276	1			T7	39		T9	46		T11	7
valid_sources[0x04]	967	1			T7	48		T9	21		T14	2
valid_sources[0x05]	750	1			T4	1		T7	48		T9	34
valid_sources[0x06]	1149	1			T7	26		T9	34		T14	20
valid_sources[0x07]	1232	1			T7	47		T9	38		T11	6
valid_sources[0x08]	941	1			T7	43		T9	36		T11	1
valid_sources[0x09]	861	1			T7	36		T9	25		T11	134
valid_sources[0x0a]	1488	1			T7	44		T9	38		T11	115
valid_sources[0x0b]	1561	1			T7	38		T9	16		T11	191
valid_sources[0x0c]	1089	1			T7	23		T9	24		T11	119
valid_sources[0x0d]	991	1			T7	38		T9	23		T11	2
valid_sources[0x0e]	1301	1			T7	37		T9	28		T14	20
valid_sources[0x0f]	1218	1			T7	30		T9	33		T14	28
valid_sources[0x10]	1035	1			T7	22		T9	21		T14	3
valid_sources[0x11]	906	1			T7	39		T9	27		T11	3
valid_sources[0x12]	1427	1			T7	35		T9	28		T14	43
valid_sources[0x13]	1376	1			T3	1		T7	33		T9	32
valid_sources[0x14]	1083	1			T7	35		T9	35		T11	3
valid_sources[0x15]	1125	1			T2	1		T7	36		T9	28
valid_sources[0x16]	1242	1			T3	4		T7	29		T9	23
valid_sources[0x17]	1295	1			T6	1		T7	29		T9	37
valid_sources[0x18]	879	1			T7	38		T9	24		T11	15
valid_sources[0x19]	1096	1			T7	41		T9	35		T11	154
valid_sources[0x1a]	1042	1			T7	65		T9	28		T11	2
valid_sources[0x1b]	1016	1			T7	34		T9	28		T11	91
valid_sources[0x1c]	1115	1			T7	45		T9	22		T11	2
valid_sources[0x1d]	1151	1			T7	33		T9	37		T11	124
valid_sources[0x1e]	1006	1			T7	41		T9	22		T11	2
valid_sources[0x1f]	996	1			T7	40		T9	28		T11	2
valid_sources[0x20]	1158	1			T7	36		T9	37		T11	1
valid_sources[0x21]	995	1			T7	39		T9	37		T14	66
valid_sources[0x22]	1165	1			T3	1		T7	35		T9	28
valid_sources[0x23]	1107	1			T4	2		T7	35		T9	31
valid_sources[0x24]	1452	1			T7	29		T9	22		T11	161
valid_sources[0x25]	1708	1			T7	37		T9	26		T11	181
valid_sources[0x26]	957	1			T7	41		T9	27		T11	2
valid_sources[0x27]	1180	1			T7	30		T9	25		T11	113
valid_sources[0x28]	1303	1			T7	39		T9	38		T11	2
valid_sources[0x29]	841	1			T7	34		T9	17		T11	1
valid_sources[0x2a]	965	1			T3	5		T7	50		T9	40
valid_sources[0x2b]	1069	1			T7	31		T9	24		T14	10
valid_sources[0x2c]	986	1			T7	31		T9	27		T11	2
valid_sources[0x2d]	906	1			T3	2		T7	35		T9	36
valid_sources[0x2e]	1026	1			T7	30		T9	31		T11	1
valid_sources[0x2f]	790	1			T7	31		T9	20		T11	3
valid_sources[0x30]	861	1			T4	3		T7	45		T9	23
valid_sources[0x31]	795	1			T4	1		T7	41		T9	21
valid_sources[0x32]	1306	1			T4	1		T7	34		T9	33
valid_sources[0x33]	995	1			T7	30		T9	27		T11	6
valid_sources[0x34]	974	1			T7	49		T9	30		T11	187
valid_sources[0x35]	1093	1			T7	24		T9	30		T11	62
valid_sources[0x36]	1651	1			T1	7		T7	52		T9	18
valid_sources[0x37]	836	1			T7	33		T9	37		T14	21
valid_sources[0x38]	855	1			T7	44		T9	15		T11	1
valid_sources[0x39]	1202	1			T3	2		T7	40		T9	21
valid_sources[0x3a]	1198	1			T7	36		T9	21		T11	53
valid_sources[0x3b]	1222	1			T3	1		T7	38		T9	25
valid_sources[0x3c]	769	1			T7	38		T9	26		T11	1
valid_sources[0x3d]	886	1			T7	30		T9	28		T11	6
valid_sources[0x3e]	1401	1			T7	35		T9	32		T14	38
valid_sources[0x3f]	978	1			T7	22		T9	24		T11	18
valid_sources[0x40]	1104	1			T3	1		T7	30		T9	27
valid_sources[0x41]	1036	1			T7	47		T9	22		T14	18
valid_sources[0x42]	1195	1			T7	37		T8	1		T9	25
valid_sources[0x43]	841	1			T7	26		T9	31		T11	1
valid_sources[0x44]	1198	1			T7	25		T9	28		T11	3
valid_sources[0x45]	923	1			T7	33		T9	31		T14	52
valid_sources[0x46]	934	1			T4	1		T7	44		T9	29
valid_sources[0x47]	951	1			T7	40		T9	32		T11	2
valid_sources[0x48]	1152	1			T7	27		T9	27		T11	1
valid_sources[0x49]	1189	1			T7	28		T9	25		T14	36
valid_sources[0x4a]	903	1			T7	31		T9	24		T11	2
valid_sources[0x4b]	796	1			T7	40		T9	23		T11	2
valid_sources[0x4c]	857	1			T7	42		T9	29		T11	3
valid_sources[0x4d]	871	1			T7	29		T9	32		T11	1
valid_sources[0x4e]	1225	1			T3	1		T7	45		T9	22
valid_sources[0x4f]	1003	1			T7	50		T9	26		T11	1
valid_sources[0x50]	783	1			T3	2		T7	23		T9	20
valid_sources[0x51]	881	1			T7	49		T9	35		T11	40
valid_sources[0x52]	1165	1			T7	37		T9	26		T11	187
valid_sources[0x53]	1235	1			T7	36		T9	25		T17	1
valid_sources[0x54]	1446	1			T7	33		T9	23		T11	2
valid_sources[0x55]	1317	1			T7	44		T9	27		T14	14
valid_sources[0x56]	1195	1			T7	33		T9	23		T13	32
valid_sources[0x57]	807	1			T7	27		T9	27		T14	22
valid_sources[0x58]	1336	1			T7	37		T9	36		T11	418
valid_sources[0x59]	1127	1			T7	26		T9	33		T11	202
valid_sources[0x5a]	919	1			T7	25		T9	39		T11	5
valid_sources[0x5b]	998	1			T7	34		T9	19		T11	2
valid_sources[0x5c]	1044	1			T7	37		T9	28		T11	2
valid_sources[0x5d]	1446	1			T7	37		T9	29		T11	99
valid_sources[0x5e]	953	1			T7	49		T8	1		T9	19
valid_sources[0x5f]	995	1			T7	46		T9	24		T11	2
valid_sources[0x60]	943	1			T7	22		T9	21		T11	1
valid_sources[0x61]	708	1			T7	37		T9	32		T11	18
valid_sources[0x62]	814	1			T7	47		T9	39		T14	28
valid_sources[0x63]	1234	1			T7	46		T9	32		T11	3
valid_sources[0x64]	1278	1			T7	30		T9	25		T11	1
valid_sources[0x65]	1046	1			T7	25		T9	21		T11	5
valid_sources[0x66]	1249	1			T7	48		T8	13		T9	34
valid_sources[0x67]	1182	1			T7	46		T9	35		T14	54
valid_sources[0x68]	1090	1			T7	41		T9	22		T16	3
valid_sources[0x69]	1426	1			T7	41		T9	24		T11	1
valid_sources[0x6a]	1108	1			T7	37		T9	43		T14	25
valid_sources[0x6b]	1100	1			T7	41		T9	26		T11	3
valid_sources[0x6c]	1102	1			T3	2		T7	29		T9	18
valid_sources[0x6d]	817	1			T7	36		T9	31		T14	64
valid_sources[0x6e]	908	1			T7	45		T9	33		T11	2
valid_sources[0x6f]	1251	1			T7	22		T9	38		T11	145
valid_sources[0x70]	817	1			T7	38		T9	26		T11	1
valid_sources[0x71]	1525	1			T7	46		T9	33		T11	1
valid_sources[0x72]	1100	1			T7	49		T9	36		T14	33
valid_sources[0x73]	830	1			T7	35		T9	28		T11	5
valid_sources[0x74]	1438	1			T3	1		T7	44		T9	36
valid_sources[0x75]	1450	1			T7	55		T9	26		T11	3
valid_sources[0x76]	919	1			T7	31		T9	30		T11	6
valid_sources[0x77]	933	1			T7	25		T9	26		T11	1
valid_sources[0x78]	1177	1			T7	37		T9	24		T23	1
valid_sources[0x79]	1301	1			T3	1		T7	47		T9	32
valid_sources[0x7a]	1110	1			T7	29		T9	32		T11	8
valid_sources[0x7b]	885	1			T7	26		T9	22		T11	9
valid_sources[0x7c]	965	1			T7	46		T9	33		T14	7
valid_sources[0x7d]	876	1			T7	47		T9	29		T11	19
valid_sources[0x7e]	1001	1			T7	43		T9	32		T11	2
valid_sources[0x7f]	1139	1			T7	30		T9	29		T14	5
valid_sources[0x80]	910	1			T3	2		T7	40		T9	27

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

63551

1

T1

13

T3

19

T4

7

values[0x0]

all_enables

biggest_size

91201

1

T6

1

T7

3234

T9

2456

values[0x1]

all_enables

biggest_size

91731

1

T7

3344

T9

2469

T11

1936