Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rom_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 34764 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 326590 1 T1 3886 T2 6 T5 6



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 112215 1 T1 1446 T2 6 T5 6
values[0x0] 122359 1 T1 1415 T7 6046 T11 1729
values[0x1] 126780 1 T1 1558 T7 6267 T11 1763



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 16360 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 344994 1 T1 4176 T2 6 T5 6



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1200 1 T1 11 T7 68 T11 29
valid_sources[0x01] 1340 1 T1 18 T7 66 T11 18
valid_sources[0x02] 1411 1 T1 15 T7 65 T11 18
valid_sources[0x03] 1196 1 T1 18 T7 67 T11 21
valid_sources[0x04] 1603 1 T1 19 T7 70 T11 21
valid_sources[0x05] 1325 1 T1 7 T7 81 T11 19
valid_sources[0x06] 1318 1 T1 9 T7 65 T11 14
valid_sources[0x07] 1446 1 T1 41 T7 62 T11 17
valid_sources[0x08] 1180 1 T1 1 T7 68 T11 16
valid_sources[0x09] 1173 1 T1 10 T7 68 T11 13
valid_sources[0x0a] 1241 1 T1 23 T7 72 T11 15
valid_sources[0x0b] 1452 1 T1 21 T7 52 T11 24
valid_sources[0x0c] 1505 1 T1 12 T7 63 T11 17
valid_sources[0x0d] 1257 1 T1 25 T7 78 T11 13
valid_sources[0x0e] 1714 1 T1 23 T7 56 T8 4
valid_sources[0x0f] 1322 1 T1 3 T7 69 T11 9
valid_sources[0x10] 1153 1 T1 15 T7 47 T11 14
valid_sources[0x11] 2200 1 T1 14 T7 55 T11 16
valid_sources[0x12] 1386 1 T1 27 T7 63 T11 23
valid_sources[0x13] 1230 1 T1 4 T7 67 T11 15
valid_sources[0x14] 1557 1 T1 17 T7 68 T11 18
valid_sources[0x15] 1255 1 T1 12 T7 68 T11 20
valid_sources[0x16] 1769 1 T1 23 T7 70 T11 11
valid_sources[0x17] 1393 1 T1 47 T7 79 T11 15
valid_sources[0x18] 1208 1 T1 5 T7 58 T11 16
valid_sources[0x19] 1236 1 T1 15 T5 1 T7 55
valid_sources[0x1a] 1175 1 T1 9 T7 78 T11 16
valid_sources[0x1b] 1612 1 T1 15 T7 76 T11 23
valid_sources[0x1c] 1201 1 T1 29 T7 65 T11 22
valid_sources[0x1d] 1678 1 T1 22 T7 73 T11 18
valid_sources[0x1e] 1717 1 T1 9 T7 62 T11 15
valid_sources[0x1f] 1352 1 T1 13 T7 61 T11 13
valid_sources[0x20] 1472 1 T1 18 T7 63 T11 19
valid_sources[0x21] 1601 1 T1 10 T7 71 T11 15
valid_sources[0x22] 1209 1 T1 11 T7 64 T11 18
valid_sources[0x23] 1137 1 T1 6 T7 67 T11 21
valid_sources[0x24] 1218 1 T1 12 T7 65 T11 28
valid_sources[0x25] 1497 1 T1 4 T7 51 T11 19
valid_sources[0x26] 1204 1 T1 28 T7 64 T11 18
valid_sources[0x27] 1630 1 T1 39 T7 57 T11 20
valid_sources[0x28] 1595 1 T1 7 T7 66 T11 16
valid_sources[0x29] 1243 1 T1 31 T7 60 T11 21
valid_sources[0x2a] 1478 1 T1 24 T7 61 T11 16
valid_sources[0x2b] 1188 1 T1 10 T7 58 T11 22
valid_sources[0x2c] 1228 1 T1 10 T7 60 T11 18
valid_sources[0x2d] 2194 1 T1 19 T7 66 T11 17
valid_sources[0x2e] 1234 1 T1 10 T7 61 T8 8
valid_sources[0x2f] 1205 1 T1 24 T7 61 T11 10
valid_sources[0x30] 1255 1 T1 12 T7 76 T11 25
valid_sources[0x31] 1201 1 T1 9 T7 67 T11 20
valid_sources[0x32] 1264 1 T1 11 T7 66 T11 24
valid_sources[0x33] 1788 1 T1 16 T7 78 T11 17
valid_sources[0x34] 1901 1 T1 39 T7 62 T11 22
valid_sources[0x35] 1870 1 T1 19 T7 61 T8 11
valid_sources[0x36] 1239 1 T1 4 T7 63 T11 23
valid_sources[0x37] 1977 1 T1 16 T7 75 T11 18
valid_sources[0x38] 1292 1 T1 18 T7 71 T11 28
valid_sources[0x39] 1410 1 T1 5 T7 65 T11 21
valid_sources[0x3a] 1344 1 T1 14 T7 59 T11 15
valid_sources[0x3b] 2252 1 T1 38 T7 73 T11 11
valid_sources[0x3c] 1235 1 T1 23 T7 55 T11 14
valid_sources[0x3d] 1463 1 T1 21 T7 56 T11 26
valid_sources[0x3e] 1295 1 T1 15 T7 59 T11 14
valid_sources[0x3f] 1479 1 T1 12 T7 65 T11 25
valid_sources[0x40] 1165 1 T1 13 T7 70 T11 15
valid_sources[0x41] 1280 1 T1 18 T7 63 T11 23
valid_sources[0x42] 1630 1 T1 8 T7 71 T11 15
valid_sources[0x43] 1202 1 T1 13 T7 55 T11 17
valid_sources[0x44] 1763 1 T1 8 T7 60 T11 19
valid_sources[0x45] 1328 1 T1 19 T7 62 T11 18
valid_sources[0x46] 1335 1 T1 50 T7 82 T11 23
valid_sources[0x47] 1867 1 T1 13 T7 78 T11 23
valid_sources[0x48] 1146 1 T1 7 T7 67 T11 21
valid_sources[0x49] 1448 1 T1 29 T7 59 T11 19
valid_sources[0x4a] 1202 1 T1 25 T7 78 T11 18
valid_sources[0x4b] 1448 1 T1 21 T7 44 T11 25
valid_sources[0x4c] 1325 1 T1 10 T7 73 T11 13
valid_sources[0x4d] 1318 1 T1 20 T7 61 T11 17
valid_sources[0x4e] 1392 1 T1 24 T7 74 T11 14
valid_sources[0x4f] 1173 1 T1 6 T7 58 T11 23
valid_sources[0x50] 1383 1 T1 22 T7 61 T11 21
valid_sources[0x51] 1685 1 T1 15 T5 1 T7 73
valid_sources[0x52] 1720 1 T1 23 T7 66 T11 23
valid_sources[0x53] 2040 1 T1 25 T7 81 T11 23
valid_sources[0x54] 1549 1 T1 11 T7 53 T11 16
valid_sources[0x55] 1157 1 T1 3 T7 74 T11 18
valid_sources[0x56] 1229 1 T1 12 T7 50 T11 13
valid_sources[0x57] 1353 1 T1 4 T7 88 T11 16
valid_sources[0x58] 1186 1 T1 21 T7 50 T11 16
valid_sources[0x59] 1431 1 T1 38 T7 64 T11 28
valid_sources[0x5a] 1258 1 T1 14 T7 59 T11 17
valid_sources[0x5b] 1356 1 T1 14 T7 57 T11 23
valid_sources[0x5c] 1223 1 T1 4 T7 69 T11 20
valid_sources[0x5d] 1502 1 T1 9 T7 74 T11 19
valid_sources[0x5e] 1419 1 T1 34 T7 62 T11 21
valid_sources[0x5f] 1464 1 T1 6 T7 59 T11 20
valid_sources[0x60] 1264 1 T1 7 T7 71 T11 17
valid_sources[0x61] 1358 1 T1 38 T7 67 T11 14
valid_sources[0x62] 1314 1 T1 25 T7 57 T11 20
valid_sources[0x63] 1189 1 T1 17 T7 64 T11 17
valid_sources[0x64] 1604 1 T1 32 T7 49 T11 22
valid_sources[0x65] 1193 1 T1 27 T7 63 T11 20
valid_sources[0x66] 1363 1 T1 16 T7 60 T11 18
valid_sources[0x67] 1239 1 T1 21 T7 59 T11 17
valid_sources[0x68] 1289 1 T1 11 T7 56 T11 18
valid_sources[0x69] 1228 1 T1 11 T7 65 T11 19
valid_sources[0x6a] 1353 1 T1 33 T7 66 T11 18
valid_sources[0x6b] 1611 1 T1 10 T7 66 T11 22
valid_sources[0x6c] 1424 1 T1 3 T7 62 T11 23
valid_sources[0x6d] 1720 1 T1 11 T7 60 T11 21
valid_sources[0x6e] 1293 1 T1 20 T7 65 T11 15
valid_sources[0x6f] 1549 1 T1 24 T7 74 T11 13
valid_sources[0x70] 2055 1 T1 10 T7 68 T11 14
valid_sources[0x71] 1664 1 T1 18 T7 77 T11 13
valid_sources[0x72] 1328 1 T1 23 T7 59 T11 21
valid_sources[0x73] 1250 1 T1 23 T7 76 T11 19
valid_sources[0x74] 1434 1 T1 3 T7 56 T11 28
valid_sources[0x75] 1183 1 T1 10 T7 75 T11 23
valid_sources[0x76] 1219 1 T1 43 T7 62 T11 20
valid_sources[0x77] 1298 1 T1 6 T7 77 T11 17
valid_sources[0x78] 1255 1 T1 6 T7 78 T11 12
valid_sources[0x79] 1330 1 T1 12 T5 1 T7 67
valid_sources[0x7a] 1453 1 T1 29 T7 62 T11 20
valid_sources[0x7b] 1291 1 T1 30 T5 1 T7 74
valid_sources[0x7c] 1594 1 T1 32 T7 66 T11 19
valid_sources[0x7d] 1313 1 T1 22 T7 65 T11 18
valid_sources[0x7e] 1186 1 T1 4 T7 58 T11 16
valid_sources[0x7f] 2322 1 T1 12 T7 53 T11 22
valid_sources[0x80] 1213 1 T1 35 T7 71 T11 22



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 83978 1 T1 1003 T2 6 T5 6
values[0x0] all_enables biggest_size 121257 1 T1 1401 T7 6004 T11 1703
values[0x1] all_enables biggest_size 121355 1 T1 1482 T7 5995 T11 1689


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 32521 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 285051 1 T1 3463 T2 5 T3 4



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 85237 1 T1 1087 T2 12 T4 1
values[0x0] 108374 1 T1 1300 T3 8 T6 5
values[0x1] 123961 1 T1 1511 T3 4 T6 1



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 16839 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 300733 1 T1 3700 T2 7 T3 4



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1412 1 T1 15 T7 45 T8 1
valid_sources[0x01] 1014 1 T1 10 T7 48 T11 10
valid_sources[0x02] 1199 1 T1 15 T7 49 T11 24
valid_sources[0x03] 985 1 T1 14 T7 51 T11 18
valid_sources[0x04] 1380 1 T1 24 T7 49 T11 16
valid_sources[0x05] 1424 1 T1 11 T7 44 T11 22
valid_sources[0x06] 1558 1 T1 14 T7 46 T11 15
valid_sources[0x07] 1326 1 T1 12 T7 48 T10 3
valid_sources[0x08] 1221 1 T1 10 T7 46 T11 16
valid_sources[0x09] 1514 1 T1 13 T7 45 T11 9
valid_sources[0x0a] 1138 1 T1 20 T7 38 T11 10
valid_sources[0x0b] 1125 1 T1 10 T7 49 T11 18
valid_sources[0x0c] 1515 1 T1 21 T7 56 T11 12
valid_sources[0x0d] 1132 1 T1 10 T7 42 T11 8
valid_sources[0x0e] 1114 1 T1 8 T7 41 T11 14
valid_sources[0x0f] 1043 1 T1 16 T7 48 T11 15
valid_sources[0x10] 1417 1 T1 15 T7 63 T11 15
valid_sources[0x11] 1374 1 T1 20 T7 55 T11 12
valid_sources[0x12] 1407 1 T1 13 T7 59 T11 14
valid_sources[0x13] 1142 1 T1 8 T7 64 T11 11
valid_sources[0x14] 1069 1 T1 12 T7 58 T11 14
valid_sources[0x15] 1279 1 T1 15 T7 51 T11 15
valid_sources[0x16] 1505 1 T1 7 T7 36 T11 17
valid_sources[0x17] 1430 1 T1 19 T7 66 T11 10
valid_sources[0x18] 1369 1 T1 12 T7 60 T11 14
valid_sources[0x19] 1260 1 T1 11 T7 45 T11 17
valid_sources[0x1a] 1163 1 T1 14 T4 1 T7 46
valid_sources[0x1b] 1146 1 T1 14 T7 52 T11 16
valid_sources[0x1c] 1060 1 T1 14 T7 61 T11 14
valid_sources[0x1d] 970 1 T1 14 T7 61 T11 18
valid_sources[0x1e] 1418 1 T1 14 T7 52 T9 9
valid_sources[0x1f] 1203 1 T1 20 T7 40 T11 18
valid_sources[0x20] 1350 1 T1 13 T7 60 T10 1
valid_sources[0x21] 950 1 T1 17 T7 64 T8 1
valid_sources[0x22] 1217 1 T1 12 T7 50 T11 18
valid_sources[0x23] 1172 1 T1 15 T7 51 T8 1
valid_sources[0x24] 1264 1 T1 13 T7 57 T11 13
valid_sources[0x25] 1085 1 T1 13 T7 57 T11 16
valid_sources[0x26] 1250 1 T1 20 T7 56 T11 16
valid_sources[0x27] 1189 1 T1 16 T7 44 T11 14
valid_sources[0x28] 1237 1 T1 18 T7 49 T11 10
valid_sources[0x29] 1062 1 T1 17 T7 59 T11 11
valid_sources[0x2a] 1375 1 T1 12 T7 54 T11 11
valid_sources[0x2b] 999 1 T1 12 T7 56 T11 15
valid_sources[0x2c] 1052 1 T1 15 T7 50 T11 11
valid_sources[0x2d] 1610 1 T1 13 T7 60 T11 19
valid_sources[0x2e] 1488 1 T1 30 T7 45 T11 14
valid_sources[0x2f] 1151 1 T1 26 T7 48 T11 20
valid_sources[0x30] 1201 1 T1 15 T7 50 T11 13
valid_sources[0x31] 1560 1 T1 22 T7 51 T11 20
valid_sources[0x32] 1473 1 T1 14 T7 51 T11 10
valid_sources[0x33] 1076 1 T1 12 T7 55 T11 11
valid_sources[0x34] 1752 1 T1 11 T7 40 T11 10
valid_sources[0x35] 1124 1 T1 10 T7 60 T11 11
valid_sources[0x36] 1303 1 T1 18 T7 43 T11 10
valid_sources[0x37] 1346 1 T1 12 T7 42 T11 17
valid_sources[0x38] 1385 1 T1 14 T7 58 T11 11
valid_sources[0x39] 1243 1 T1 17 T7 50 T11 21
valid_sources[0x3a] 1420 1 T1 10 T7 40 T11 13
valid_sources[0x3b] 1030 1 T1 13 T7 70 T11 9
valid_sources[0x3c] 1254 1 T1 16 T7 48 T11 15
valid_sources[0x3d] 1007 1 T1 16 T7 54 T11 16
valid_sources[0x3e] 1177 1 T1 10 T7 56 T11 17
valid_sources[0x3f] 1208 1 T1 16 T7 59 T11 14
valid_sources[0x40] 1179 1 T1 16 T7 54 T11 12
valid_sources[0x41] 1216 1 T1 18 T7 45 T11 19
valid_sources[0x42] 1466 1 T1 15 T7 49 T11 13
valid_sources[0x43] 1036 1 T1 14 T7 59 T11 16
valid_sources[0x44] 1257 1 T1 18 T7 46 T11 15
valid_sources[0x45] 1053 1 T1 11 T7 54 T11 14
valid_sources[0x46] 1304 1 T1 8 T7 46 T11 20
valid_sources[0x47] 1125 1 T1 12 T7 56 T11 18
valid_sources[0x48] 1113 1 T1 18 T7 48 T11 14
valid_sources[0x49] 1042 1 T1 15 T7 47 T11 10
valid_sources[0x4a] 1216 1 T1 13 T7 42 T11 11
valid_sources[0x4b] 1390 1 T1 19 T7 50 T11 15
valid_sources[0x4c] 961 1 T1 19 T7 50 T11 18
valid_sources[0x4d] 1324 1 T1 16 T7 50 T11 20
valid_sources[0x4e] 1475 1 T1 13 T7 47 T11 15
valid_sources[0x4f] 1172 1 T1 9 T7 55 T11 11
valid_sources[0x50] 1600 1 T1 11 T7 44 T11 9
valid_sources[0x51] 1287 1 T1 10 T7 50 T11 9
valid_sources[0x52] 1171 1 T1 11 T7 53 T11 13
valid_sources[0x53] 1142 1 T1 16 T7 58 T11 10
valid_sources[0x54] 1245 1 T1 9 T7 47 T11 22
valid_sources[0x55] 1356 1 T1 13 T7 43 T11 22
valid_sources[0x56] 1372 1 T1 23 T2 1 T7 48
valid_sources[0x57] 934 1 T1 38 T7 57 T11 20
valid_sources[0x58] 1325 1 T1 9 T7 32 T11 9
valid_sources[0x59] 1125 1 T1 11 T7 69 T11 20
valid_sources[0x5a] 1022 1 T1 18 T7 44 T11 17
valid_sources[0x5b] 1508 1 T1 22 T7 70 T11 11
valid_sources[0x5c] 1465 1 T1 23 T7 42 T11 9
valid_sources[0x5d] 1147 1 T1 20 T7 55 T11 8
valid_sources[0x5e] 1072 1 T1 11 T7 69 T11 14
valid_sources[0x5f] 959 1 T1 13 T7 57 T11 16
valid_sources[0x60] 1258 1 T1 20 T7 60 T11 13
valid_sources[0x61] 1136 1 T1 11 T7 67 T11 12
valid_sources[0x62] 1137 1 T1 19 T7 49 T11 14
valid_sources[0x63] 1198 1 T1 13 T7 64 T11 12
valid_sources[0x64] 1095 1 T1 26 T7 61 T11 18
valid_sources[0x65] 1494 1 T1 13 T7 55 T11 11
valid_sources[0x66] 1618 1 T1 22 T7 66 T8 1
valid_sources[0x67] 1147 1 T1 18 T7 57 T11 13
valid_sources[0x68] 1339 1 T1 13 T7 70 T11 9
valid_sources[0x69] 1159 1 T1 10 T7 47 T11 19
valid_sources[0x6a] 1485 1 T1 16 T7 47 T11 19
valid_sources[0x6b] 1115 1 T1 23 T7 45 T11 9
valid_sources[0x6c] 1330 1 T1 14 T7 60 T11 12
valid_sources[0x6d] 1403 1 T1 15 T7 49 T11 31
valid_sources[0x6e] 1123 1 T1 12 T7 52 T11 11
valid_sources[0x6f] 1622 1 T1 14 T7 50 T11 19
valid_sources[0x70] 989 1 T1 9 T7 43 T11 19
valid_sources[0x71] 1294 1 T1 22 T7 52 T11 12
valid_sources[0x72] 1014 1 T1 17 T7 43 T11 19
valid_sources[0x73] 1191 1 T1 12 T2 11 T7 67
valid_sources[0x74] 1267 1 T1 12 T7 46 T11 9
valid_sources[0x75] 1076 1 T1 15 T7 46 T11 15
valid_sources[0x76] 918 1 T1 19 T7 38 T11 13
valid_sources[0x77] 1379 1 T1 19 T7 56 T11 8
valid_sources[0x78] 1080 1 T1 8 T7 50 T11 17
valid_sources[0x79] 933 1 T1 15 T7 33 T8 2
valid_sources[0x7a] 1153 1 T1 14 T7 54 T11 21
valid_sources[0x7b] 1277 1 T1 17 T5 23 T7 51
valid_sources[0x7c] 1373 1 T1 17 T7 41 T11 24
valid_sources[0x7d] 1296 1 T1 13 T7 41 T11 9
valid_sources[0x7e] 1216 1 T1 15 T7 51 T11 20
valid_sources[0x7f] 1233 1 T1 22 T7 39 T11 13
valid_sources[0x80] 1170 1 T1 17 T7 51 T11 11



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 73581 1 T1 946 T2 5 T5 14
values[0x0] all_enables biggest_size 105854 1 T1 1269 T3 3 T7 4455
values[0x1] all_enables biggest_size 105616 1 T1 1248 T3 1 T6 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%