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Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 30707 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 248581 1 T4 7 T5 1 T7 4



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 89931 1 T4 83 T5 25 T7 24
values[0x0] 92822 1 T13 229 T14 121 T15 836
values[0x1] 96535 1 T13 248 T14 121 T15 884



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 14166 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 265122 1 T4 47 T5 13 T7 12



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1214 1 T9 3 T66 2 T68 3
valid_sources[0x01] 976 1 T9 2 T16 2 T11 1
valid_sources[0x02] 1409 1 T22 1 T129 4 T11 6
valid_sources[0x03] 1141 1 T9 1 T85 3 T14 2
valid_sources[0x04] 974 1 T5 3 T129 11 T66 1
valid_sources[0x05] 932 1 T4 5 T9 1 T84 3
valid_sources[0x06] 1063 1 T22 2 T16 2 T68 1
valid_sources[0x07] 947 1 T16 1 T13 3 T14 1
valid_sources[0x08] 937 1 T9 2 T22 1 T66 3
valid_sources[0x09] 930 1 T16 1 T13 2 T84 1
valid_sources[0x0a] 1117 1 T66 2 T68 1 T13 5
valid_sources[0x0b] 1332 1 T4 1 T9 3 T23 1
valid_sources[0x0c] 961 1 T129 9 T66 1 T68 2
valid_sources[0x0d] 1280 1 T13 2 T84 2 T85 2
valid_sources[0x0e] 951 1 T66 1 T13 1 T84 2
valid_sources[0x0f] 1022 1 T13 6 T84 3 T85 1
valid_sources[0x10] 876 1 T66 2 T13 6 T85 1
valid_sources[0x11] 862 1 T66 2 T13 1 T84 1
valid_sources[0x12] 904 1 T23 1 T16 2 T13 3
valid_sources[0x13] 1511 1 T9 4 T23 1 T66 1
valid_sources[0x14] 1062 1 T9 1 T66 1 T13 14
valid_sources[0x15] 865 1 T9 1 T13 3 T85 2
valid_sources[0x16] 1521 1 T23 3 T16 1 T66 2
valid_sources[0x17] 937 1 T5 2 T9 7 T13 5
valid_sources[0x18] 1052 1 T66 2 T68 1 T13 5
valid_sources[0x19] 905 1 T66 1 T13 2 T85 1
valid_sources[0x1a] 1035 1 T9 6 T23 1 T16 1
valid_sources[0x1b] 1030 1 T66 1 T32 1 T13 3
valid_sources[0x1c] 860 1 T4 1 T8 5 T9 2
valid_sources[0x1d] 1090 1 T9 3 T22 2 T68 1
valid_sources[0x1e] 893 1 T9 2 T66 2 T68 2
valid_sources[0x1f] 1020 1 T22 1 T66 1 T13 9
valid_sources[0x20] 906 1 T9 1 T16 3 T68 7
valid_sources[0x21] 1146 1 T16 1 T20 1 T13 4
valid_sources[0x22] 984 1 T9 1 T129 26 T14 1
valid_sources[0x23] 1300 1 T17 35 T66 6 T84 5
valid_sources[0x24] 1373 1 T9 4 T84 3 T85 1
valid_sources[0x25] 989 1 T9 1 T66 3 T14 1
valid_sources[0x26] 1047 1 T9 2 T68 6 T13 6
valid_sources[0x27] 990 1 T4 2 T9 2 T16 1
valid_sources[0x28] 1089 1 T9 1 T10 16 T66 1
valid_sources[0x29] 1036 1 T9 1 T22 1 T66 3
valid_sources[0x2a] 912 1 T4 5 T66 3 T13 6
valid_sources[0x2b] 1216 1 T7 4 T66 4 T68 2
valid_sources[0x2c] 982 1 T66 1 T85 1 T14 2
valid_sources[0x2d] 948 1 T5 3 T9 2 T66 3
valid_sources[0x2e] 944 1 T9 2 T13 5 T85 1
valid_sources[0x2f] 836 1 T9 6 T16 2 T129 4
valid_sources[0x30] 1059 1 T9 1 T11 9 T66 1
valid_sources[0x31] 1000 1 T23 1 T66 1 T76 2
valid_sources[0x32] 1042 1 T16 1 T144 1 T145 1
valid_sources[0x33] 983 1 T9 2 T11 3 T66 2
valid_sources[0x34] 876 1 T4 3 T84 2 T14 1
valid_sources[0x35] 934 1 T13 3 T84 1 T85 1
valid_sources[0x36] 990 1 T5 2 T13 2 T84 1
valid_sources[0x37] 971 1 T9 4 T13 5 T85 1
valid_sources[0x38] 1420 1 T23 1 T11 7 T13 10
valid_sources[0x39] 1392 1 T9 11 T16 2 T13 5
valid_sources[0x3a] 956 1 T23 2 T66 2 T13 2
valid_sources[0x3b] 1719 1 T9 2 T21 2 T68 1
valid_sources[0x3c] 1245 1 T66 4 T13 5 T85 1
valid_sources[0x3d] 1391 1 T9 4 T22 1 T17 12
valid_sources[0x3e] 1328 1 T4 2 T9 2 T22 1
valid_sources[0x3f] 1260 1 T4 1 T9 7 T16 1
valid_sources[0x40] 1006 1 T9 2 T16 1 T13 9
valid_sources[0x41] 952 1 T9 2 T16 3 T66 3
valid_sources[0x42] 961 1 T9 16 T129 2 T66 3
valid_sources[0x43] 983 1 T9 6 T16 2 T32 14
valid_sources[0x44] 1015 1 T9 4 T23 1 T66 3
valid_sources[0x45] 1351 1 T11 5 T66 2 T13 6
valid_sources[0x46] 939 1 T9 4 T13 3 T84 1
valid_sources[0x47] 982 1 T66 1 T68 1 T13 1
valid_sources[0x48] 1024 1 T9 3 T16 1 T11 12
valid_sources[0x49] 990 1 T16 3 T66 2 T13 3
valid_sources[0x4a] 979 1 T4 2 T9 1 T16 1
valid_sources[0x4b] 983 1 T4 4 T66 1 T13 1
valid_sources[0x4c] 889 1 T4 1 T16 1 T66 2
valid_sources[0x4d] 929 1 T13 1 T84 2 T85 2
valid_sources[0x4e] 978 1 T16 1 T66 1 T13 3
valid_sources[0x4f] 961 1 T129 7 T32 1 T13 1
valid_sources[0x50] 1141 1 T5 1 T16 2 T13 8
valid_sources[0x51] 865 1 T9 3 T66 3 T68 6
valid_sources[0x52] 1055 1 T9 7 T66 2 T13 5
valid_sources[0x53] 950 1 T4 1 T9 1 T66 1
valid_sources[0x54] 1551 1 T9 2 T16 2 T20 9
valid_sources[0x55] 1210 1 T23 1 T16 1 T13 4
valid_sources[0x56] 1400 1 T9 4 T23 1 T66 1
valid_sources[0x57] 1383 1 T7 4 T9 5 T66 3
valid_sources[0x58] 1455 1 T11 1 T66 1 T13 10
valid_sources[0x59] 964 1 T66 2 T13 1 T84 2
valid_sources[0x5a] 980 1 T9 1 T66 2 T13 2
valid_sources[0x5b] 970 1 T4 1 T16 2 T20 2
valid_sources[0x5c] 918 1 T7 7 T9 4 T16 3
valid_sources[0x5d] 972 1 T4 7 T13 8 T85 2
valid_sources[0x5e] 2018 1 T9 5 T23 1 T16 1
valid_sources[0x5f] 1323 1 T84 3 T85 1 T146 1
valid_sources[0x60] 1011 1 T9 2 T68 5 T84 1
valid_sources[0x61] 1102 1 T9 3 T13 3 T84 1
valid_sources[0x62] 1003 1 T9 1 T17 55 T66 3
valid_sources[0x63] 1263 1 T4 1 T9 1 T16 2
valid_sources[0x64] 1091 1 T8 1 T66 4 T84 2
valid_sources[0x65] 931 1 T9 2 T16 1 T66 1
valid_sources[0x66] 1047 1 T22 1 T66 4 T68 6
valid_sources[0x67] 1154 1 T23 1 T129 1 T11 3
valid_sources[0x68] 1694 1 T9 1 T23 1 T66 1
valid_sources[0x69] 918 1 T66 1 T13 4 T85 3
valid_sources[0x6a] 948 1 T16 3 T66 2 T13 2
valid_sources[0x6b] 927 1 T16 7 T66 3 T13 1
valid_sources[0x6c] 1301 1 T22 1 T129 5 T66 2
valid_sources[0x6d] 961 1 T9 8 T23 1 T13 1
valid_sources[0x6e] 1616 1 T4 1 T5 3 T23 1
valid_sources[0x6f] 964 1 T16 1 T66 1 T13 2
valid_sources[0x70] 979 1 T9 6 T66 3 T13 3
valid_sources[0x71] 1235 1 T13 1 T76 1 T84 1
valid_sources[0x72] 1344 1 T9 1 T16 2 T66 1
valid_sources[0x73] 1059 1 T4 4 T22 1 T16 3
valid_sources[0x74] 1519 1 T23 1 T66 2 T13 7
valid_sources[0x75] 946 1 T9 2 T13 7 T84 2
valid_sources[0x76] 1645 1 T7 3 T9 6 T16 1
valid_sources[0x77] 938 1 T9 5 T16 1 T20 1
valid_sources[0x78] 970 1 T9 1 T13 4 T84 2
valid_sources[0x79] 1030 1 T4 2 T9 1 T16 2
valid_sources[0x7a] 922 1 T16 3 T68 1 T13 2
valid_sources[0x7b] 1099 1 T9 3 T22 2 T68 3
valid_sources[0x7c] 1064 1 T22 1 T20 5 T66 1
valid_sources[0x7d] 1227 1 T9 2 T22 1 T16 3
valid_sources[0x7e] 1119 1 T4 1 T66 3 T13 2
valid_sources[0x7f] 1265 1 T129 12 T13 2 T84 2
valid_sources[0x80] 960 1 T129 5 T68 4 T13 5



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 64316 1 T4 7 T5 1 T7 4
values[0x0] all_enables biggest_size 91982 1 T13 227 T14 120 T15 829
values[0x1] all_enables biggest_size 92283 1 T13 235 T14 113 T15 854


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 27390 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 227177 1 T1 1 T2 2 T3 3



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 68835 1 T5 16 T7 16 T8 16
values[0x0] 86873 1 T1 3 T2 3 T3 11
values[0x1] 98859 1 T1 3 T2 3 T3 8



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 14767 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 239800 1 T1 2 T2 2 T3 3



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 1008 1 T7 2 T14 7 T37 1
valid_sources[0x01] 813 1 T5 2 T82 3 T40 1
valid_sources[0x02] 897 1 T14 3 T107 1 T15 6
valid_sources[0x03] 837 1 T14 1 T35 1 T15 8
valid_sources[0x04] 1322 1 T2 6 T13 3 T14 1
valid_sources[0x05] 959 1 T13 1 T14 3 T35 1
valid_sources[0x06] 776 1 T67 1 T14 5 T35 1
valid_sources[0x07] 834 1 T103 1 T14 4 T35 1
valid_sources[0x08] 993 1 T40 2 T14 13 T35 1
valid_sources[0x09] 914 1 T14 4 T15 10 T18 4
valid_sources[0x0a] 892 1 T40 2 T14 1 T144 2
valid_sources[0x0b] 1116 1 T6 1 T14 5 T15 4
valid_sources[0x0c] 1150 1 T5 1 T103 2 T14 1
valid_sources[0x0d] 887 1 T14 4 T107 3 T15 10
valid_sources[0x0e] 988 1 T147 2 T14 7 T15 7
valid_sources[0x0f] 933 1 T40 1 T14 3 T15 8
valid_sources[0x10] 1105 1 T14 1 T148 1 T15 7
valid_sources[0x11] 1165 1 T14 5 T148 3 T15 9
valid_sources[0x12] 1282 1 T13 36 T14 3 T106 14
valid_sources[0x13] 827 1 T21 1 T14 2 T15 7
valid_sources[0x14] 1297 1 T14 3 T35 2 T15 11
valid_sources[0x15] 1036 1 T14 3 T144 2 T35 1
valid_sources[0x16] 800 1 T23 3 T14 8 T15 4
valid_sources[0x17] 864 1 T1 1 T40 1 T14 3
valid_sources[0x18] 823 1 T14 2 T15 6 T18 3
valid_sources[0x19] 1025 1 T103 1 T14 6 T15 14
valid_sources[0x1a] 1000 1 T149 2 T37 1 T15 8
valid_sources[0x1b] 901 1 T13 1 T14 6 T15 8
valid_sources[0x1c] 995 1 T20 1 T34 1 T14 8
valid_sources[0x1d] 1457 1 T14 3 T144 1 T15 12
valid_sources[0x1e] 1021 1 T35 1 T104 1 T15 4
valid_sources[0x1f] 1045 1 T13 53 T14 1 T35 1
valid_sources[0x20] 810 1 T14 2 T150 2 T15 9
valid_sources[0x21] 833 1 T151 5 T14 4 T35 1
valid_sources[0x22] 1029 1 T14 3 T35 3 T15 4
valid_sources[0x23] 993 1 T14 6 T35 1 T15 5
valid_sources[0x24] 1003 1 T14 6 T35 1 T148 1
valid_sources[0x25] 1001 1 T152 1 T147 3 T14 2
valid_sources[0x26] 986 1 T67 1 T14 5 T153 1
valid_sources[0x27] 1348 1 T14 3 T15 10 T18 1
valid_sources[0x28] 898 1 T103 1 T14 5 T35 1
valid_sources[0x29] 876 1 T14 3 T15 9 T18 8
valid_sources[0x2a] 872 1 T14 10 T15 8 T18 4
valid_sources[0x2b] 955 1 T14 3 T104 1 T74 1
valid_sources[0x2c] 1095 1 T14 8 T35 1 T15 7
valid_sources[0x2d] 951 1 T14 5 T15 7 T18 13
valid_sources[0x2e] 838 1 T67 1 T13 16 T14 2
valid_sources[0x2f] 1242 1 T14 8 T153 3 T15 3
valid_sources[0x30] 1226 1 T14 1 T149 2 T15 12
valid_sources[0x31] 1144 1 T76 1 T14 8 T144 2
valid_sources[0x32] 990 1 T76 1 T147 1 T14 11
valid_sources[0x33] 1084 1 T14 7 T35 1 T37 1
valid_sources[0x34] 839 1 T6 1 T14 5 T144 4
valid_sources[0x35] 1025 1 T3 19 T14 11 T107 2
valid_sources[0x36] 1097 1 T13 1 T14 3 T35 1
valid_sources[0x37] 929 1 T103 1 T14 3 T105 1
valid_sources[0x38] 828 1 T13 3 T14 6 T107 1
valid_sources[0x39] 1043 1 T6 3 T32 2 T13 3
valid_sources[0x3a] 898 1 T23 1 T14 6 T105 2
valid_sources[0x3b] 960 1 T14 1 T15 6 T18 6
valid_sources[0x3c] 1024 1 T14 6 T15 5 T108 1
valid_sources[0x3d] 1205 1 T14 6 T37 1 T15 14
valid_sources[0x3e] 850 1 T103 1 T14 4 T15 6
valid_sources[0x3f] 1195 1 T8 3 T14 5 T144 1
valid_sources[0x40] 903 1 T14 4 T107 4 T15 10
valid_sources[0x41] 837 1 T152 2 T14 8 T15 3
valid_sources[0x42] 934 1 T14 7 T15 5 T18 10
valid_sources[0x43] 881 1 T14 1 T35 1 T36 1
valid_sources[0x44] 869 1 T14 2 T35 1 T105 1
valid_sources[0x45] 891 1 T67 1 T40 3 T14 4
valid_sources[0x46] 1190 1 T10 48 T32 2 T13 304
valid_sources[0x47] 1005 1 T14 5 T148 1 T15 8
valid_sources[0x48] 907 1 T82 1 T14 5 T35 1
valid_sources[0x49] 840 1 T14 5 T35 2 T15 14
valid_sources[0x4a] 1172 1 T21 3 T13 2 T14 3
valid_sources[0x4b] 890 1 T7 1 T20 2 T152 1
valid_sources[0x4c] 1013 1 T14 7 T15 6 T18 18
valid_sources[0x4d] 916 1 T13 10 T76 1 T14 10
valid_sources[0x4e] 874 1 T1 1 T14 3 T71 1
valid_sources[0x4f] 963 1 T23 2 T35 1 T15 13
valid_sources[0x50] 1040 1 T14 1 T104 2 T153 1
valid_sources[0x51] 973 1 T14 3 T35 1 T150 1
valid_sources[0x52] 896 1 T13 20 T14 3 T35 1
valid_sources[0x53] 1042 1 T23 1 T13 1 T14 7
valid_sources[0x54] 1274 1 T20 1 T13 10 T82 1
valid_sources[0x55] 963 1 T14 3 T104 2 T15 4
valid_sources[0x56] 833 1 T14 5 T104 2 T15 9
valid_sources[0x57] 838 1 T14 3 T15 9 T108 4
valid_sources[0x58] 837 1 T13 16 T14 2 T65 1
valid_sources[0x59] 967 1 T14 1 T15 14 T108 1
valid_sources[0x5a] 955 1 T103 1 T14 3 T15 6
valid_sources[0x5b] 1131 1 T67 1 T21 1 T14 7
valid_sources[0x5c] 973 1 T40 2 T14 6 T15 9
valid_sources[0x5d] 776 1 T14 11 T15 5 T18 2
valid_sources[0x5e] 800 1 T14 3 T15 11 T18 8
valid_sources[0x5f] 761 1 T13 1 T14 3 T148 1
valid_sources[0x60] 1103 1 T14 6 T35 1 T107 1
valid_sources[0x61] 901 1 T151 3 T14 1 T105 1
valid_sources[0x62] 1029 1 T14 9 T154 1 T15 11
valid_sources[0x63] 784 1 T67 1 T147 2 T14 3
valid_sources[0x64] 958 1 T14 4 T37 1 T15 9
valid_sources[0x65] 992 1 T6 1 T76 1 T14 12
valid_sources[0x66] 1190 1 T7 1 T20 7 T14 4
valid_sources[0x67] 1011 1 T13 8 T103 1 T14 3
valid_sources[0x68] 1172 1 T151 2 T14 2 T35 1
valid_sources[0x69] 894 1 T14 1 T35 1 T104 1
valid_sources[0x6a] 1017 1 T76 2 T14 3 T107 1
valid_sources[0x6b] 880 1 T23 6 T103 1 T14 3
valid_sources[0x6c] 771 1 T13 1 T152 1 T14 1
valid_sources[0x6d] 899 1 T20 1 T13 2 T14 1
valid_sources[0x6e] 887 1 T7 1 T13 2 T40 1
valid_sources[0x6f] 897 1 T40 2 T14 2 T35 2
valid_sources[0x70] 1120 1 T7 3 T14 1 T144 1
valid_sources[0x71] 832 1 T14 7 T15 9 T18 7
valid_sources[0x72] 1129 1 T14 2 T35 1 T15 4
valid_sources[0x73] 843 1 T5 1 T14 1 T15 3
valid_sources[0x74] 1056 1 T21 1 T13 55 T14 9
valid_sources[0x75] 854 1 T104 1 T15 8 T108 1
valid_sources[0x76] 1112 1 T14 3 T15 14 T18 5
valid_sources[0x77] 1039 1 T23 1 T39 1 T14 4
valid_sources[0x78] 1173 1 T14 1 T104 1 T15 8
valid_sources[0x79] 958 1 T14 9 T104 2 T105 2
valid_sources[0x7a] 926 1 T14 7 T15 10 T108 1
valid_sources[0x7b] 1091 1 T82 1 T14 3 T105 1
valid_sources[0x7c] 875 1 T76 2 T14 2 T15 5
valid_sources[0x7d] 801 1 T67 2 T14 5 T155 1
valid_sources[0x7e] 864 1 T40 2 T14 3 T144 1
valid_sources[0x7f] 747 1 T14 2 T15 8 T156 1
valid_sources[0x80] 799 1 T1 1 T14 4 T35 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 58406 1 T5 9 T7 10 T8 8
values[0x0] all_enables biggest_size 84623 1 T2 2 T3 3 T93 5
values[0x1] all_enables biggest_size 84148 1 T1 1 T93 1 T67 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%