Line Coverage for Module :
rstmgr_cascading_sva_if
| Line No. | Total | Covered | Percent |
TOTAL | | 7 | 7 | 100.00 |
ALWAYS | 100 | 1 | 1 | 100.00 |
ALWAYS | 103 | 1 | 1 | 100.00 |
ALWAYS | 107 | 1 | 1 | 100.00 |
ALWAYS | 127 | 1 | 1 | 100.00 |
ALWAYS | 138 | 1 | 1 | 100.00 |
ALWAYS | 141 | 1 | 1 | 100.00 |
ALWAYS | 144 | 1 | 1 | 100.00 |
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_dv_rstmgr_sva_ifs_0.1/rstmgr_cascading_sva_if.sv' or '../src/lowrisc_dv_rstmgr_sva_ifs_0.1/rstmgr_cascading_sva_if.sv' was not found, so annotated line coverage report could not be generated.
Line No. | Covered | Statements | |
100 |
1 |
1 |
103 |
1 |
1 |
107 |
1 |
1 |
127 |
1 |
1 |
138 |
1 |
1 |
141 |
1 |
1 |
144 |
1 |
1 |
Cond Coverage for Module :
rstmgr_cascading_sva_if
| Total | Covered | Percent |
Conditions | 6 | 6 | 100.00 |
Logical | 6 | 6 | 100.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 | |
LINE 103
EXPRESSION (((!scanmode)) || scan_rst_ni)
------1------ -----2-----
-1- | -2- | Status | Tests |
0 | 0 | Covered | T1,T3,T4 |
0 | 1 | Covered | T1,T3,T4 |
1 | 0 | Covered | T1,T3,T6 |
LINE 107
EXPRESSION (por_n_i[rstmgr_pkg::DomainAonSel] && ((!scanmode)))
----------------1---------------- ------2------
-1- | -2- | Status | Tests |
0 | 1 | Covered | T1,T3,T6 |
1 | 0 | Covered | T1,T3,T4 |
1 | 1 | Covered | T1,T2,T3 |
Assert Coverage for Module :
rstmgr_cascading_sva_if
Assertion Details
CascadeEffAonToRstPorAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
9301 |
0 |
0 |
T1 |
137941 |
18 |
0 |
0 |
T2 |
18926 |
1 |
0 |
0 |
T3 |
130108 |
133 |
0 |
0 |
T4 |
17778 |
2 |
0 |
0 |
T5 |
24059 |
1 |
0 |
0 |
T6 |
140836 |
16 |
0 |
0 |
T7 |
11865 |
1 |
0 |
0 |
T8 |
89401 |
17 |
0 |
0 |
T9 |
11221 |
2 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeEffAonToRstPorAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
9301 |
0 |
0 |
T1 |
137941 |
18 |
0 |
0 |
T2 |
18926 |
1 |
0 |
0 |
T3 |
130108 |
133 |
0 |
0 |
T4 |
17778 |
2 |
0 |
0 |
T5 |
24059 |
1 |
0 |
0 |
T6 |
140836 |
16 |
0 |
0 |
T7 |
11865 |
1 |
0 |
0 |
T8 |
89401 |
17 |
0 |
0 |
T9 |
11221 |
2 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
54243684 |
9301 |
0 |
0 |
T1 |
132425 |
18 |
0 |
0 |
T2 |
18169 |
1 |
0 |
0 |
T3 |
124905 |
133 |
0 |
0 |
T4 |
17071 |
2 |
0 |
0 |
T5 |
23096 |
1 |
0 |
0 |
T6 |
135171 |
16 |
0 |
0 |
T7 |
11391 |
1 |
0 |
0 |
T8 |
85833 |
17 |
0 |
0 |
T9 |
10765 |
2 |
0 |
0 |
T10 |
7725 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
54243684 |
9301 |
0 |
0 |
T1 |
132425 |
18 |
0 |
0 |
T2 |
18169 |
1 |
0 |
0 |
T3 |
124905 |
133 |
0 |
0 |
T4 |
17071 |
2 |
0 |
0 |
T5 |
23096 |
1 |
0 |
0 |
T6 |
135171 |
16 |
0 |
0 |
T7 |
11391 |
1 |
0 |
0 |
T8 |
85833 |
17 |
0 |
0 |
T9 |
10765 |
2 |
0 |
0 |
T10 |
7725 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoDiv2AboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
27122668 |
9301 |
0 |
0 |
T1 |
66217 |
18 |
0 |
0 |
T2 |
9084 |
1 |
0 |
0 |
T3 |
624537 |
133 |
0 |
0 |
T4 |
8534 |
2 |
0 |
0 |
T5 |
11548 |
1 |
0 |
0 |
T6 |
67596 |
16 |
0 |
0 |
T7 |
5695 |
1 |
0 |
0 |
T8 |
42910 |
17 |
0 |
0 |
T9 |
5383 |
2 |
0 |
0 |
T10 |
3862 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoDiv2AboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
27122668 |
9301 |
0 |
0 |
T1 |
66217 |
18 |
0 |
0 |
T2 |
9084 |
1 |
0 |
0 |
T3 |
624537 |
133 |
0 |
0 |
T4 |
8534 |
2 |
0 |
0 |
T5 |
11548 |
1 |
0 |
0 |
T6 |
67596 |
16 |
0 |
0 |
T7 |
5695 |
1 |
0 |
0 |
T8 |
42910 |
17 |
0 |
0 |
T9 |
5383 |
2 |
0 |
0 |
T10 |
3862 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoDiv4AboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
13560952 |
9301 |
0 |
0 |
T1 |
33104 |
18 |
0 |
0 |
T2 |
4541 |
1 |
0 |
0 |
T3 |
312267 |
133 |
0 |
0 |
T4 |
4267 |
2 |
0 |
0 |
T5 |
5772 |
1 |
0 |
0 |
T6 |
33795 |
16 |
0 |
0 |
T7 |
2847 |
1 |
0 |
0 |
T8 |
21454 |
17 |
0 |
0 |
T9 |
2690 |
2 |
0 |
0 |
T10 |
1930 |
1 |
0 |
0 |
CascadeEffAonToRstPorIoDiv4AboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
13560952 |
9301 |
0 |
0 |
T1 |
33104 |
18 |
0 |
0 |
T2 |
4541 |
1 |
0 |
0 |
T3 |
312267 |
133 |
0 |
0 |
T4 |
4267 |
2 |
0 |
0 |
T5 |
5772 |
1 |
0 |
0 |
T6 |
33795 |
16 |
0 |
0 |
T7 |
2847 |
1 |
0 |
0 |
T8 |
21454 |
17 |
0 |
0 |
T9 |
2690 |
2 |
0 |
0 |
T10 |
1930 |
1 |
0 |
0 |
CascadeEffAonToRstPorUcbAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
27122513 |
9301 |
0 |
0 |
T1 |
66212 |
18 |
0 |
0 |
T2 |
9084 |
1 |
0 |
0 |
T3 |
624544 |
133 |
0 |
0 |
T4 |
8534 |
2 |
0 |
0 |
T5 |
11547 |
1 |
0 |
0 |
T6 |
67597 |
16 |
0 |
0 |
T7 |
5695 |
1 |
0 |
0 |
T8 |
42911 |
17 |
0 |
0 |
T9 |
5386 |
2 |
0 |
0 |
T10 |
3863 |
1 |
0 |
0 |
CascadeEffAonToRstPorUcbAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
27122513 |
9301 |
0 |
0 |
T1 |
66212 |
18 |
0 |
0 |
T2 |
9084 |
1 |
0 |
0 |
T3 |
624544 |
133 |
0 |
0 |
T4 |
8534 |
2 |
0 |
0 |
T5 |
11547 |
1 |
0 |
0 |
T6 |
67597 |
16 |
0 |
0 |
T7 |
5695 |
1 |
0 |
0 |
T8 |
42911 |
17 |
0 |
0 |
T9 |
5386 |
2 |
0 |
0 |
T10 |
3863 |
1 |
0 |
0 |
CascadeLcToLcAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeLcToLcAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeLcToLcAonAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
1711728 |
22511 |
0 |
0 |
T1 |
4220 |
53 |
0 |
0 |
T2 |
566 |
12 |
0 |
0 |
T3 |
39456 |
378 |
0 |
0 |
T4 |
531 |
6 |
0 |
0 |
T5 |
720 |
18 |
0 |
0 |
T6 |
4271 |
48 |
0 |
0 |
T7 |
354 |
12 |
0 |
0 |
T8 |
2757 |
60 |
0 |
0 |
T9 |
335 |
6 |
0 |
0 |
T10 |
239 |
1 |
0 |
0 |
CascadeLcToLcAonAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
1711728 |
22511 |
0 |
0 |
T1 |
4220 |
53 |
0 |
0 |
T2 |
566 |
12 |
0 |
0 |
T3 |
39456 |
378 |
0 |
0 |
T4 |
531 |
6 |
0 |
0 |
T5 |
720 |
18 |
0 |
0 |
T6 |
4271 |
48 |
0 |
0 |
T7 |
354 |
12 |
0 |
0 |
T8 |
2757 |
60 |
0 |
0 |
T9 |
335 |
6 |
0 |
0 |
T10 |
239 |
1 |
0 |
0 |
CascadeLcToLcShadowedAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeLcToLcShadowedAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadePorToAonAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
1711728 |
7465 |
0 |
0 |
T1 |
4220 |
8 |
0 |
0 |
T2 |
566 |
1 |
0 |
0 |
T3 |
39456 |
69 |
0 |
0 |
T4 |
531 |
1 |
0 |
0 |
T5 |
720 |
1 |
0 |
0 |
T6 |
4271 |
5 |
0 |
0 |
T7 |
354 |
1 |
0 |
0 |
T8 |
2757 |
8 |
0 |
0 |
T9 |
335 |
1 |
0 |
0 |
T10 |
239 |
1 |
0 |
0 |
CascadeSysToSysAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
CascadeSysToSysAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
56505406 |
22511 |
0 |
0 |
T1 |
137941 |
53 |
0 |
0 |
T2 |
18926 |
12 |
0 |
0 |
T3 |
130108 |
378 |
0 |
0 |
T4 |
17778 |
6 |
0 |
0 |
T5 |
24059 |
18 |
0 |
0 |
T6 |
140836 |
48 |
0 |
0 |
T7 |
11865 |
12 |
0 |
0 |
T8 |
89401 |
60 |
0 |
0 |
T9 |
11221 |
6 |
0 |
0 |
T10 |
8047 |
1 |
0 |
0 |
ScanRstToAonRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
1711728 |
213 |
0 |
0 |
T3 |
39456 |
4 |
0 |
0 |
T4 |
531 |
0 |
0 |
0 |
T5 |
720 |
0 |
0 |
0 |
T6 |
4271 |
1 |
0 |
0 |
T7 |
354 |
0 |
0 |
0 |
T8 |
2757 |
1 |
0 |
0 |
T9 |
335 |
0 |
0 |
0 |
T10 |
239 |
0 |
0 |
0 |
T11 |
0 |
1 |
0 |
0 |
T12 |
732 |
0 |
0 |
0 |
T23 |
0 |
1 |
0 |
0 |
T24 |
0 |
2 |
0 |
0 |
T27 |
0 |
9 |
0 |
0 |
T53 |
0 |
1 |
0 |
0 |
T57 |
0 |
4 |
0 |
0 |
T75 |
196 |
0 |
0 |
0 |
T110 |
0 |
10 |
0 |
0 |
StablePorToAonRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
1711728 |
9301 |
0 |
0 |
T1 |
4220 |
18 |
0 |
0 |
T2 |
566 |
1 |
0 |
0 |
T3 |
39456 |
133 |
0 |
0 |
T4 |
531 |
2 |
0 |
0 |
T5 |
720 |
1 |
0 |
0 |
T6 |
4271 |
16 |
0 |
0 |
T7 |
354 |
1 |
0 |
0 |
T8 |
2757 |
17 |
0 |
0 |
T9 |
335 |
2 |
0 |
0 |
T10 |
239 |
1 |
0 |
0 |
g_power_domains[0].CascadeLcToSysAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[0].CascadeLcToSysAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[0].CascadeLocalRstToLcAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[0].CascadeLocalRstToLcAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[0].gen_sys_io_div4_chk.CascadeSysToSysIoDiv4AboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
13560952 |
22511 |
0 |
0 |
T1 |
33104 |
53 |
0 |
0 |
T2 |
4541 |
12 |
0 |
0 |
T3 |
312267 |
378 |
0 |
0 |
T4 |
4267 |
6 |
0 |
0 |
T5 |
5772 |
18 |
0 |
0 |
T6 |
33795 |
48 |
0 |
0 |
T7 |
2847 |
12 |
0 |
0 |
T8 |
21454 |
60 |
0 |
0 |
T9 |
2690 |
6 |
0 |
0 |
T10 |
1930 |
1 |
0 |
0 |
g_power_domains[0].gen_sys_io_div4_chk.CascadeSysToSysIoDiv4AboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
13560952 |
22511 |
0 |
0 |
T1 |
33104 |
53 |
0 |
0 |
T2 |
4541 |
12 |
0 |
0 |
T3 |
312267 |
378 |
0 |
0 |
T4 |
4267 |
6 |
0 |
0 |
T5 |
5772 |
18 |
0 |
0 |
T6 |
33795 |
48 |
0 |
0 |
T7 |
2847 |
12 |
0 |
0 |
T8 |
21454 |
60 |
0 |
0 |
T9 |
2690 |
6 |
0 |
0 |
T10 |
1930 |
1 |
0 |
0 |
g_power_domains[1].CascadeLcToSysAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[1].CascadeLcToSysAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[1].CascadeLocalRstToLcAboveFall_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |
g_power_domains[1].CascadeLocalRstToLcAboveRise_A
Name | Attempts | Real Successes | Failures | Incomplete |
Total |
12028542 |
22511 |
0 |
0 |
T1 |
28231 |
53 |
0 |
0 |
T2 |
3907 |
12 |
0 |
0 |
T3 |
280593 |
378 |
0 |
0 |
T4 |
4073 |
6 |
0 |
0 |
T5 |
4589 |
18 |
0 |
0 |
T6 |
29739 |
48 |
0 |
0 |
T7 |
2046 |
12 |
0 |
0 |
T8 |
15919 |
60 |
0 |
0 |
T9 |
2548 |
6 |
0 |
0 |
T10 |
1864 |
1 |
0 |
0 |