Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
74.46 90.63 76.51 86.01 58.97 77.17 98.42 33.50


Total tests in report: 281
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
48.37 48.37 80.72 80.72 45.47 45.47 29.82 29.82 33.33 33.33 56.17 56.17 91.76 91.76 1.30 1.30 /workspace/coverage/default/22.rv_dm_alert_test.212052090
61.21 12.85 87.97 7.25 61.54 16.07 57.79 27.98 51.28 17.95 70.50 14.33 93.45 1.69 5.95 4.65 /workspace/coverage/default/43.rv_dm_stress_all.4188293950
66.04 4.83 88.32 0.35 67.03 5.49 69.74 11.95 51.28 0.00 72.17 1.67 94.19 0.74 19.56 13.61 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.1766164563
68.58 2.54 88.62 0.30 68.27 1.24 70.54 0.80 56.41 5.13 73.00 0.83 94.19 0.00 29.01 9.45 /workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.4070837412
69.98 1.40 90.08 1.46 72.66 4.40 71.18 0.64 57.69 1.28 75.00 2.00 94.19 0.00 29.01 0.00 /workspace/coverage/default/31.rv_dm_stress_all.2096213271
70.95 0.98 90.18 0.10 73.35 0.69 76.98 5.80 57.69 0.00 75.00 0.00 94.30 0.11 29.18 0.16 /workspace/coverage/default/1.rv_dm_sec_cm.1623095032
71.84 0.89 90.18 0.00 73.90 0.55 80.58 3.60 57.69 0.00 75.17 0.17 95.88 1.58 29.50 0.33 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.3892698699
72.46 0.62 90.18 0.00 74.45 0.55 80.90 0.32 57.69 0.00 75.33 0.17 96.41 0.53 32.27 2.77 /workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.3284526523
72.88 0.41 90.33 0.15 75.41 0.96 80.90 0.00 58.97 1.28 75.83 0.50 96.41 0.00 32.27 0.00 /workspace/coverage/default/25.rv_dm_stress_all.3442600930
73.14 0.27 90.33 0.00 75.41 0.00 80.90 0.00 58.97 0.00 75.83 0.00 98.20 1.80 32.36 0.08 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2048522769
73.39 0.25 90.33 0.00 75.41 0.00 82.61 1.72 58.97 0.00 75.83 0.00 98.20 0.00 32.36 0.00 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.1974259829
73.54 0.15 90.33 0.00 75.69 0.27 83.21 0.60 58.97 0.00 75.83 0.00 98.20 0.00 32.52 0.16 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3639574620
73.65 0.11 90.33 0.00 75.69 0.00 83.97 0.76 58.97 0.00 75.83 0.00 98.20 0.00 32.52 0.00 /workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.736382924
73.75 0.11 90.43 0.10 75.82 0.14 83.97 0.00 58.97 0.00 76.33 0.50 98.20 0.00 32.52 0.00 /workspace/coverage/default/0.rv_dm_rom_read_access.344580008
73.84 0.09 90.48 0.05 76.24 0.41 83.97 0.00 58.97 0.00 76.50 0.17 98.20 0.00 32.52 0.00 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1207211921
73.92 0.08 90.48 0.00 76.24 0.00 83.97 0.00 58.97 0.00 76.50 0.00 98.20 0.00 33.09 0.57 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.4151739094
73.99 0.07 90.48 0.00 76.37 0.14 84.33 0.36 58.97 0.00 76.50 0.00 98.20 0.00 33.09 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2158940440
74.06 0.07 90.48 0.00 76.37 0.00 84.81 0.48 58.97 0.00 76.50 0.00 98.20 0.00 33.09 0.00 /workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.88325557
74.12 0.06 90.58 0.10 76.37 0.00 84.81 0.00 58.97 0.00 76.83 0.33 98.20 0.00 33.09 0.00 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.2939301432
74.18 0.05 90.58 0.00 76.37 0.00 85.17 0.36 58.97 0.00 76.83 0.00 98.20 0.00 33.09 0.00 /workspace/coverage/cover_reg_top/24.rv_dm_tap_fsm_rand_reset.2584259558
74.23 0.05 90.63 0.05 76.51 0.14 85.17 0.00 58.97 0.00 77.00 0.17 98.20 0.00 33.09 0.00 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.1069982916
74.26 0.04 90.63 0.00 76.51 0.00 85.21 0.04 58.97 0.00 77.00 0.00 98.42 0.21 33.09 0.00 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.3933140489
74.30 0.04 90.63 0.00 76.51 0.00 85.29 0.08 58.97 0.00 77.17 0.17 98.42 0.00 33.09 0.00 /workspace/coverage/default/28.rv_dm_alert_test.2030836286
74.33 0.03 90.63 0.00 76.51 0.00 85.29 0.00 58.97 0.00 77.17 0.00 98.42 0.00 33.33 0.24 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.3184439282
74.37 0.03 90.63 0.00 76.51 0.00 85.53 0.24 58.97 0.00 77.17 0.00 98.42 0.00 33.33 0.00 /workspace/coverage/cover_reg_top/34.rv_dm_tap_fsm_rand_reset.1743745169
74.39 0.02 90.63 0.00 76.51 0.00 85.61 0.08 58.97 0.00 77.17 0.00 98.42 0.00 33.41 0.08 /workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.197765264
74.41 0.02 90.63 0.00 76.51 0.00 85.77 0.16 58.97 0.00 77.17 0.00 98.42 0.00 33.41 0.00 /workspace/coverage/default/24.rv_dm_stress_all.653817827
74.42 0.01 90.63 0.00 76.51 0.00 85.77 0.00 58.97 0.00 77.17 0.00 98.42 0.00 33.50 0.08 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1355971829
74.44 0.01 90.63 0.00 76.51 0.00 85.85 0.08 58.97 0.00 77.17 0.00 98.42 0.00 33.50 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_hw_reset.3384289030
74.45 0.01 90.63 0.00 76.51 0.00 85.93 0.08 58.97 0.00 77.17 0.00 98.42 0.00 33.50 0.00 /workspace/coverage/default/49.rv_dm_stress_all.3829428228
74.45 0.01 90.63 0.00 76.51 0.00 85.97 0.04 58.97 0.00 77.17 0.00 98.42 0.00 33.50 0.00 /workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.2981245475
74.46 0.01 90.63 0.00 76.51 0.00 86.01 0.04 58.97 0.00 77.17 0.00 98.42 0.00 33.50 0.00 /workspace/coverage/default/32.rv_dm_alert_test.2665735059

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.1862570480
/workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.27638645
/workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.1017286888
/workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.3926110411
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.2142218671
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.1865780063
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.3918133978
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2413702910
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_bit_bash.3025180831
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_hw_reset.2852520320
/workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_rw.3828542716
/workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.2294089351
/workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.4096708448
/workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3636907292
/workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.3616236412
/workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.294067383
/workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.3131251508
/workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.1954771660
/workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.853277577
/workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.20520770
/workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2714380658
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.2480996944
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_bit_bash.3719258060
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.2696512237
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3111296336
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1716709353
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.2675089706
/workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.1029546347
/workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1881139409
/workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.1589925026
/workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.1028400089
/workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2542135497
/workspace/coverage/cover_reg_top/1.rv_dm_tl_intg_err.3889217622
/workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.2625390612
/workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.1532021303
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.1595413015
/workspace/coverage/cover_reg_top/10.rv_dm_jtag_dtm_csr_rw.2532025858
/workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.1305650377
/workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.4248502909
/workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.1468152647
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.1446338542
/workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3072020240
/workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.2719984929
/workspace/coverage/cover_reg_top/11.rv_dm_tl_errors.3264530427
/workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.2507794989
/workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.3731674193
/workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2209881835
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2190241991
/workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.3275386733
/workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.2961260600
/workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.3768147762
/workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.433178225
/workspace/coverage/cover_reg_top/13.rv_dm_csr_mem_rw_with_rand_reset.1878004085
/workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.1641740543
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.2917006147
/workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.3739238937
/workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.1860341958
/workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.1547012453
/workspace/coverage/cover_reg_top/14.rv_dm_csr_rw.3957043488
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.166148627
/workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.1486431211
/workspace/coverage/cover_reg_top/14.rv_dm_same_csr_outstanding.1934763542
/workspace/coverage/cover_reg_top/14.rv_dm_tl_errors.381545097
/workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.1985110100
/workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.1243421418
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3723720048
/workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1959176112
/workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3648505507
/workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.429882280
/workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.3686714980
/workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.3816310501
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.1185104695
/workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1192625913
/workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.3686667907
/workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.3328707728
/workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.4043838672
/workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.2974474035
/workspace/coverage/cover_reg_top/17.rv_dm_csr_mem_rw_with_rand_reset.1883099333
/workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.2744384923
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dmi_csr_rw.1117679383
/workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.3601789396
/workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.1758118946
/workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.2448996103
/workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3932272040
/workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.3567527392
/workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.627883544
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.3962715615
/workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.920118860
/workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.533556653
/workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.889102479
/workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.419501058
/workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.764796938
/workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3416176133
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.1537115300
/workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.1057100250
/workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.1525483474
/workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.3370473357
/workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.3809912826
/workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1172428592
/workspace/coverage/cover_reg_top/2.rv_dm_csr_bit_bash.1640884777
/workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3494741651
/workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.1091847176
/workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.573757971
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.1452510727
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.4089199785
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_hw_reset.3202989857
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.1220105268
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.4084814076
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.49924585
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.1488717745
/workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1174998708
/workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2114230545
/workspace/coverage/cover_reg_top/2.rv_dm_mem_walk.3084616153
/workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.3325593754
/workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2859987514
/workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.4019460633
/workspace/coverage/cover_reg_top/21.rv_dm_tap_fsm_rand_reset.1180762115
/workspace/coverage/cover_reg_top/22.rv_dm_tap_fsm_rand_reset.388906190
/workspace/coverage/cover_reg_top/23.rv_dm_tap_fsm_rand_reset.1680632006
/workspace/coverage/cover_reg_top/29.rv_dm_tap_fsm_rand_reset.1834249681
/workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.884708457
/workspace/coverage/cover_reg_top/3.rv_dm_csr_bit_bash.2813371814
/workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.2109095465
/workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2356566933
/workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.2229511708
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.1864694939
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_hw_reset.3486845984
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.39227990
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.2053072402
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_bit_bash.1977014139
/workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.2442890971
/workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.2392431942
/workspace/coverage/cover_reg_top/3.rv_dm_mem_walk.2168683187
/workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.3951963391
/workspace/coverage/cover_reg_top/3.rv_dm_tl_errors.3922826350
/workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.2653349412
/workspace/coverage/cover_reg_top/36.rv_dm_tap_fsm_rand_reset.2992010262
/workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.339443202
/workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.3799732362
/workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2509624004
/workspace/coverage/cover_reg_top/4.rv_dm_csr_mem_rw_with_rand_reset.315710822
/workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.4158808223
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.2229466493
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.242816897
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.3753415999
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.2219384358
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1479758291
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.1554781800
/workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1892132184
/workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.4002912116
/workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3982945975
/workspace/coverage/cover_reg_top/4.rv_dm_same_csr_outstanding.2172629063
/workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.1367790744
/workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.866545395
/workspace/coverage/cover_reg_top/5.rv_dm_csr_mem_rw_with_rand_reset.1044316853
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.1163608223
/workspace/coverage/cover_reg_top/5.rv_dm_jtag_dtm_csr_rw.346011815
/workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3163691282
/workspace/coverage/cover_reg_top/5.rv_dm_tap_fsm_rand_reset.240588108
/workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.3727403827
/workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.1260747204
/workspace/coverage/cover_reg_top/6.rv_dm_csr_rw.1011003053
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.1330094818
/workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.3707756630
/workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.744634248
/workspace/coverage/cover_reg_top/6.rv_dm_tl_errors.1024058171
/workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.1569936417
/workspace/coverage/cover_reg_top/7.rv_dm_csr_mem_rw_with_rand_reset.3627082379
/workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.2537920496
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.1808733524
/workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.3116249366
/workspace/coverage/cover_reg_top/7.rv_dm_same_csr_outstanding.2015639244
/workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.1133849824
/workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.2076211600
/workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3345788989
/workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.2906720657
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.1411952957
/workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.269402051
/workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.895909471
/workspace/coverage/cover_reg_top/8.rv_dm_tap_fsm_rand_reset.2093786328
/workspace/coverage/cover_reg_top/8.rv_dm_tl_errors.1854581774
/workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.2395462172
/workspace/coverage/cover_reg_top/9.rv_dm_csr_mem_rw_with_rand_reset.3882137950
/workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.2792473482
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dmi_csr_rw.2602711558
/workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.4281857519
/workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.2324458243
/workspace/coverage/cover_reg_top/9.rv_dm_tap_fsm_rand_reset.3758172124
/workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.280689633
/workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.4201753827
/workspace/coverage/default/0.rv_dm_alert_test.48416018
/workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2671682282
/workspace/coverage/default/0.rv_dm_sec_cm.815405412
/workspace/coverage/default/0.rv_dm_smoke.1520837355
/workspace/coverage/default/0.rv_dm_stress_all.2329972754
/workspace/coverage/default/0.rv_dm_tap_fsm.4270589926
/workspace/coverage/default/1.rv_dm_alert_test.3331109159
/workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.1207789779
/workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.1122730227
/workspace/coverage/default/1.rv_dm_rom_read_access.583413995
/workspace/coverage/default/10.rv_dm_alert_test.315253991
/workspace/coverage/default/11.rv_dm_alert_test.4289555386
/workspace/coverage/default/12.rv_dm_alert_test.2957470164
/workspace/coverage/default/13.rv_dm_alert_test.2364659836
/workspace/coverage/default/14.rv_dm_alert_test.3621569620
/workspace/coverage/default/15.rv_dm_alert_test.66137673
/workspace/coverage/default/16.rv_dm_alert_test.2016359975
/workspace/coverage/default/17.rv_dm_alert_test.1573449095
/workspace/coverage/default/18.rv_dm_alert_test.501064573
/workspace/coverage/default/19.rv_dm_alert_test.2506527983
/workspace/coverage/default/2.rv_dm_alert_test.3393840647
/workspace/coverage/default/2.rv_dm_sec_cm.1855786293
/workspace/coverage/default/20.rv_dm_alert_test.2850538626
/workspace/coverage/default/21.rv_dm_alert_test.2422163546
/workspace/coverage/default/23.rv_dm_alert_test.712893691
/workspace/coverage/default/24.rv_dm_alert_test.2962386778
/workspace/coverage/default/25.rv_dm_alert_test.2040044319
/workspace/coverage/default/26.rv_dm_alert_test.205728619
/workspace/coverage/default/27.rv_dm_alert_test.1137821933
/workspace/coverage/default/29.rv_dm_alert_test.832154903
/workspace/coverage/default/3.rv_dm_alert_test.2629052236
/workspace/coverage/default/3.rv_dm_sec_cm.261416615
/workspace/coverage/default/30.rv_dm_alert_test.1208126506
/workspace/coverage/default/31.rv_dm_alert_test.244042548
/workspace/coverage/default/33.rv_dm_alert_test.878622386
/workspace/coverage/default/33.rv_dm_stress_all.1709210219
/workspace/coverage/default/34.rv_dm_alert_test.222725289
/workspace/coverage/default/35.rv_dm_alert_test.1537400224
/workspace/coverage/default/36.rv_dm_alert_test.3979183412
/workspace/coverage/default/37.rv_dm_alert_test.2286584412
/workspace/coverage/default/38.rv_dm_alert_test.2853081970
/workspace/coverage/default/39.rv_dm_alert_test.1682273223
/workspace/coverage/default/4.rv_dm_alert_test.847368546
/workspace/coverage/default/4.rv_dm_sec_cm.746906055
/workspace/coverage/default/40.rv_dm_alert_test.1999438674
/workspace/coverage/default/41.rv_dm_alert_test.1011848307
/workspace/coverage/default/42.rv_dm_alert_test.3246083454
/workspace/coverage/default/43.rv_dm_alert_test.2976776754
/workspace/coverage/default/44.rv_dm_alert_test.3037199862
/workspace/coverage/default/45.rv_dm_alert_test.1962716371
/workspace/coverage/default/46.rv_dm_alert_test.2083089197
/workspace/coverage/default/47.rv_dm_alert_test.4229907730
/workspace/coverage/default/48.rv_dm_alert_test.2692374905
/workspace/coverage/default/49.rv_dm_alert_test.1748252140
/workspace/coverage/default/5.rv_dm_alert_test.3264089921
/workspace/coverage/default/6.rv_dm_alert_test.2966253332
/workspace/coverage/default/7.rv_dm_alert_test.1958388052
/workspace/coverage/default/8.rv_dm_alert_test.2178475752
/workspace/coverage/default/9.rv_dm_alert_test.629021038



Total test records in report: 281
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/25.rv_dm_alert_test.2040044319 May 16 12:58:24 PM PDT 24 May 16 12:58:54 PM PDT 24 91342991 ps
T2 /workspace/coverage/default/26.rv_dm_alert_test.205728619 May 16 12:58:23 PM PDT 24 May 16 12:58:53 PM PDT 24 56470998 ps
T3 /workspace/coverage/default/5.rv_dm_alert_test.3264089921 May 16 12:58:04 PM PDT 24 May 16 12:58:30 PM PDT 24 29709213 ps
T4 /workspace/coverage/default/22.rv_dm_alert_test.212052090 May 16 12:58:19 PM PDT 24 May 16 12:58:48 PM PDT 24 213633512 ps
T16 /workspace/coverage/default/2.rv_dm_alert_test.3393840647 May 16 12:57:57 PM PDT 24 May 16 12:58:20 PM PDT 24 20310564 ps
T14 /workspace/coverage/default/33.rv_dm_alert_test.878622386 May 16 12:58:31 PM PDT 24 May 16 12:59:03 PM PDT 24 47548949 ps
T17 /workspace/coverage/default/7.rv_dm_alert_test.1958388052 May 16 12:58:19 PM PDT 24 May 16 12:58:48 PM PDT 24 33669989 ps
T5 /workspace/coverage/default/1.rv_dm_rom_read_access.583413995 May 16 12:58:02 PM PDT 24 May 16 12:58:27 PM PDT 24 19790261 ps
T12 /workspace/coverage/default/0.rv_dm_jtag_dtm_idle_hint.2671682282 May 16 12:57:46 PM PDT 24 May 16 12:58:13 PM PDT 24 39739665 ps
T13 /workspace/coverage/default/0.rv_dm_rom_read_access.344580008 May 16 12:57:45 PM PDT 24 May 16 12:58:12 PM PDT 24 37100519 ps
T6 /workspace/coverage/default/25.rv_dm_stress_all.3442600930 May 16 12:58:24 PM PDT 24 May 16 12:59:01 PM PDT 24 2300129283 ps
T27 /workspace/coverage/default/48.rv_dm_alert_test.2692374905 May 16 12:58:39 PM PDT 24 May 16 12:59:12 PM PDT 24 32045969 ps
T9 /workspace/coverage/default/43.rv_dm_stress_all.4188293950 May 16 12:58:32 PM PDT 24 May 16 12:59:06 PM PDT 24 3914754124 ps
T41 /workspace/coverage/default/0.rv_dm_alert_test.48416018 May 16 12:57:56 PM PDT 24 May 16 12:58:20 PM PDT 24 24824563 ps
T18 /workspace/coverage/default/1.rv_dm_sec_cm.1623095032 May 16 12:57:59 PM PDT 24 May 16 12:58:23 PM PDT 24 416830910 ps
T48 /workspace/coverage/default/9.rv_dm_alert_test.629021038 May 16 12:58:06 PM PDT 24 May 16 12:58:31 PM PDT 24 20172266 ps
T49 /workspace/coverage/default/4.rv_dm_alert_test.847368546 May 16 12:58:02 PM PDT 24 May 16 12:58:27 PM PDT 24 24997808 ps
T50 /workspace/coverage/default/28.rv_dm_alert_test.2030836286 May 16 12:58:31 PM PDT 24 May 16 12:59:03 PM PDT 24 29630652 ps
T42 /workspace/coverage/default/44.rv_dm_alert_test.3037199862 May 16 12:58:35 PM PDT 24 May 16 12:59:08 PM PDT 24 20798648 ps
T10 /workspace/coverage/default/0.rv_dm_stress_all.2329972754 May 16 12:57:46 PM PDT 24 May 16 12:58:23 PM PDT 24 5041735929 ps
T51 /workspace/coverage/default/35.rv_dm_alert_test.1537400224 May 16 12:58:31 PM PDT 24 May 16 12:59:02 PM PDT 24 47006770 ps
T7 /workspace/coverage/default/1.rv_dm_progbuf_read_write_execute.1122730227 May 16 12:58:03 PM PDT 24 May 16 12:58:28 PM PDT 24 120962200 ps
T19 /workspace/coverage/default/0.rv_dm_sec_cm.815405412 May 16 12:57:56 PM PDT 24 May 16 12:58:20 PM PDT 24 125488700 ps
T43 /workspace/coverage/default/49.rv_dm_alert_test.1748252140 May 16 12:58:39 PM PDT 24 May 16 12:59:12 PM PDT 24 69892199 ps
T121 /workspace/coverage/default/3.rv_dm_alert_test.2629052236 May 16 12:57:59 PM PDT 24 May 16 12:58:23 PM PDT 24 58291084 ps
T142 /workspace/coverage/default/11.rv_dm_alert_test.4289555386 May 16 12:58:16 PM PDT 24 May 16 12:58:44 PM PDT 24 44638027 ps
T44 /workspace/coverage/default/20.rv_dm_alert_test.2850538626 May 16 12:58:32 PM PDT 24 May 16 12:59:04 PM PDT 24 23420578 ps
T8 /workspace/coverage/default/49.rv_dm_stress_all.3829428228 May 16 12:58:36 PM PDT 24 May 16 12:59:16 PM PDT 24 3044131627 ps
T122 /workspace/coverage/default/15.rv_dm_alert_test.66137673 May 16 12:58:18 PM PDT 24 May 16 12:58:46 PM PDT 24 28712467 ps
T143 /workspace/coverage/default/24.rv_dm_alert_test.2962386778 May 16 12:58:29 PM PDT 24 May 16 12:58:59 PM PDT 24 33570522 ps
T45 /workspace/coverage/default/46.rv_dm_alert_test.2083089197 May 16 12:58:33 PM PDT 24 May 16 12:59:05 PM PDT 24 27399719 ps
T137 /workspace/coverage/default/37.rv_dm_alert_test.2286584412 May 16 12:58:32 PM PDT 24 May 16 12:59:04 PM PDT 24 39391418 ps
T23 /workspace/coverage/default/0.rv_dm_tap_fsm.4270589926 May 16 12:57:47 PM PDT 24 May 16 12:58:17 PM PDT 24 1312925554 ps
T135 /workspace/coverage/default/21.rv_dm_alert_test.2422163546 May 16 12:58:20 PM PDT 24 May 16 12:58:50 PM PDT 24 23853057 ps
T26 /workspace/coverage/default/24.rv_dm_stress_all.653817827 May 16 12:58:30 PM PDT 24 May 16 12:59:06 PM PDT 24 3867323841 ps
T129 /workspace/coverage/default/14.rv_dm_alert_test.3621569620 May 16 12:58:20 PM PDT 24 May 16 12:58:49 PM PDT 24 43606079 ps
T144 /workspace/coverage/default/41.rv_dm_alert_test.1011848307 May 16 12:58:31 PM PDT 24 May 16 12:59:01 PM PDT 24 21093315 ps
T120 /workspace/coverage/default/38.rv_dm_alert_test.2853081970 May 16 12:58:33 PM PDT 24 May 16 12:59:04 PM PDT 24 56571838 ps
T119 /workspace/coverage/default/12.rv_dm_alert_test.2957470164 May 16 12:58:14 PM PDT 24 May 16 12:58:40 PM PDT 24 27501274 ps
T145 /workspace/coverage/default/1.rv_dm_jtag_dtm_idle_hint.1207789779 May 16 12:57:58 PM PDT 24 May 16 12:58:21 PM PDT 24 131756506 ps
T140 /workspace/coverage/default/16.rv_dm_alert_test.2016359975 May 16 12:58:28 PM PDT 24 May 16 12:58:58 PM PDT 24 14751757 ps
T139 /workspace/coverage/default/31.rv_dm_alert_test.244042548 May 16 12:58:29 PM PDT 24 May 16 12:58:58 PM PDT 24 33745269 ps
T128 /workspace/coverage/default/27.rv_dm_alert_test.1137821933 May 16 12:58:30 PM PDT 24 May 16 12:59:00 PM PDT 24 146377940 ps
T132 /workspace/coverage/default/34.rv_dm_alert_test.222725289 May 16 12:58:36 PM PDT 24 May 16 12:59:09 PM PDT 24 97612008 ps
T146 /workspace/coverage/default/18.rv_dm_alert_test.501064573 May 16 12:58:24 PM PDT 24 May 16 12:58:53 PM PDT 24 19101841 ps
T147 /workspace/coverage/default/0.rv_dm_smoke.1520837355 May 16 12:57:45 PM PDT 24 May 16 12:58:13 PM PDT 24 275047668 ps
T136 /workspace/coverage/default/17.rv_dm_alert_test.1573449095 May 16 12:58:20 PM PDT 24 May 16 12:58:50 PM PDT 24 98570980 ps
T20 /workspace/coverage/default/2.rv_dm_sec_cm.1855786293 May 16 12:57:56 PM PDT 24 May 16 12:58:20 PM PDT 24 197662571 ps
T118 /workspace/coverage/default/39.rv_dm_alert_test.1682273223 May 16 12:58:29 PM PDT 24 May 16 12:58:58 PM PDT 24 42525445 ps
T130 /workspace/coverage/default/8.rv_dm_alert_test.2178475752 May 16 12:58:14 PM PDT 24 May 16 12:58:40 PM PDT 24 18319763 ps
T60 /workspace/coverage/default/32.rv_dm_alert_test.2665735059 May 16 12:58:30 PM PDT 24 May 16 12:59:00 PM PDT 24 53895086 ps
T134 /workspace/coverage/default/23.rv_dm_alert_test.712893691 May 16 12:58:21 PM PDT 24 May 16 12:58:51 PM PDT 24 38341623 ps
T141 /workspace/coverage/default/45.rv_dm_alert_test.1962716371 May 16 12:58:30 PM PDT 24 May 16 12:59:01 PM PDT 24 20267820 ps
T148 /workspace/coverage/default/10.rv_dm_alert_test.315253991 May 16 12:58:15 PM PDT 24 May 16 12:58:43 PM PDT 24 19966368 ps
T138 /workspace/coverage/default/36.rv_dm_alert_test.3979183412 May 16 12:58:31 PM PDT 24 May 16 12:59:03 PM PDT 24 28630665 ps
T21 /workspace/coverage/default/33.rv_dm_stress_all.1709210219 May 16 12:58:30 PM PDT 24 May 16 12:59:09 PM PDT 24 2700185476 ps
T11 /workspace/coverage/default/31.rv_dm_stress_all.2096213271 May 16 12:58:35 PM PDT 24 May 16 12:59:19 PM PDT 24 5855460471 ps
T125 /workspace/coverage/default/30.rv_dm_alert_test.1208126506 May 16 12:58:30 PM PDT 24 May 16 12:59:00 PM PDT 24 50596511 ps
T149 /workspace/coverage/default/40.rv_dm_alert_test.1999438674 May 16 12:58:31 PM PDT 24 May 16 12:59:03 PM PDT 24 49122328 ps
T126 /workspace/coverage/default/13.rv_dm_alert_test.2364659836 May 16 12:58:16 PM PDT 24 May 16 12:58:44 PM PDT 24 23774964 ps
T150 /workspace/coverage/default/43.rv_dm_alert_test.2976776754 May 16 12:58:36 PM PDT 24 May 16 12:59:09 PM PDT 24 38159518 ps
T151 /workspace/coverage/default/6.rv_dm_alert_test.2966253332 May 16 12:58:17 PM PDT 24 May 16 12:58:46 PM PDT 24 18379042 ps
T124 /workspace/coverage/default/19.rv_dm_alert_test.2506527983 May 16 12:58:28 PM PDT 24 May 16 12:58:58 PM PDT 24 25025846 ps
T46 /workspace/coverage/default/4.rv_dm_sec_cm.746906055 May 16 12:58:01 PM PDT 24 May 16 12:58:26 PM PDT 24 168304523 ps
T123 /workspace/coverage/default/29.rv_dm_alert_test.832154903 May 16 12:58:29 PM PDT 24 May 16 12:58:59 PM PDT 24 44628427 ps
T127 /workspace/coverage/default/47.rv_dm_alert_test.4229907730 May 16 12:58:37 PM PDT 24 May 16 12:59:10 PM PDT 24 58597085 ps
T47 /workspace/coverage/default/3.rv_dm_sec_cm.261416615 May 16 12:57:57 PM PDT 24 May 16 12:58:21 PM PDT 24 400315231 ps
T131 /workspace/coverage/default/1.rv_dm_alert_test.3331109159 May 16 12:57:56 PM PDT 24 May 16 12:58:20 PM PDT 24 29742956 ps
T15 /workspace/coverage/default/0.rv_dm_progbuf_read_write_execute.2939301432 May 16 12:57:48 PM PDT 24 May 16 12:58:14 PM PDT 24 150400000 ps
T133 /workspace/coverage/default/42.rv_dm_alert_test.3246083454 May 16 12:58:36 PM PDT 24 May 16 12:59:09 PM PDT 24 172479499 ps
T31 /workspace/coverage/cover_reg_top/13.rv_dm_tl_errors.1547012453 May 16 12:57:16 PM PDT 24 May 16 12:57:53 PM PDT 24 1655145808 ps
T28 /workspace/coverage/cover_reg_top/13.rv_dm_tl_intg_err.1766164563 May 16 12:57:15 PM PDT 24 May 16 12:57:56 PM PDT 24 795874948 ps
T29 /workspace/coverage/cover_reg_top/17.rv_dm_tl_intg_err.3932272040 May 16 12:57:27 PM PDT 24 May 16 12:58:06 PM PDT 24 392184523 ps
T152 /workspace/coverage/cover_reg_top/4.rv_dm_mem_walk.3982945975 May 16 12:57:13 PM PDT 24 May 16 12:57:45 PM PDT 24 23141112 ps
T30 /workspace/coverage/cover_reg_top/10.rv_dm_csr_mem_rw_with_rand_reset.2625390612 May 16 12:57:15 PM PDT 24 May 16 12:57:49 PM PDT 24 82148616 ps
T64 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dtm_csr_rw.3707756630 May 16 12:57:07 PM PDT 24 May 16 12:57:42 PM PDT 24 56938679 ps
T72 /workspace/coverage/cover_reg_top/2.rv_dm_csr_hw_reset.3494741651 May 16 12:56:58 PM PDT 24 May 16 12:57:32 PM PDT 24 259953326 ps
T73 /workspace/coverage/cover_reg_top/5.rv_dm_same_csr_outstanding.3163691282 May 16 12:57:09 PM PDT 24 May 16 12:57:48 PM PDT 24 285576283 ps
T22 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_hw_reset.1488717745 May 16 12:57:01 PM PDT 24 May 16 12:57:34 PM PDT 24 180672346 ps
T39 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_aliasing.1864694939 May 16 12:56:59 PM PDT 24 May 16 12:58:09 PM PDT 24 19680660028 ps
T65 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_aliasing.2219384358 May 16 12:57:00 PM PDT 24 May 16 12:57:33 PM PDT 24 71578852 ps
T66 /workspace/coverage/cover_reg_top/2.rv_dm_tl_errors.2859987514 May 16 12:56:58 PM PDT 24 May 16 12:57:33 PM PDT 24 1617464879 ps
T40 /workspace/coverage/cover_reg_top/6.rv_dm_jtag_dmi_csr_rw.1330094818 May 16 12:57:08 PM PDT 24 May 16 12:57:42 PM PDT 24 524053477 ps
T67 /workspace/coverage/cover_reg_top/4.rv_dm_tl_errors.1367790744 May 16 12:57:06 PM PDT 24 May 16 12:57:44 PM PDT 24 70128312 ps
T68 /workspace/coverage/cover_reg_top/18.rv_dm_csr_mem_rw_with_rand_reset.3567527392 May 16 12:57:29 PM PDT 24 May 16 12:58:03 PM PDT 24 117409983 ps
T153 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_aliasing.4084814076 May 16 12:56:59 PM PDT 24 May 16 12:57:33 PM PDT 24 169221837 ps
T154 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_rw.1892132184 May 16 12:57:00 PM PDT 24 May 16 12:57:32 PM PDT 24 61673762 ps
T69 /workspace/coverage/cover_reg_top/16.rv_dm_tl_errors.4043838672 May 16 12:57:29 PM PDT 24 May 16 12:58:01 PM PDT 24 168159470 ps
T36 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_hw_reset.2158940440 May 16 12:56:51 PM PDT 24 May 16 12:57:25 PM PDT 24 1902384135 ps
T70 /workspace/coverage/cover_reg_top/7.rv_dm_tl_errors.1133849824 May 16 12:57:04 PM PDT 24 May 16 12:57:43 PM PDT 24 118805699 ps
T71 /workspace/coverage/cover_reg_top/5.rv_dm_tl_intg_err.4151739094 May 16 12:57:08 PM PDT 24 May 16 12:57:59 PM PDT 24 1691844589 ps
T74 /workspace/coverage/cover_reg_top/9.rv_dm_csr_rw.2792473482 May 16 12:57:18 PM PDT 24 May 16 12:57:51 PM PDT 24 158343792 ps
T75 /workspace/coverage/cover_reg_top/0.rv_dm_csr_aliasing.2048522769 May 16 12:56:51 PM PDT 24 May 16 12:57:55 PM PDT 24 4708740552 ps
T62 /workspace/coverage/cover_reg_top/18.rv_dm_tap_fsm_rand_reset.3284526523 May 16 12:57:28 PM PDT 24 May 16 12:58:28 PM PDT 24 21724288433 ps
T82 /workspace/coverage/cover_reg_top/2.rv_dm_csr_mem_rw_with_rand_reset.1091847176 May 16 12:57:01 PM PDT 24 May 16 12:57:39 PM PDT 24 5952424122 ps
T76 /workspace/coverage/cover_reg_top/18.rv_dm_csr_rw.627883544 May 16 12:57:27 PM PDT 24 May 16 12:58:00 PM PDT 24 66359360 ps
T83 /workspace/coverage/cover_reg_top/17.rv_dm_tl_errors.2448996103 May 16 12:57:34 PM PDT 24 May 16 12:58:06 PM PDT 24 114222058 ps
T37 /workspace/coverage/cover_reg_top/14.rv_dm_jtag_dmi_csr_rw.166148627 May 16 12:57:27 PM PDT 24 May 16 12:58:07 PM PDT 24 2729755413 ps
T63 /workspace/coverage/cover_reg_top/26.rv_dm_tap_fsm_rand_reset.4070837412 May 16 12:57:45 PM PDT 24 May 16 12:58:53 PM PDT 24 10862150819 ps
T155 /workspace/coverage/cover_reg_top/1.rv_dm_tl_errors.2542135497 May 16 12:56:47 PM PDT 24 May 16 12:57:25 PM PDT 24 201492768 ps
T55 /workspace/coverage/cover_reg_top/7.rv_dm_tl_intg_err.2076211600 May 16 12:57:07 PM PDT 24 May 16 12:57:51 PM PDT 24 1133640996 ps
T156 /workspace/coverage/cover_reg_top/8.rv_dm_csr_mem_rw_with_rand_reset.3345788989 May 16 12:57:07 PM PDT 24 May 16 12:57:45 PM PDT 24 401877201 ps
T104 /workspace/coverage/cover_reg_top/8.rv_dm_tl_intg_err.2395462172 May 16 12:57:08 PM PDT 24 May 16 12:58:00 PM PDT 24 1703699674 ps
T56 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_rw.2696512237 May 16 12:56:50 PM PDT 24 May 16 12:57:24 PM PDT 24 267754530 ps
T157 /workspace/coverage/cover_reg_top/4.rv_dm_mem_partial_access.4002912116 May 16 12:57:07 PM PDT 24 May 16 12:57:41 PM PDT 24 27278042 ps
T77 /workspace/coverage/cover_reg_top/13.rv_dm_same_csr_outstanding.1860341958 May 16 12:57:28 PM PDT 24 May 16 12:58:02 PM PDT 24 219556481 ps
T53 /workspace/coverage/cover_reg_top/24.rv_dm_tap_fsm_rand_reset.2584259558 May 16 12:57:43 PM PDT 24 May 16 12:58:22 PM PDT 24 11587152572 ps
T158 /workspace/coverage/cover_reg_top/12.rv_dm_csr_mem_rw_with_rand_reset.3731674193 May 16 12:57:15 PM PDT 24 May 16 12:57:50 PM PDT 24 1907388854 ps
T159 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dtm_csr_rw.3072020240 May 16 12:57:16 PM PDT 24 May 16 12:57:49 PM PDT 24 23760409 ps
T78 /workspace/coverage/cover_reg_top/16.rv_dm_same_csr_outstanding.3686667907 May 16 12:57:27 PM PDT 24 May 16 12:58:01 PM PDT 24 82910743 ps
T160 /workspace/coverage/cover_reg_top/6.rv_dm_csr_mem_rw_with_rand_reset.1260747204 May 16 12:57:08 PM PDT 24 May 16 12:57:43 PM PDT 24 52279215 ps
T24 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_hw_reset.1207211921 May 16 12:56:58 PM PDT 24 May 16 12:57:32 PM PDT 24 185006486 ps
T79 /workspace/coverage/cover_reg_top/8.rv_dm_same_csr_outstanding.895909471 May 16 12:57:09 PM PDT 24 May 16 12:57:49 PM PDT 24 513321114 ps
T161 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dtm_csr_rw.920118860 May 16 12:57:30 PM PDT 24 May 16 12:58:00 PM PDT 24 98429382 ps
T117 /workspace/coverage/cover_reg_top/36.rv_dm_tap_fsm_rand_reset.2992010262 May 16 12:57:43 PM PDT 24 May 16 12:58:22 PM PDT 24 12785833212 ps
T80 /workspace/coverage/cover_reg_top/0.rv_dm_csr_rw.3926110411 May 16 12:56:48 PM PDT 24 May 16 12:57:22 PM PDT 24 108768350 ps
T162 /workspace/coverage/cover_reg_top/14.rv_dm_jtag_dtm_csr_rw.1486431211 May 16 12:57:28 PM PDT 24 May 16 12:57:59 PM PDT 24 55646228 ps
T81 /workspace/coverage/cover_reg_top/11.rv_dm_csr_rw.1468152647 May 16 12:57:19 PM PDT 24 May 16 12:57:51 PM PDT 24 577007306 ps
T163 /workspace/coverage/cover_reg_top/18.rv_dm_jtag_dmi_csr_rw.3962715615 May 16 12:57:30 PM PDT 24 May 16 12:58:02 PM PDT 24 1171623712 ps
T164 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dmi_csr_rw.2190241991 May 16 12:57:18 PM PDT 24 May 16 12:57:51 PM PDT 24 542102791 ps
T99 /workspace/coverage/cover_reg_top/12.rv_dm_same_csr_outstanding.2961260600 May 16 12:57:16 PM PDT 24 May 16 12:57:55 PM PDT 24 396324774 ps
T165 /workspace/coverage/cover_reg_top/17.rv_dm_csr_rw.2744384923 May 16 12:57:35 PM PDT 24 May 16 12:58:05 PM PDT 24 62446326 ps
T166 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dmi_csr_rw.1185104695 May 16 12:57:34 PM PDT 24 May 16 12:58:05 PM PDT 24 621050270 ps
T105 /workspace/coverage/cover_reg_top/3.rv_dm_csr_mem_rw_with_rand_reset.2356566933 May 16 12:57:00 PM PDT 24 May 16 12:57:39 PM PDT 24 3467746823 ps
T25 /workspace/coverage/cover_reg_top/5.rv_dm_csr_rw.1069982916 May 16 12:57:07 PM PDT 24 May 16 12:57:42 PM PDT 24 717003000 ps
T167 /workspace/coverage/cover_reg_top/17.rv_dm_jtag_dtm_csr_rw.3601789396 May 16 12:57:30 PM PDT 24 May 16 12:58:00 PM PDT 24 59034531 ps
T106 /workspace/coverage/cover_reg_top/2.rv_dm_tl_intg_err.4019460633 May 16 12:56:58 PM PDT 24 May 16 12:57:49 PM PDT 24 1341183563 ps
T84 /workspace/coverage/cover_reg_top/10.rv_dm_csr_rw.1532021303 May 16 12:57:15 PM PDT 24 May 16 12:57:49 PM PDT 24 212078364 ps
T58 /workspace/coverage/cover_reg_top/10.rv_dm_same_csr_outstanding.3933140489 May 16 12:57:16 PM PDT 24 May 16 12:57:52 PM PDT 24 1568515239 ps
T168 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_rw.3753415999 May 16 12:57:13 PM PDT 24 May 16 12:57:48 PM PDT 24 2763414745 ps
T61 /workspace/coverage/cover_reg_top/0.rv_dm_csr_hw_reset.27638645 May 16 12:56:47 PM PDT 24 May 16 12:57:23 PM PDT 24 372989593 ps
T169 /workspace/coverage/cover_reg_top/16.rv_dm_jtag_dtm_csr_rw.1192625913 May 16 12:57:28 PM PDT 24 May 16 12:57:59 PM PDT 24 98611588 ps
T170 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dmi_csr_rw.1808733524 May 16 12:57:08 PM PDT 24 May 16 12:57:42 PM PDT 24 303494277 ps
T38 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_bit_bash.1974259829 May 16 12:57:09 PM PDT 24 May 16 12:58:17 PM PDT 24 11689744707 ps
T89 /workspace/coverage/cover_reg_top/13.rv_dm_csr_rw.1641740543 May 16 12:57:26 PM PDT 24 May 16 12:58:00 PM PDT 24 328971233 ps
T107 /workspace/coverage/cover_reg_top/18.rv_dm_tl_intg_err.419501058 May 16 12:57:29 PM PDT 24 May 16 12:58:09 PM PDT 24 7938413269 ps
T90 /workspace/coverage/cover_reg_top/7.rv_dm_csr_rw.2537920496 May 16 12:57:06 PM PDT 24 May 16 12:57:41 PM PDT 24 185975675 ps
T171 /workspace/coverage/cover_reg_top/18.rv_dm_tl_errors.889102479 May 16 12:57:27 PM PDT 24 May 16 12:58:02 PM PDT 24 491908331 ps
T172 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dmi_csr_rw.2917006147 May 16 12:57:16 PM PDT 24 May 16 12:57:51 PM PDT 24 1049630246 ps
T91 /workspace/coverage/cover_reg_top/4.rv_dm_csr_hw_reset.2509624004 May 16 12:57:06 PM PDT 24 May 16 12:57:42 PM PDT 24 120968805 ps
T108 /workspace/coverage/cover_reg_top/0.rv_dm_tl_intg_err.294067383 May 16 12:56:48 PM PDT 24 May 16 12:57:30 PM PDT 24 2235151881 ps
T93 /workspace/coverage/cover_reg_top/3.rv_dm_csr_aliasing.884708457 May 16 12:56:59 PM PDT 24 May 16 12:58:36 PM PDT 24 2252077883 ps
T173 /workspace/coverage/cover_reg_top/12.rv_dm_jtag_dtm_csr_rw.3275386733 May 16 12:57:16 PM PDT 24 May 16 12:57:49 PM PDT 24 70900353 ps
T100 /workspace/coverage/cover_reg_top/9.rv_dm_same_csr_outstanding.2324458243 May 16 12:57:19 PM PDT 24 May 16 12:57:55 PM PDT 24 555250079 ps
T174 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dmi_csr_rw.39227990 May 16 12:57:02 PM PDT 24 May 16 12:57:36 PM PDT 24 1363787794 ps
T175 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dtm_csr_aliasing.2413702910 May 16 12:56:48 PM PDT 24 May 16 12:57:21 PM PDT 24 86705077 ps
T176 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_rw.1220105268 May 16 12:56:58 PM PDT 24 May 16 12:57:32 PM PDT 24 962553932 ps
T177 /workspace/coverage/cover_reg_top/5.rv_dm_tl_errors.3727403827 May 16 12:57:07 PM PDT 24 May 16 12:57:46 PM PDT 24 1313541873 ps
T94 /workspace/coverage/cover_reg_top/1.rv_dm_csr_rw.2714380658 May 16 12:57:00 PM PDT 24 May 16 12:57:34 PM PDT 24 332294282 ps
T178 /workspace/coverage/cover_reg_top/7.rv_dm_jtag_dtm_csr_rw.3116249366 May 16 12:57:08 PM PDT 24 May 16 12:57:42 PM PDT 24 189265106 ps
T179 /workspace/coverage/cover_reg_top/3.rv_dm_mem_partial_access.2392431942 May 16 12:57:03 PM PDT 24 May 16 12:57:35 PM PDT 24 22414808 ps
T180 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_bit_bash.4089199785 May 16 12:56:59 PM PDT 24 May 16 12:57:51 PM PDT 24 9710178970 ps
T181 /workspace/coverage/cover_reg_top/9.rv_dm_jtag_dtm_csr_rw.4281857519 May 16 12:57:08 PM PDT 24 May 16 12:57:42 PM PDT 24 60012062 ps
T182 /workspace/coverage/cover_reg_top/11.rv_dm_jtag_dmi_csr_rw.1446338542 May 16 12:57:16 PM PDT 24 May 16 12:57:51 PM PDT 24 1408380224 ps
T183 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dmi_csr_rw.3723720048 May 16 12:57:27 PM PDT 24 May 16 12:58:04 PM PDT 24 1910926620 ps
T184 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_aliasing.2053072402 May 16 12:56:58 PM PDT 24 May 16 12:57:31 PM PDT 24 69243420 ps
T185 /workspace/coverage/cover_reg_top/0.rv_dm_tap_fsm_rand_reset.3616236412 May 16 12:56:48 PM PDT 24 May 16 12:57:34 PM PDT 24 10551092960 ps
T186 /workspace/coverage/cover_reg_top/11.rv_dm_csr_mem_rw_with_rand_reset.4248502909 May 16 12:57:17 PM PDT 24 May 16 12:57:51 PM PDT 24 375647343 ps
T187 /workspace/coverage/cover_reg_top/3.rv_dm_csr_rw.2229511708 May 16 12:56:59 PM PDT 24 May 16 12:57:33 PM PDT 24 240018010 ps
T188 /workspace/coverage/cover_reg_top/22.rv_dm_tap_fsm_rand_reset.388906190 May 16 12:57:43 PM PDT 24 May 16 12:58:38 PM PDT 24 25395517337 ps
T95 /workspace/coverage/cover_reg_top/15.rv_dm_csr_rw.1243421418 May 16 12:57:29 PM PDT 24 May 16 12:58:01 PM PDT 24 357352685 ps
T189 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_bit_bash.49924585 May 16 12:56:57 PM PDT 24 May 16 12:57:33 PM PDT 24 2239344531 ps
T190 /workspace/coverage/cover_reg_top/14.rv_dm_csr_mem_rw_with_rand_reset.197765264 May 16 12:57:34 PM PDT 24 May 16 12:58:11 PM PDT 24 2503401889 ps
T103 /workspace/coverage/cover_reg_top/34.rv_dm_tap_fsm_rand_reset.1743745169 May 16 12:57:48 PM PDT 24 May 16 12:58:48 PM PDT 24 17025897242 ps
T85 /workspace/coverage/cover_reg_top/1.rv_dm_csr_aliasing.3131251508 May 16 12:56:48 PM PDT 24 May 16 12:57:53 PM PDT 24 4497032763 ps
T191 /workspace/coverage/cover_reg_top/3.rv_dm_csr_hw_reset.2109095465 May 16 12:57:00 PM PDT 24 May 16 12:57:33 PM PDT 24 202582214 ps
T52 /workspace/coverage/cover_reg_top/1.rv_dm_tap_fsm_rand_reset.88325557 May 16 12:56:51 PM PDT 24 May 16 12:57:50 PM PDT 24 28092067767 ps
T192 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_bit_bash.242816897 May 16 12:57:06 PM PDT 24 May 16 12:59:00 PM PDT 24 42393068479 ps
T101 /workspace/coverage/cover_reg_top/18.rv_dm_same_csr_outstanding.533556653 May 16 12:57:30 PM PDT 24 May 16 12:58:04 PM PDT 24 856480339 ps
T193 /workspace/coverage/cover_reg_top/4.rv_dm_csr_aliasing.339443202 May 16 12:56:59 PM PDT 24 May 16 12:58:06 PM PDT 24 4646324547 ps
T194 /workspace/coverage/cover_reg_top/15.rv_dm_tl_errors.429882280 May 16 12:57:28 PM PDT 24 May 16 12:58:01 PM PDT 24 579420288 ps
T195 /workspace/coverage/cover_reg_top/1.rv_dm_mem_partial_access.1881139409 May 16 12:57:02 PM PDT 24 May 16 12:57:33 PM PDT 24 32584416 ps
T102 /workspace/coverage/cover_reg_top/2.rv_dm_same_csr_outstanding.3325593754 May 16 12:57:00 PM PDT 24 May 16 12:57:39 PM PDT 24 548294238 ps
T196 /workspace/coverage/cover_reg_top/3.rv_dm_jtag_dtm_csr_rw.2442890971 May 16 12:56:57 PM PDT 24 May 16 12:57:30 PM PDT 24 28350452 ps
T197 /workspace/coverage/cover_reg_top/10.rv_dm_tap_fsm_rand_reset.736382924 May 16 12:57:16 PM PDT 24 May 16 12:58:21 PM PDT 24 18364587250 ps
T198 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_bit_bash.1716709353 May 16 12:56:47 PM PDT 24 May 16 12:57:22 PM PDT 24 757285433 ps
T199 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dmi_csr_aliasing.1452510727 May 16 12:56:58 PM PDT 24 May 16 12:58:46 PM PDT 24 22894591998 ps
T200 /workspace/coverage/cover_reg_top/2.rv_dm_jtag_dtm_csr_rw.1174998708 May 16 12:56:57 PM PDT 24 May 16 12:57:31 PM PDT 24 58507355 ps
T201 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_aliasing.2229466493 May 16 12:57:07 PM PDT 24 May 16 12:58:54 PM PDT 24 20563757484 ps
T202 /workspace/coverage/cover_reg_top/15.rv_dm_csr_mem_rw_with_rand_reset.1985110100 May 16 12:57:29 PM PDT 24 May 16 12:58:02 PM PDT 24 371685299 ps
T203 /workspace/coverage/cover_reg_top/5.rv_dm_tap_fsm_rand_reset.240588108 May 16 12:57:07 PM PDT 24 May 16 12:57:53 PM PDT 24 12501946705 ps
T86 /workspace/coverage/cover_reg_top/6.rv_dm_same_csr_outstanding.744634248 May 16 12:57:06 PM PDT 24 May 16 12:57:47 PM PDT 24 711921016 ps
T59 /workspace/coverage/cover_reg_top/0.rv_dm_tl_errors.2981245475 May 16 12:56:49 PM PDT 24 May 16 12:57:25 PM PDT 24 59135678 ps
T204 /workspace/coverage/cover_reg_top/10.rv_dm_jtag_dmi_csr_rw.1595413015 May 16 12:57:17 PM PDT 24 May 16 12:57:51 PM PDT 24 1237137633 ps
T96 /workspace/coverage/cover_reg_top/19.rv_dm_csr_rw.3416176133 May 16 12:57:44 PM PDT 24 May 16 12:58:12 PM PDT 24 126268257 ps
T205 /workspace/coverage/cover_reg_top/16.rv_dm_tap_fsm_rand_reset.3328707728 May 16 12:57:28 PM PDT 24 May 16 12:58:11 PM PDT 24 17508092996 ps
T109 /workspace/coverage/cover_reg_top/11.rv_dm_tl_intg_err.2507794989 May 16 12:57:16 PM PDT 24 May 16 12:57:57 PM PDT 24 515899970 ps
T206 /workspace/coverage/cover_reg_top/0.rv_dm_mem_partial_access.2294089351 May 16 12:56:54 PM PDT 24 May 16 12:57:27 PM PDT 24 44205341 ps
T207 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_hw_reset.2675089706 May 16 12:56:49 PM PDT 24 May 16 12:57:23 PM PDT 24 119082672 ps
T208 /workspace/coverage/cover_reg_top/1.rv_dm_mem_walk.1589925026 May 16 12:56:58 PM PDT 24 May 16 12:57:32 PM PDT 24 135312627 ps
T209 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_hw_reset.1554781800 May 16 12:57:02 PM PDT 24 May 16 12:57:33 PM PDT 24 84560966 ps
T210 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_bit_bash.1865780063 May 16 12:56:49 PM PDT 24 May 16 12:58:36 PM PDT 24 24709140769 ps
T211 /workspace/coverage/cover_reg_top/17.rv_dm_same_csr_outstanding.1758118946 May 16 12:57:29 PM PDT 24 May 16 12:58:03 PM PDT 24 243719744 ps
T212 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dmi_csr_aliasing.2480996944 May 16 12:56:49 PM PDT 24 May 16 12:57:52 PM PDT 24 6097414648 ps
T213 /workspace/coverage/cover_reg_top/21.rv_dm_tap_fsm_rand_reset.1180762115 May 16 12:57:42 PM PDT 24 May 16 12:59:02 PM PDT 24 15877919553 ps
T97 /workspace/coverage/cover_reg_top/1.rv_dm_csr_bit_bash.1954771660 May 16 12:57:02 PM PDT 24 May 16 12:58:26 PM PDT 24 5864328938 ps
T214 /workspace/coverage/cover_reg_top/9.rv_dm_tl_errors.280689633 May 16 12:57:16 PM PDT 24 May 16 12:57:51 PM PDT 24 49691306 ps
T87 /workspace/coverage/cover_reg_top/2.rv_dm_csr_aliasing.1172428592 May 16 12:56:58 PM PDT 24 May 16 12:58:38 PM PDT 24 6696820215 ps
T215 /workspace/coverage/cover_reg_top/11.rv_dm_same_csr_outstanding.2719984929 May 16 12:57:16 PM PDT 24 May 16 12:57:51 PM PDT 24 1096293178 ps
T216 /workspace/coverage/cover_reg_top/16.rv_dm_csr_mem_rw_with_rand_reset.3686714980 May 16 12:57:28 PM PDT 24 May 16 12:58:14 PM PDT 24 7074645912 ps
T217 /workspace/coverage/cover_reg_top/0.rv_dm_same_csr_outstanding.3636907292 May 16 12:56:51 PM PDT 24 May 16 12:57:31 PM PDT 24 415971769 ps
T218 /workspace/coverage/cover_reg_top/13.rv_dm_jtag_dtm_csr_rw.3739238937 May 16 12:57:16 PM PDT 24 May 16 12:57:49 PM PDT 24 34524764 ps
T113 /workspace/coverage/cover_reg_top/19.rv_dm_tl_intg_err.3809912826 May 16 12:57:44 PM PDT 24 May 16 12:58:28 PM PDT 24 949145680 ps
T219 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_rw.1029546347 May 16 12:56:50 PM PDT 24 May 16 12:57:23 PM PDT 24 185389290 ps
T114 /workspace/coverage/cover_reg_top/10.rv_dm_tl_intg_err.1355971829 May 16 12:57:16 PM PDT 24 May 16 12:58:03 PM PDT 24 1442670702 ps
T220 /workspace/coverage/cover_reg_top/1.rv_dm_jtag_dtm_csr_aliasing.3111296336 May 16 12:56:48 PM PDT 24 May 16 12:57:22 PM PDT 24 89909043 ps
T57 /workspace/coverage/cover_reg_top/14.rv_dm_tl_intg_err.3639574620 May 16 12:57:27 PM PDT 24 May 16 12:58:14 PM PDT 24 1462994956 ps
T116 /workspace/coverage/cover_reg_top/16.rv_dm_tl_intg_err.2974474035 May 16 12:57:28 PM PDT 24 May 16 12:58:07 PM PDT 24 481453594 ps
T110 /workspace/coverage/cover_reg_top/6.rv_dm_tl_intg_err.1569936417 May 16 12:57:04 PM PDT 24 May 16 12:57:53 PM PDT 24 1356410504 ps
T221 /workspace/coverage/cover_reg_top/15.rv_dm_jtag_dtm_csr_rw.1959176112 May 16 12:57:30 PM PDT 24 May 16 12:58:00 PM PDT 24 127125314 ps
T222 /workspace/coverage/cover_reg_top/10.rv_dm_tl_errors.1305650377 May 16 12:57:18 PM PDT 24 May 16 12:57:54 PM PDT 24 267252964 ps
T223 /workspace/coverage/cover_reg_top/1.rv_dm_csr_mem_rw_with_rand_reset.20520770 May 16 12:56:59 PM PDT 24 May 16 12:57:34 PM PDT 24 1154168766 ps
T98 /workspace/coverage/cover_reg_top/4.rv_dm_csr_bit_bash.3799732362 May 16 12:57:06 PM PDT 24 May 16 12:58:36 PM PDT 24 2808501315 ps
T224 /workspace/coverage/cover_reg_top/0.rv_dm_csr_mem_rw_with_rand_reset.1017286888 May 16 12:56:51 PM PDT 24 May 16 12:57:27 PM PDT 24 5672588005 ps
T225 /workspace/coverage/cover_reg_top/5.rv_dm_jtag_dmi_csr_rw.1163608223 May 16 12:57:06 PM PDT 24 May 16 12:57:43 PM PDT 24 445995936 ps
T32 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dmi_csr_hw_reset.3892698699 May 16 12:57:00 PM PDT 24 May 16 12:57:37 PM PDT 24 1539437970 ps
T226 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dtm_csr_rw.1057100250 May 16 12:57:28 PM PDT 24 May 16 12:57:59 PM PDT 24 93264628 ps
T111 /workspace/coverage/cover_reg_top/12.rv_dm_tl_intg_err.433178225 May 16 12:57:17 PM PDT 24 May 16 12:57:59 PM PDT 24 697473059 ps
T88 /workspace/coverage/cover_reg_top/3.rv_dm_same_csr_outstanding.3951963391 May 16 12:57:09 PM PDT 24 May 16 12:57:45 PM PDT 24 145953972 ps
T227 /workspace/coverage/cover_reg_top/1.rv_dm_same_csr_outstanding.1028400089 May 16 12:56:56 PM PDT 24 May 16 12:57:33 PM PDT 24 566056209 ps
T228 /workspace/coverage/cover_reg_top/19.rv_dm_csr_mem_rw_with_rand_reset.764796938 May 16 12:57:45 PM PDT 24 May 16 12:58:14 PM PDT 24 39299147 ps
T229 /workspace/coverage/cover_reg_top/0.rv_dm_csr_bit_bash.1862570480 May 16 12:56:50 PM PDT 24 May 16 12:58:01 PM PDT 24 22822814401 ps
T230 /workspace/coverage/cover_reg_top/8.rv_dm_csr_rw.2906720657 May 16 12:57:08 PM PDT 24 May 16 12:57:43 PM PDT 24 214200236 ps
T231 /workspace/coverage/cover_reg_top/19.rv_dm_tl_errors.3370473357 May 16 12:57:48 PM PDT 24 May 16 12:58:18 PM PDT 24 76840116 ps
T232 /workspace/coverage/cover_reg_top/2.rv_dm_csr_rw.573757971 May 16 12:56:59 PM PDT 24 May 16 12:57:33 PM PDT 24 198413830 ps
T233 /workspace/coverage/cover_reg_top/29.rv_dm_tap_fsm_rand_reset.1834249681 May 16 12:57:46 PM PDT 24 May 16 12:58:28 PM PDT 24 16073008307 ps
T234 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dmi_csr_rw.1411952957 May 16 12:57:08 PM PDT 24 May 16 12:57:43 PM PDT 24 276446663 ps
T235 /workspace/coverage/cover_reg_top/0.rv_dm_mem_walk.4096708448 May 16 12:56:54 PM PDT 24 May 16 12:57:27 PM PDT 24 17345212 ps
T236 /workspace/coverage/cover_reg_top/12.rv_dm_csr_rw.2209881835 May 16 12:57:18 PM PDT 24 May 16 12:57:51 PM PDT 24 113411741 ps
T237 /workspace/coverage/cover_reg_top/9.rv_dm_tap_fsm_rand_reset.3758172124 May 16 12:57:17 PM PDT 24 May 16 12:58:07 PM PDT 24 11611029246 ps
T238 /workspace/coverage/cover_reg_top/3.rv_dm_tl_intg_err.2653349412 May 16 12:56:59 PM PDT 24 May 16 12:57:41 PM PDT 24 1387182400 ps
T239 /workspace/coverage/cover_reg_top/8.rv_dm_jtag_dtm_csr_rw.269402051 May 16 12:57:08 PM PDT 24 May 16 12:57:42 PM PDT 24 45870307 ps
T240 /workspace/coverage/cover_reg_top/12.rv_dm_tl_errors.3768147762 May 16 12:57:16 PM PDT 24 May 16 12:57:52 PM PDT 24 124875766 ps
T241 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_aliasing.2142218671 May 16 12:56:51 PM PDT 24 May 16 12:58:25 PM PDT 24 14911480982 ps
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T92 /workspace/coverage/cover_reg_top/4.rv_dm_csr_rw.4158808223 May 16 12:57:08 PM PDT 24 May 16 12:57:43 PM PDT 24 40954839 ps
T54 /workspace/coverage/cover_reg_top/1.rv_dm_csr_hw_reset.853277577 May 16 12:56:57 PM PDT 24 May 16 12:57:31 PM PDT 24 65878662 ps
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T244 /workspace/coverage/cover_reg_top/2.rv_dm_mem_partial_access.2114230545 May 16 12:57:00 PM PDT 24 May 16 12:57:32 PM PDT 24 24881095 ps
T245 /workspace/coverage/cover_reg_top/15.rv_dm_same_csr_outstanding.3648505507 May 16 12:57:27 PM PDT 24 May 16 12:58:02 PM PDT 24 314552393 ps
T115 /workspace/coverage/cover_reg_top/15.rv_dm_tl_intg_err.3184439282 May 16 12:57:29 PM PDT 24 May 16 12:58:17 PM PDT 24 1937395652 ps
T246 /workspace/coverage/cover_reg_top/16.rv_dm_csr_rw.3816310501 May 16 12:57:28 PM PDT 24 May 16 12:58:00 PM PDT 24 54764372 ps
T247 /workspace/coverage/cover_reg_top/19.rv_dm_jtag_dmi_csr_rw.1537115300 May 16 12:57:29 PM PDT 24 May 16 12:58:01 PM PDT 24 883922803 ps
T248 /workspace/coverage/cover_reg_top/4.rv_dm_tl_intg_err.866545395 May 16 12:57:06 PM PDT 24 May 16 12:58:00 PM PDT 24 2102289982 ps
T112 /workspace/coverage/cover_reg_top/9.rv_dm_tl_intg_err.4201753827 May 16 12:57:18 PM PDT 24 May 16 12:58:00 PM PDT 24 2803449642 ps
T249 /workspace/coverage/cover_reg_top/0.rv_dm_jtag_dmi_csr_rw.3918133978 May 16 12:56:54 PM PDT 24 May 16 12:57:28 PM PDT 24 253468228 ps
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T251 /workspace/coverage/cover_reg_top/19.rv_dm_same_csr_outstanding.1525483474 May 16 12:57:45 PM PDT 24 May 16 12:58:15 PM PDT 24 362499001 ps
T252 /workspace/coverage/cover_reg_top/4.rv_dm_jtag_dtm_csr_bit_bash.1479758291 May 16 12:56:59 PM PDT 24 May 16 12:57:36 PM PDT 24 4782724477 ps
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