SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.rv_dm_regs_csr_assert | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
84.90 | 96.97 | 55.32 | 84.72 | 100.00 | 87.50 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
TlulOOBAddrErr_A | 120205913 | 16703 | 0 | 0 |
late_debug_enable_rd_A | 120205913 | 2992 | 0 | 0 |
late_debug_enable_regwen_rd_A | 120205913 | 2755 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 120205913 | 16703 | 0 | 0 |
T29 | 128719 | 480 | 0 | 0 |
T50 | 62496 | 2 | 0 | 0 |
T51 | 176562 | 21 | 0 | 0 |
T52 | 6398 | 690 | 0 | 0 |
T75 | 22092 | 747 | 0 | 0 |
T78 | 9723 | 382 | 0 | 0 |
T79 | 5787 | 205 | 0 | 0 |
T80 | 175552 | 34 | 0 | 0 |
T81 | 55909 | 1 | 0 | 0 |
T82 | 243080 | 206 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 120205913 | 2992 | 0 | 0 |
T30 | 154633 | 356 | 0 | 0 |
T50 | 62496 | 11 | 0 | 0 |
T75 | 22092 | 128 | 0 | 0 |
T80 | 175552 | 33 | 0 | 0 |
T84 | 17356 | 6 | 0 | 0 |
T85 | 11715 | 10 | 0 | 0 |
T89 | 26200 | 18 | 0 | 0 |
T90 | 6342 | 2 | 0 | 0 |
T95 | 42501 | 47 | 0 | 0 |
T122 | 26541 | 82 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 120205913 | 2755 | 0 | 0 |
T30 | 154633 | 346 | 0 | 0 |
T50 | 62496 | 25 | 0 | 0 |
T75 | 22092 | 275 | 0 | 0 |
T80 | 175552 | 19 | 0 | 0 |
T84 | 17356 | 4 | 0 | 0 |
T85 | 11715 | 3 | 0 | 0 |
T86 | 6529 | 4 | 0 | 0 |
T89 | 26200 | 21 | 0 | 0 |
T95 | 42501 | 63 | 0 | 0 |
T122 | 26541 | 83 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |