SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_mubi8_sync_otp_dis_rv_dm_late_debug | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
84.90 | 96.97 | 55.32 | 84.72 | 100.00 | 87.50 | dut |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 6 | 6 | 100.00 | |
CONT_ASSIGN | 124 | 1 | 1 | 100.00 |
ALWAYS | 128 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
124 | 1 | 1 | |
128 | 1 | 1 | |
168 | 4 | 4 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 193 | 193 | 0 | 0 |
OutputsKnown_A | 60243670 | 60213976 | 0 | 0 |
gen_flops.gen_no_stable_chks.OutputDelay_A | 60243670 | 60212629 | 0 | 579 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 193 | 193 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T15 | 1 | 1 | 0 | 0 |
T31 | 1 | 1 | 0 | 0 |
T32 | 1 | 1 | 0 | 0 |
T33 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 60243670 | 60213976 | 0 | 0 |
T1 | 523556 | 523376 | 0 | 0 |
T2 | 6488 | 6411 | 0 | 0 |
T3 | 107201 | 107150 | 0 | 0 |
T4 | 3676 | 3613 | 0 | 0 |
T5 | 12159 | 11404 | 0 | 0 |
T12 | 345707 | 345639 | 0 | 0 |
T15 | 255557 | 255474 | 0 | 0 |
T31 | 3129 | 3056 | 0 | 0 |
T32 | 2506 | 2433 | 0 | 0 |
T33 | 1676 | 1623 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 60243670 | 60212629 | 0 | 579 |
T1 | 523556 | 523367 | 0 | 3 |
T2 | 6488 | 6408 | 0 | 3 |
T3 | 107201 | 107147 | 0 | 3 |
T4 | 3676 | 3610 | 0 | 3 |
T5 | 12159 | 11371 | 0 | 3 |
T12 | 345707 | 345636 | 0 | 3 |
T15 | 255557 | 255471 | 0 | 3 |
T31 | 3129 | 3053 | 0 | 3 |
T32 | 2506 | 2430 | 0 | 3 |
T33 | 1676 | 1620 | 0 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |