SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.rv_dm_regs_csr_assert | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
85.85 | 96.97 | 55.32 | 89.47 | 100.00 | 87.50 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
TlulOOBAddrErr_A | 191156753 | 23738 | 0 | 0 |
late_debug_enable_rd_A | 191156753 | 2603 | 0 | 0 |
late_debug_enable_regwen_rd_A | 191156753 | 2513 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 191156753 | 23738 | 0 | 0 |
T44 | 626463 | 377 | 0 | 0 |
T45 | 312615 | 590 | 0 | 0 |
T50 | 195936 | 7 | 0 | 0 |
T51 | 67810 | 40 | 0 | 0 |
T52 | 4211 | 437 | 0 | 0 |
T66 | 475067 | 3979 | 0 | 0 |
T71 | 13532 | 343 | 0 | 0 |
T78 | 3056 | 16 | 0 | 0 |
T79 | 154113 | 52 | 0 | 0 |
T90 | 72125 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 191156753 | 2603 | 0 | 0 |
T45 | 312615 | 430 | 0 | 0 |
T50 | 195936 | 96 | 0 | 0 |
T53 | 8400 | 6 | 0 | 0 |
T67 | 683614 | 743 | 0 | 0 |
T81 | 21486 | 34 | 0 | 0 |
T84 | 7081 | 4 | 0 | 0 |
T85 | 20865 | 7 | 0 | 0 |
T116 | 308138 | 68 | 0 | 0 |
T117 | 83611 | 57 | 0 | 0 |
T118 | 24416 | 150 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 191156753 | 2513 | 0 | 0 |
T45 | 312615 | 377 | 0 | 0 |
T50 | 195936 | 88 | 0 | 0 |
T53 | 8400 | 5 | 0 | 0 |
T67 | 683614 | 693 | 0 | 0 |
T81 | 21486 | 21 | 0 | 0 |
T84 | 7081 | 2 | 0 | 0 |
T85 | 20865 | 20 | 0 | 0 |
T116 | 308138 | 100 | 0 | 0 |
T117 | 83611 | 71 | 0 | 0 |
T118 | 24416 | 145 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |