SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_mubi8_sync_otp_dis_rv_dm_late_debug | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
85.85 | 96.97 | 55.32 | 89.47 | 100.00 | 87.50 | dut |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 6 | 6 | 100.00 | |
CONT_ASSIGN | 124 | 1 | 1 | 100.00 |
ALWAYS | 128 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
CONT_ASSIGN | 168 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
124 | 1 | 1 | |
128 | 1 | 1 | |
168 | 4 | 4 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 196 | 196 | 0 | 0 |
OutputsKnown_A | 51906026 | 51870274 | 0 | 0 |
gen_flops.gen_no_stable_chks.OutputDelay_A | 51906026 | 51868681 | 0 | 588 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 196 | 196 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T24 | 1 | 1 | 0 | 0 |
T25 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 51906026 | 51870274 | 0 | 0 |
T1 | 734677 | 734098 | 0 | 0 |
T2 | 3932 | 3873 | 0 | 0 |
T3 | 238386 | 238316 | 0 | 0 |
T4 | 129433 | 129098 | 0 | 0 |
T5 | 177043 | 177000 | 0 | 0 |
T8 | 69816 | 69746 | 0 | 0 |
T10 | 101961 | 101906 | 0 | 0 |
T11 | 79439 | 79388 | 0 | 0 |
T24 | 2508 | 2455 | 0 | 0 |
T25 | 1282 | 1217 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 51906026 | 51868681 | 0 | 588 |
T1 | 734677 | 734074 | 0 | 3 |
T2 | 3932 | 3870 | 0 | 3 |
T3 | 238386 | 238313 | 0 | 3 |
T4 | 129433 | 129083 | 0 | 3 |
T5 | 177043 | 176998 | 0 | 3 |
T8 | 69816 | 69743 | 0 | 3 |
T10 | 101961 | 101903 | 0 | 3 |
T11 | 79439 | 79385 | 0 | 3 |
T24 | 2508 | 2452 | 0 | 3 |
T25 | 1282 | 1214 | 0 | 3 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |