SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.rv_dm_regs_csr_assert | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
87.12 | 96.97 | 59.57 | 91.58 | 100.00 | 87.50 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
TlulOOBAddrErr_A | 139271831 | 17681 | 0 | 0 |
late_debug_enable_rd_A | 139271831 | 3668 | 0 | 0 |
late_debug_enable_regwen_rd_A | 139271831 | 2982 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 139271831 | 17681 | 0 | 0 |
T53 | 117831 | 1442 | 0 | 0 |
T54 | 311312 | 80 | 0 | 0 |
T60 | 39238 | 2 | 0 | 0 |
T61 | 6839 | 320 | 0 | 0 |
T62 | 19014 | 391 | 0 | 0 |
T89 | 100849 | 2 | 0 | 0 |
T90 | 4676 | 181 | 0 | 0 |
T91 | 388451 | 24 | 0 | 0 |
T92 | 85592 | 3 | 0 | 0 |
T93 | 61630 | 21 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 139271831 | 3668 | 0 | 0 |
T54 | 311312 | 55 | 0 | 0 |
T63 | 10835 | 1 | 0 | 0 |
T96 | 40410 | 10 | 0 | 0 |
T126 | 13893 | 202 | 0 | 0 |
T127 | 17727 | 65 | 0 | 0 |
T128 | 190133 | 15 | 0 | 0 |
T129 | 11847 | 57 | 0 | 0 |
T130 | 23654 | 143 | 0 | 0 |
T131 | 24026 | 85 | 0 | 0 |
T132 | 17674 | 19 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 139271831 | 2982 | 0 | 0 |
T54 | 311312 | 41 | 0 | 0 |
T63 | 10835 | 2 | 0 | 0 |
T96 | 40410 | 52 | 0 | 0 |
T126 | 13893 | 155 | 0 | 0 |
T127 | 17727 | 93 | 0 | 0 |
T128 | 190133 | 14 | 0 | 0 |
T129 | 11847 | 70 | 0 | 0 |
T130 | 23654 | 90 | 0 | 0 |
T131 | 24026 | 64 | 0 | 0 |
T132 | 17674 | 43 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |