Unified Coverage Report :: Group :: dv_base_reg_pkg::mubi_cov#(32,32'b10010110100101101001011010010110,32'b01101001011010010110100101101001)::mubi_cg

Group : dv_base_reg_pkg::mubi_cov#(32,32'b10010110100101101001011010010110,32'b01101001011010010110100101101001)::mubi_cg

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
7.84	7.84	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_mubi_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable	7.84	1	100	1	64	64

---

Group Instance : mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
7.84	1	100	1	64	64

---

Summary for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	408	376	32	7.84

Variables for Group Instance mubi32_cov_of_mubi32_cov_of_rv_dm_regs_reg_block.late_debug_enable.late_debug_enable

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_value	408	376	32	7.84	100	1	1	0

Summary for Variable cp_value

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	408	376	32	7.84

User Defined Bins for cp_value

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER
others[5]	0	1	1
false	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[0]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1
others[6]	0	1	1
others[7]	0	1	1
others[8]	0	1	1
others[9]	0	1	1
others[10]	0	1	1
others[11]	0	1	1
others[12]	0	1	1
others[13]	0	1	1
others[14]	0	1	1
others[15]	0	1	1
others[16]	0	1	1
others[17]	0	1	1
others[18]	0	1	1
others[19]	0	1	1
others[20]	0	1	1
others[21]	0	1	1
others[22]	0	1	1
others[23]	0	1	1
others[24]	0	1	1
others[25]	0	1	1
others[26]	0	1	1
others[27]	0	1	1
others[28]	0	1	1
others[29]	0	1	1
others[30]	0	1	1
others[31]	0	1	1
others[1]	0	1	1
others[2]	0	1	1
others[3]	0	1	1
others[4]	0	1	1
others[5]	0	1	1

Covered bins

NAME	COUNT	AT LEAST		TEST	COUNT		TEST	COUNT		TEST	COUNT
others[0]	5	1		T56	1		T33	1		T80	1
others[1]	426	1		T1	1		T7	1		T4	6
others[2]	7	1		T48	1		T115	1		T44	1
others[3]	7	1		T155	1		T156	1		T157	1
others[4]	3	1		T32	1		T22	1		T27	1
others[6]	5	1		T25	1		T22	1		T158	1
others[7]	6	1		T66	1		T22	1		T157	1
others[8]	7	1		T25	1		T41	1		T34	1
others[9]	6	1		T7	1		T99	1		T159	1
others[10]	6	1		T28	1		T12	1		T34	1
others[11]	4	1		T26	1		T159	1		T160	1
others[12]	7	1		T8	1		T15	1		T161	1
others[13]	4	1		T39	1		T162	1		T15	1
others[14]	6	1		T1	1		T25	1		T157	2
others[15]	2	1		T159	1		T161	1		-	-
others[16]	9	1		T66	1		T152	1		T163	2
others[17]	4	1		T4	1		T157	1		T164	1
others[18]	276	1		T4	5		T13	1		T8	4
others[19]	1	1		T28	1		-	-		-	-
others[20]	1	1		T163	1		-	-		-	-
others[21]	6	1		T17	1		T15	2		T158	1
others[22]	4	1		T26	1		T31	1		T66	1
others[23]	7	1		T59	1		T159	1		T157	1
others[24]	9	1		T30	1		T41	2		T153	1
others[25]	6	1		T28	1		T12	1		T159	1
others[26]	4	1		T165	1		T161	1		T166	1
others[27]	7	1		T70	1		T79	1		T158	1
others[28]	4	1		T34	1		T166	1		T21	1
others[29]	2	1		T163	1		T166	1		-	-
others[30]	3	1		T26	1		T167	1		T168	1
others[31]	85	1		T1	1		T4	1		T28	2
true	274	1		T4	5		T13	1		T8	4