Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_mem_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_rv_dm_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 1028704 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1306296 1 T1 5 T3 70757 T4 1



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 687071 1 T1 1 T3 20159 T19 42131
values[0x0] 489826 1 T1 8 T3 34057 T4 1
values[0x1] 1158103 1 T1 8 T3 106455 T4 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 455734 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1879266 1 T1 8 T3 128203 T4 1



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 9385 1 T3 645 T19 1286 T8 340
valid_sources[0x01] 8898 1 T3 657 T19 1278 T8 283
valid_sources[0x02] 8499 1 T3 567 T19 1380 T8 728
valid_sources[0x03] 9241 1 T3 614 T19 1248 T8 357
valid_sources[0x04] 8808 1 T3 571 T19 1312 T38 1
valid_sources[0x05] 8458 1 T3 622 T19 1281 T8 403
valid_sources[0x06] 8991 1 T3 603 T19 1306 T8 728
valid_sources[0x07] 8877 1 T3 622 T19 1174 T8 424
valid_sources[0x08] 9702 1 T3 676 T19 1361 T8 294
valid_sources[0x09] 10841 1 T3 655 T19 1374 T8 463
valid_sources[0x0a] 8824 1 T3 649 T19 1265 T8 629
valid_sources[0x0b] 8683 1 T3 667 T19 1438 T8 376
valid_sources[0x0c] 8877 1 T3 638 T19 1298 T8 696
valid_sources[0x0d] 9072 1 T3 572 T19 1331 T8 457
valid_sources[0x0e] 9794 1 T3 659 T19 1203 T36 1
valid_sources[0x0f] 8577 1 T3 573 T19 1278 T8 242
valid_sources[0x10] 9876 1 T3 637 T19 1376 T38 1
valid_sources[0x11] 9084 1 T1 1 T3 665 T19 1417
valid_sources[0x12] 10940 1 T3 649 T19 1254 T8 418
valid_sources[0x13] 9763 1 T3 682 T19 1357 T8 624
valid_sources[0x14] 9845 1 T3 687 T19 1300 T8 755
valid_sources[0x15] 8763 1 T3 628 T19 1308 T8 650
valid_sources[0x16] 10235 1 T3 587 T4 2 T19 1279
valid_sources[0x17] 8498 1 T3 608 T19 1317 T8 437
valid_sources[0x18] 9180 1 T3 616 T19 1295 T28 9
valid_sources[0x19] 8782 1 T3 591 T19 1384 T36 1
valid_sources[0x1a] 8614 1 T3 599 T19 1303 T36 1
valid_sources[0x1b] 8774 1 T3 620 T19 1224 T8 855
valid_sources[0x1c] 8390 1 T3 603 T19 1341 T8 395
valid_sources[0x1d] 9016 1 T3 616 T19 1288 T34 2
valid_sources[0x1e] 10420 1 T3 632 T19 1339 T8 733
valid_sources[0x1f] 9327 1 T1 2 T3 618 T19 1303
valid_sources[0x20] 8970 1 T3 633 T19 1296 T8 556
valid_sources[0x21] 8029 1 T3 620 T19 1325 T8 267
valid_sources[0x22] 8535 1 T3 609 T19 1184 T8 523
valid_sources[0x23] 8788 1 T3 653 T19 1320 T18 3
valid_sources[0x24] 8520 1 T3 619 T19 1302 T8 339
valid_sources[0x25] 9037 1 T1 1 T3 686 T19 1242
valid_sources[0x26] 8282 1 T3 621 T19 1228 T8 194
valid_sources[0x27] 8698 1 T3 604 T19 1224 T8 728
valid_sources[0x28] 9300 1 T3 636 T19 1420 T125 2
valid_sources[0x29] 9133 1 T3 605 T19 1326 T125 3
valid_sources[0x2a] 9390 1 T3 582 T19 1330 T8 663
valid_sources[0x2b] 9527 1 T3 630 T19 1275 T8 519
valid_sources[0x2c] 8490 1 T3 645 T19 1320 T8 442
valid_sources[0x2d] 8694 1 T3 612 T19 1250 T8 142
valid_sources[0x2e] 9490 1 T3 670 T19 1230 T8 320
valid_sources[0x2f] 9376 1 T3 581 T19 1331 T8 281
valid_sources[0x30] 8881 1 T3 632 T19 1210 T8 521
valid_sources[0x31] 9763 1 T1 4 T3 658 T19 1363
valid_sources[0x32] 8740 1 T3 606 T19 1219 T8 571
valid_sources[0x33] 9171 1 T3 629 T19 1197 T38 1
valid_sources[0x34] 8944 1 T3 677 T19 1271 T38 1
valid_sources[0x35] 8590 1 T3 609 T19 1413 T8 354
valid_sources[0x36] 9322 1 T3 635 T19 1366 T8 432
valid_sources[0x37] 8816 1 T3 601 T19 1263 T34 1
valid_sources[0x38] 8333 1 T3 674 T19 1354 T8 387
valid_sources[0x39] 9016 1 T3 661 T19 1313 T8 602
valid_sources[0x3a] 9318 1 T3 646 T19 1307 T57 1
valid_sources[0x3b] 9188 1 T3 603 T19 1305 T125 1
valid_sources[0x3c] 9309 1 T3 645 T19 1256 T8 334
valid_sources[0x3d] 8033 1 T3 620 T19 1320 T8 260
valid_sources[0x3e] 9248 1 T3 602 T19 1311 T8 536
valid_sources[0x3f] 9366 1 T3 611 T19 1228 T8 1002
valid_sources[0x40] 9256 1 T3 650 T19 1362 T8 341
valid_sources[0x41] 8790 1 T3 635 T19 1255 T115 2
valid_sources[0x42] 9162 1 T3 564 T19 1230 T8 541
valid_sources[0x43] 8574 1 T3 672 T19 1279 T8 415
valid_sources[0x44] 9273 1 T3 657 T19 1399 T8 675
valid_sources[0x45] 8513 1 T3 623 T19 1295 T8 435
valid_sources[0x46] 8669 1 T3 609 T19 1328 T8 342
valid_sources[0x47] 8874 1 T3 646 T19 1358 T8 280
valid_sources[0x48] 8096 1 T3 651 T19 1338 T38 1
valid_sources[0x49] 9181 1 T3 577 T19 1236 T8 390
valid_sources[0x4a] 8375 1 T3 593 T19 1372 T8 145
valid_sources[0x4b] 8635 1 T3 627 T19 1368 T8 573
valid_sources[0x4c] 9557 1 T3 609 T19 1288 T8 505
valid_sources[0x4d] 8693 1 T3 632 T19 1337 T8 430
valid_sources[0x4e] 9025 1 T3 664 T19 1245 T32 80
valid_sources[0x4f] 10394 1 T3 609 T19 1324 T8 1262
valid_sources[0x50] 9876 1 T3 591 T19 1258 T8 779
valid_sources[0x51] 8753 1 T3 643 T19 1345 T36 1
valid_sources[0x52] 8912 1 T3 631 T19 1347 T8 360
valid_sources[0x53] 8183 1 T3 622 T19 1308 T8 357
valid_sources[0x54] 8720 1 T3 576 T19 1348 T8 468
valid_sources[0x55] 9824 1 T3 614 T19 1257 T8 1181
valid_sources[0x56] 9207 1 T3 624 T19 1203 T8 455
valid_sources[0x57] 8918 1 T3 617 T19 1311 T67 1
valid_sources[0x58] 8768 1 T3 614 T19 1346 T8 569
valid_sources[0x59] 9761 1 T3 620 T19 1339 T8 575
valid_sources[0x5a] 10237 1 T3 620 T19 1315 T8 736
valid_sources[0x5b] 9433 1 T3 588 T19 1238 T8 508
valid_sources[0x5c] 8549 1 T3 622 T19 1239 T106 27
valid_sources[0x5d] 9205 1 T3 612 T19 1299 T8 493
valid_sources[0x5e] 9161 1 T3 581 T19 1266 T8 567
valid_sources[0x5f] 8694 1 T3 641 T19 1357 T8 355
valid_sources[0x60] 9990 1 T3 664 T19 1252 T8 461
valid_sources[0x61] 8908 1 T3 638 T19 1226 T8 453
valid_sources[0x62] 8390 1 T3 636 T19 1327 T8 201
valid_sources[0x63] 8787 1 T3 609 T19 1288 T8 399
valid_sources[0x64] 10298 1 T3 659 T19 1323 T8 668
valid_sources[0x65] 9678 1 T1 1 T3 631 T19 1392
valid_sources[0x66] 9138 1 T3 602 T19 1287 T8 556
valid_sources[0x67] 8071 1 T3 639 T19 1299 T125 1
valid_sources[0x68] 8200 1 T3 547 T19 1270 T8 518
valid_sources[0x69] 9064 1 T3 602 T19 1319 T8 268
valid_sources[0x6a] 9845 1 T3 621 T19 1369 T8 1011
valid_sources[0x6b] 9980 1 T3 613 T19 1340 T67 1
valid_sources[0x6c] 9345 1 T3 671 T19 1270 T8 604
valid_sources[0x6d] 8484 1 T3 596 T4 2 T19 1322
valid_sources[0x6e] 9507 1 T3 620 T19 1206 T6 1
valid_sources[0x6f] 8454 1 T3 604 T19 1317 T34 1
valid_sources[0x70] 9814 1 T3 592 T19 1269 T8 841
valid_sources[0x71] 8600 1 T3 655 T19 1325 T8 709
valid_sources[0x72] 8272 1 T1 2 T3 621 T19 1372
valid_sources[0x73] 9251 1 T3 717 T19 1372 T8 323
valid_sources[0x74] 9769 1 T3 637 T19 1303 T8 506
valid_sources[0x75] 9790 1 T3 636 T19 1316 T36 2
valid_sources[0x76] 9270 1 T3 655 T19 1344 T125 2
valid_sources[0x77] 9199 1 T3 564 T19 1401 T8 294
valid_sources[0x78] 8803 1 T3 603 T19 1301 T8 350
valid_sources[0x79] 8683 1 T3 638 T19 1243 T8 282
valid_sources[0x7a] 8110 1 T3 633 T19 1336 T8 248
valid_sources[0x7b] 8484 1 T3 604 T19 1306 T8 337
valid_sources[0x7c] 8765 1 T3 653 T19 1316 T8 191
valid_sources[0x7d] 10032 1 T3 636 T19 1391 T8 677
valid_sources[0x7e] 9157 1 T3 589 T19 1290 T29 7
valid_sources[0x7f] 9067 1 T3 594 T19 1292 T138 5
valid_sources[0x80] 9466 1 T3 673 T19 1323 T39 7



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 474996 1 T1 1 T3 18374 T19 39045
values[0x0] all_enables biggest_size 415405 1 T1 3 T3 26155 T19 56903
values[0x1] all_enables biggest_size 415895 1 T1 1 T3 26228 T4 1


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 47836 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 1081842 1 T1 5 T2 3 T3 111318



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 290024 1 T3 29146 T19 63524 T8 22052
values[0x0] 408019 1 T1 3 T2 4 T3 41940
values[0x1] 431635 1 T1 2 T2 5 T3 44437



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 25088 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 1104590 1 T1 5 T2 3 T3 113430



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 4684 1 T3 445 T19 989 T8 585
valid_sources[0x01] 4854 1 T3 474 T19 979 T166 1
valid_sources[0x02] 4352 1 T3 429 T19 995 T8 326
valid_sources[0x03] 4021 1 T3 432 T19 980 T6 1
valid_sources[0x04] 4224 1 T3 436 T19 942 T8 285
valid_sources[0x05] 4300 1 T3 453 T5 1 T19 964
valid_sources[0x06] 4278 1 T3 442 T19 957 T44 1
valid_sources[0x07] 4466 1 T3 491 T19 992 T61 4
valid_sources[0x08] 4247 1 T3 435 T19 913 T25 1
valid_sources[0x09] 3966 1 T3 429 T19 966 T138 1
valid_sources[0x0a] 4169 1 T3 429 T19 903 T43 3
valid_sources[0x0b] 4836 1 T3 461 T19 1067 T8 456
valid_sources[0x0c] 4275 1 T3 444 T19 1012 T8 373
valid_sources[0x0d] 5680 1 T3 467 T19 983 T8 1559
valid_sources[0x0e] 4292 1 T3 445 T19 995 T8 185
valid_sources[0x0f] 4265 1 T3 449 T19 914 T8 279
valid_sources[0x10] 4546 1 T3 444 T19 986 T25 1
valid_sources[0x11] 4356 1 T3 476 T19 956 T8 334
valid_sources[0x12] 4467 1 T3 420 T19 1000 T167 1
valid_sources[0x13] 4279 1 T3 444 T19 965 T28 1
valid_sources[0x14] 4341 1 T3 438 T19 1047 T138 1
valid_sources[0x15] 4577 1 T3 465 T19 1042 T34 2
valid_sources[0x16] 4785 1 T3 493 T19 1035 T8 612
valid_sources[0x17] 4878 1 T3 422 T19 958 T8 384
valid_sources[0x18] 4141 1 T3 438 T19 954 T168 1
valid_sources[0x19] 4433 1 T3 451 T19 954 T8 276
valid_sources[0x1a] 4281 1 T3 456 T19 961 T8 387
valid_sources[0x1b] 4217 1 T3 454 T19 998 T49 2
valid_sources[0x1c] 4151 1 T3 449 T19 968 T8 233
valid_sources[0x1d] 4371 1 T3 474 T19 916 T44 1
valid_sources[0x1e] 4160 1 T3 443 T19 953 T169 1
valid_sources[0x1f] 4251 1 T3 449 T19 994 T144 1
valid_sources[0x20] 4082 1 T3 415 T19 947 T138 1
valid_sources[0x21] 4599 1 T3 457 T19 971 T169 1
valid_sources[0x22] 4518 1 T3 417 T19 1006 T18 1
valid_sources[0x23] 4297 1 T3 449 T19 1009 T44 1
valid_sources[0x24] 4106 1 T3 456 T19 970 T8 10
valid_sources[0x25] 4258 1 T3 426 T19 1008 T57 3
valid_sources[0x26] 4439 1 T3 438 T19 947 T8 409
valid_sources[0x27] 4622 1 T3 482 T19 991 T8 490
valid_sources[0x28] 4068 1 T3 420 T19 1015 T8 94
valid_sources[0x29] 4588 1 T3 486 T19 1018 T8 173
valid_sources[0x2a] 4578 1 T3 441 T19 1022 T8 668
valid_sources[0x2b] 4122 1 T3 457 T19 974 T8 208
valid_sources[0x2c] 4199 1 T3 417 T19 1012 T170 1
valid_sources[0x2d] 3925 1 T3 480 T19 1036 T43 2
valid_sources[0x2e] 4491 1 T3 445 T19 982 T8 713
valid_sources[0x2f] 4265 1 T3 468 T19 971 T8 151
valid_sources[0x30] 4370 1 T3 469 T19 936 T8 289
valid_sources[0x31] 4311 1 T3 471 T19 977 T8 381
valid_sources[0x32] 4263 1 T3 450 T19 970 T171 4
valid_sources[0x33] 4929 1 T3 427 T19 998 T8 558
valid_sources[0x34] 4302 1 T3 443 T19 957 T18 1
valid_sources[0x35] 4270 1 T3 442 T19 992 T8 308
valid_sources[0x36] 4270 1 T3 450 T19 940 T25 2
valid_sources[0x37] 4528 1 T3 448 T19 900 T35 1
valid_sources[0x38] 4216 1 T3 444 T19 986 T166 1
valid_sources[0x39] 4142 1 T3 441 T19 997 T8 90
valid_sources[0x3a] 5302 1 T3 475 T19 1005 T8 760
valid_sources[0x3b] 4279 1 T3 464 T19 997 T8 130
valid_sources[0x3c] 4406 1 T3 446 T19 1005 T8 510
valid_sources[0x3d] 4361 1 T3 448 T19 1013 T8 303
valid_sources[0x3e] 3969 1 T3 411 T19 998 T8 1
valid_sources[0x3f] 4280 1 T3 454 T19 1020 T8 138
valid_sources[0x40] 4413 1 T3 485 T19 975 T18 1
valid_sources[0x41] 4164 1 T3 454 T19 976 T125 3
valid_sources[0x42] 4192 1 T3 454 T19 1003 T57 1
valid_sources[0x43] 4442 1 T3 485 T19 980 T8 503
valid_sources[0x44] 4559 1 T3 448 T19 1019 T167 1
valid_sources[0x45] 3965 1 T3 500 T19 983 T12 541
valid_sources[0x46] 4274 1 T3 483 T19 1019 T67 1
valid_sources[0x47] 4599 1 T3 461 T19 974 T24 1
valid_sources[0x48] 4220 1 T3 447 T19 960 T8 135
valid_sources[0x49] 4440 1 T3 470 T19 962 T8 2
valid_sources[0x4a] 5069 1 T3 475 T19 982 T172 8
valid_sources[0x4b] 5362 1 T3 456 T19 981 T8 906
valid_sources[0x4c] 4049 1 T3 424 T19 943 T25 2
valid_sources[0x4d] 4023 1 T3 396 T19 990 T138 1
valid_sources[0x4e] 3748 1 T2 1 T3 448 T19 907
valid_sources[0x4f] 4323 1 T3 448 T19 995 T8 201
valid_sources[0x50] 4849 1 T3 434 T19 984 T44 1
valid_sources[0x51] 4901 1 T1 5 T2 1 T3 448
valid_sources[0x52] 4360 1 T3 426 T19 954 T8 375
valid_sources[0x53] 4545 1 T3 464 T19 1029 T167 1
valid_sources[0x54] 4559 1 T3 469 T27 2 T19 978
valid_sources[0x55] 4192 1 T3 434 T19 1012 T8 251
valid_sources[0x56] 4502 1 T3 435 T19 952 T8 626
valid_sources[0x57] 5158 1 T3 443 T19 1000 T35 1
valid_sources[0x58] 4366 1 T3 416 T19 952 T8 244
valid_sources[0x59] 4387 1 T2 2 T3 438 T19 936
valid_sources[0x5a] 4503 1 T3 453 T19 1016 T166 1
valid_sources[0x5b] 4117 1 T3 427 T19 958 T44 1
valid_sources[0x5c] 5057 1 T3 447 T19 962 T8 819
valid_sources[0x5d] 4478 1 T3 457 T19 974 T49 1
valid_sources[0x5e] 4398 1 T3 460 T19 995 T8 316
valid_sources[0x5f] 4588 1 T3 457 T19 961 T8 381
valid_sources[0x60] 4579 1 T3 473 T19 946 T36 1
valid_sources[0x61] 5275 1 T2 1 T3 453 T19 998
valid_sources[0x62] 4497 1 T3 457 T19 962 T8 536
valid_sources[0x63] 4289 1 T3 403 T19 953 T167 1
valid_sources[0x64] 4608 1 T3 439 T19 999 T138 1
valid_sources[0x65] 4596 1 T3 468 T5 1 T19 997
valid_sources[0x66] 4155 1 T3 419 T19 971 T8 156
valid_sources[0x67] 5759 1 T3 436 T5 1 T19 990
valid_sources[0x68] 4130 1 T3 454 T19 896 T8 218
valid_sources[0x69] 4156 1 T3 430 T19 957 T61 1
valid_sources[0x6a] 4158 1 T3 425 T19 1045 T114 1
valid_sources[0x6b] 4218 1 T3 429 T19 1000 T57 1
valid_sources[0x6c] 4418 1 T2 1 T3 443 T19 975
valid_sources[0x6d] 4313 1 T3 456 T19 1006 T44 1
valid_sources[0x6e] 4049 1 T3 437 T19 990 T12 536
valid_sources[0x6f] 4558 1 T3 420 T19 987 T44 1
valid_sources[0x70] 4722 1 T3 430 T19 986 T8 556
valid_sources[0x71] 4730 1 T3 433 T19 1052 T8 704
valid_sources[0x72] 4243 1 T3 462 T19 919 T166 1
valid_sources[0x73] 4231 1 T3 433 T19 1017 T8 210
valid_sources[0x74] 4586 1 T3 476 T19 1041 T8 528
valid_sources[0x75] 4858 1 T3 436 T19 977 T173 2
valid_sources[0x76] 4242 1 T3 459 T19 1017 T8 245
valid_sources[0x77] 4098 1 T3 458 T19 968 T8 208
valid_sources[0x78] 4640 1 T3 443 T19 1034 T8 316
valid_sources[0x79] 4105 1 T3 425 T19 925 T8 44
valid_sources[0x7a] 4705 1 T3 456 T19 968 T8 722
valid_sources[0x7b] 5259 1 T3 458 T19 974 T39 7
valid_sources[0x7c] 3967 1 T3 461 T19 959 T12 518
valid_sources[0x7d] 4046 1 T3 423 T19 970 T12 537
valid_sources[0x7e] 4239 1 T3 464 T19 1029 T32 1
valid_sources[0x7f] 4447 1 T3 481 T19 913 T107 1
valid_sources[0x80] 4438 1 T2 1 T3 466 T5 1



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 272063 1 T3 27706 T19 60075 T8 20794
values[0x0] all_enables biggest_size 403915 1 T1 3 T2 2 T3 41601
values[0x1] all_enables biggest_size 405864 1 T1 2 T2 1 T3 42011

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%